spike.c (2ac031d171ccd18c973014d9978b4a63f0ad5fb0) spike.c (e883e9927ae667a2473c4a4ec666df53af1b34d9)
1/*
2 * QEMU RISC-V Spike Board
3 *
4 * Copyright (c) 2016-2017 Sagar Karandikar, sagark@eecs.berkeley.edu
5 * Copyright (c) 2017-2018 SiFive, Inc.
6 *
7 * This provides a RISC-V Board with the following devices:
8 *

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97 qemu_fdt_setprop_cell(fdt, "/cpus", "#size-cells", 0x0);
98 qemu_fdt_setprop_cell(fdt, "/cpus", "#address-cells", 0x1);
99
100 for (cpu = s->soc.num_harts - 1; cpu >= 0; cpu--) {
101 nodename = g_strdup_printf("/cpus/cpu@%d", cpu);
102 char *intc = g_strdup_printf("/cpus/cpu@%d/interrupt-controller", cpu);
103 char *isa = riscv_isa_string(&s->soc.harts[cpu]);
104 qemu_fdt_add_subnode(fdt, nodename);
1/*
2 * QEMU RISC-V Spike Board
3 *
4 * Copyright (c) 2016-2017 Sagar Karandikar, sagark@eecs.berkeley.edu
5 * Copyright (c) 2017-2018 SiFive, Inc.
6 *
7 * This provides a RISC-V Board with the following devices:
8 *

--- 88 unchanged lines hidden (view full) ---

97 qemu_fdt_setprop_cell(fdt, "/cpus", "#size-cells", 0x0);
98 qemu_fdt_setprop_cell(fdt, "/cpus", "#address-cells", 0x1);
99
100 for (cpu = s->soc.num_harts - 1; cpu >= 0; cpu--) {
101 nodename = g_strdup_printf("/cpus/cpu@%d", cpu);
102 char *intc = g_strdup_printf("/cpus/cpu@%d/interrupt-controller", cpu);
103 char *isa = riscv_isa_string(&s->soc.harts[cpu]);
104 qemu_fdt_add_subnode(fdt, nodename);
105#if defined(TARGET_RISCV32)
106 qemu_fdt_setprop_string(fdt, nodename, "mmu-type", "riscv,sv32");
107#else
105 qemu_fdt_setprop_string(fdt, nodename, "mmu-type", "riscv,sv48");
108 qemu_fdt_setprop_string(fdt, nodename, "mmu-type", "riscv,sv48");
109#endif
106 qemu_fdt_setprop_string(fdt, nodename, "riscv,isa", isa);
107 qemu_fdt_setprop_string(fdt, nodename, "compatible", "riscv");
108 qemu_fdt_setprop_string(fdt, nodename, "status", "okay");
109 qemu_fdt_setprop_cell(fdt, nodename, "reg", cpu);
110 qemu_fdt_setprop_string(fdt, nodename, "device_type", "cpu");
111 qemu_fdt_add_subnode(fdt, intc);
112 qemu_fdt_setprop_cell(fdt, intc, "phandle", 1);
113 qemu_fdt_setprop_string(fdt, intc, "compatible", "riscv,cpu-intc");

--- 347 unchanged lines hidden --- 		110 qemu_fdt_setprop_string(fdt, nodename, "riscv,isa", isa);
111 qemu_fdt_setprop_string(fdt, nodename, "compatible", "riscv");
112 qemu_fdt_setprop_string(fdt, nodename, "status", "okay");
113 qemu_fdt_setprop_cell(fdt, nodename, "reg", cpu);
114 qemu_fdt_setprop_string(fdt, nodename, "device_type", "cpu");
115 qemu_fdt_add_subnode(fdt, intc);
116 qemu_fdt_setprop_cell(fdt, intc, "phandle", 1);
117 qemu_fdt_setprop_string(fdt, intc, "compatible", "riscv,cpu-intc");

--- 347 unchanged lines hidden ---