spike.c (20b8016ed847ac751e508c38aa27a9f8ecb93ac8) spike.c (732612856a8948a6ba1148322651743aa963b51c)
1/*
2 * QEMU RISC-V Spike Board
3 *
4 * Copyright (c) 2016-2017 Sagar Karandikar, sagark@eecs.berkeley.edu
5 * Copyright (c) 2017-2018 SiFive, Inc.
6 *
7 * This provides a RISC-V Board with the following devices:
8 *

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38#include "hw/char/riscv_htif.h"
39#include "hw/intc/sifive_clint.h"
40#include "chardev/char.h"
41#include "sysemu/arch_init.h"
42#include "sysemu/device_tree.h"
43#include "sysemu/qtest.h"
44#include "sysemu/sysemu.h"
45
1/*
2 * QEMU RISC-V Spike Board
3 *
4 * Copyright (c) 2016-2017 Sagar Karandikar, sagark@eecs.berkeley.edu
5 * Copyright (c) 2017-2018 SiFive, Inc.
6 *
7 * This provides a RISC-V Board with the following devices:
8 *

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38#include "hw/char/riscv_htif.h"
39#include "hw/intc/sifive_clint.h"
40#include "chardev/char.h"
41#include "sysemu/arch_init.h"
42#include "sysemu/device_tree.h"
43#include "sysemu/qtest.h"
44#include "sysemu/sysemu.h"
45
46static const struct MemmapEntry {
47 hwaddr base;
48 hwaddr size;
49} spike_memmap[] = {
46static const MemMapEntry spike_memmap[] = {
50 [SPIKE_MROM] = { 0x1000, 0xf000 },
51 [SPIKE_CLINT] = { 0x2000000, 0x10000 },
52 [SPIKE_DRAM] = { 0x80000000, 0x0 },
53};
54
47 [SPIKE_MROM] = { 0x1000, 0xf000 },
48 [SPIKE_CLINT] = { 0x2000000, 0x10000 },
49 [SPIKE_DRAM] = { 0x80000000, 0x0 },
50};
51
55static void create_fdt(SpikeState *s, const struct MemmapEntry *memmap,
52static void create_fdt(SpikeState *s, const MemMapEntry *memmap,
56 uint64_t mem_size, const char *cmdline, bool is_32_bit)
57{
58 void *fdt;
59 uint64_t addr, size;
60 unsigned long clint_addr;
61 int cpu, socket;
62 MachineState *mc = MACHINE(s);
63 uint32_t *clint_cells;

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174 if (cmdline) {
175 qemu_fdt_add_subnode(fdt, "/chosen");
176 qemu_fdt_setprop_string(fdt, "/chosen", "bootargs", cmdline);
177 }
178}
179
180static void spike_board_init(MachineState *machine)
181{
53 uint64_t mem_size, const char *cmdline, bool is_32_bit)
54{
55 void *fdt;
56 uint64_t addr, size;
57 unsigned long clint_addr;
58 int cpu, socket;
59 MachineState *mc = MACHINE(s);
60 uint32_t *clint_cells;

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171 if (cmdline) {
172 qemu_fdt_add_subnode(fdt, "/chosen");
173 qemu_fdt_setprop_string(fdt, "/chosen", "bootargs", cmdline);
174 }
175}
176
177static void spike_board_init(MachineState *machine)
178{
182 const struct MemmapEntry *memmap = spike_memmap;
179 const MemMapEntry *memmap = spike_memmap;
183 SpikeState *s = SPIKE_MACHINE(machine);
184 MemoryRegion *system_memory = get_system_memory();
185 MemoryRegion *main_mem = g_new(MemoryRegion, 1);
186 MemoryRegion *mask_rom = g_new(MemoryRegion, 1);
187 target_ulong firmware_end_addr, kernel_start_addr;
188 uint32_t fdt_load_addr;
189 uint64_t kernel_entry;
190 char *soc_name;

--- 154 unchanged lines hidden --- 		180 SpikeState *s = SPIKE_MACHINE(machine);
181 MemoryRegion *system_memory = get_system_memory();
182 MemoryRegion *main_mem = g_new(MemoryRegion, 1);
183 MemoryRegion *mask_rom = g_new(MemoryRegion, 1);
184 target_ulong firmware_end_addr, kernel_start_addr;
185 uint32_t fdt_load_addr;
186 uint64_t kernel_entry;
187 char *soc_name;

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