shakti_c.c (0c1eccd368af8805ec0fb11e6cf25d0684d37328) shakti_c.c (55c136599f512a86e3fec9f77b6b5a30a6b34cca)
1/*
2 * Shakti C-class SoC emulation
3 *
4 * Copyright (c) 2021 Vijai Kumar K <vijai@behindbytes.com>
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2 or later, as published by the Free Software Foundation.

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40 [SHAKTI_C_CLINT] = { 0x02000000, 0xc0000 },
41 [SHAKTI_C_I2C] = { 0x20c00000, 0x00100 },
42};
43
44static void shakti_c_machine_state_init(MachineState *mstate)
45{
46 ShaktiCMachineState *sms = RISCV_SHAKTI_MACHINE(mstate);
47 MemoryRegion *system_memory = get_system_memory();
1/*
2 * Shakti C-class SoC emulation
3 *
4 * Copyright (c) 2021 Vijai Kumar K <vijai@behindbytes.com>
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2 or later, as published by the Free Software Foundation.

--- 31 unchanged lines hidden (view full) ---

40 [SHAKTI_C_CLINT] = { 0x02000000, 0xc0000 },
41 [SHAKTI_C_I2C] = { 0x20c00000, 0x00100 },
42};
43
44static void shakti_c_machine_state_init(MachineState *mstate)
45{
46 ShaktiCMachineState *sms = RISCV_SHAKTI_MACHINE(mstate);
47 MemoryRegion *system_memory = get_system_memory();
48 hwaddr firmware_load_addr = shakti_c_memmap[SHAKTI_C_RAM].base;
48
49 /* Initialize SoC */
50 object_initialize_child(OBJECT(mstate), "soc", &sms->soc,
51 TYPE_RISCV_SHAKTI_SOC);
52 qdev_realize(DEVICE(&sms->soc), NULL, &error_abort);
53
54 /* register RAM */
55 memory_region_add_subregion(system_memory,
56 shakti_c_memmap[SHAKTI_C_RAM].base,
57 mstate->ram);
58
49
50 /* Initialize SoC */
51 object_initialize_child(OBJECT(mstate), "soc", &sms->soc,
52 TYPE_RISCV_SHAKTI_SOC);
53 qdev_realize(DEVICE(&sms->soc), NULL, &error_abort);
54
55 /* register RAM */
56 memory_region_add_subregion(system_memory,
57 shakti_c_memmap[SHAKTI_C_RAM].base,
58 mstate->ram);
59
60 if (mstate->firmware) {
61 riscv_load_firmware(mstate->firmware, &firmware_load_addr, NULL);
62 }
63
59 /* ROM reset vector */
64 /* ROM reset vector */
60 riscv_setup_rom_reset_vec(mstate, &sms->soc.cpus,
61 shakti_c_memmap[SHAKTI_C_RAM].base,
65 riscv_setup_rom_reset_vec(mstate, &sms->soc.cpus, firmware_load_addr,
62 shakti_c_memmap[SHAKTI_C_ROM].base,
63 shakti_c_memmap[SHAKTI_C_ROM].size, 0, 0);
66 shakti_c_memmap[SHAKTI_C_ROM].base,
67 shakti_c_memmap[SHAKTI_C_ROM].size, 0, 0);
64 if (mstate->firmware) {
65 riscv_load_firmware(mstate->firmware,
66 shakti_c_memmap[SHAKTI_C_RAM].base,
67 NULL);
68 }
69}
70
71static void shakti_c_machine_instance_init(Object *obj)
72{
73}
74
75static void shakti_c_machine_class_init(ObjectClass *klass, void *data)
76{

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69
70static void shakti_c_machine_instance_init(Object *obj)
71{
72}
73
74static void shakti_c_machine_class_init(ObjectClass *klass, void *data)
75{

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