ppc440_bamboo.c (f8251db121c3f051b22a7536b97d160c30bcccd4) ppc440_bamboo.c (a1f7f97b950a46393b0e55a9a0082e70f540cbbd)
1/*
2 * QEMU PowerPC 440 Bamboo board emulation
3 *
4 * Copyright 2007 IBM Corporation.
5 * Authors:
6 * Jerone Young <jyoung5@us.ibm.com>
7 * Christian Ehrhardt <ehrhardt@linux.vnet.ibm.com>
8 * Hollis Blanchard <hollisb@us.ibm.com>

--- 114 unchanged lines hidden (view full) ---

123static void mmubooke_create_initial_mapping(CPUPPCState *env,
124 target_ulong va,
125 hwaddr pa)
126{
127 ppcemb_tlb_t *tlb = &env->tlb.tlbe[0];
128
129 tlb->attr = 0;
130 tlb->prot = PAGE_VALID | ((PAGE_READ | PAGE_WRITE | PAGE_EXEC) << 4);
1/*
2 * QEMU PowerPC 440 Bamboo board emulation
3 *
4 * Copyright 2007 IBM Corporation.
5 * Authors:
6 * Jerone Young <jyoung5@us.ibm.com>
7 * Christian Ehrhardt <ehrhardt@linux.vnet.ibm.com>
8 * Hollis Blanchard <hollisb@us.ibm.com>

--- 114 unchanged lines hidden (view full) ---

123static void mmubooke_create_initial_mapping(CPUPPCState *env,
124 target_ulong va,
125 hwaddr pa)
126{
127 ppcemb_tlb_t *tlb = &env->tlb.tlbe[0];
128
129 tlb->attr = 0;
130 tlb->prot = PAGE_VALID | ((PAGE_READ | PAGE_WRITE | PAGE_EXEC) << 4);
131 tlb->size = 1 << 31; /* up to 0x80000000 */
131 tlb->size = 1U << 31; /* up to 0x80000000 */
132 tlb->EPN = va & TARGET_PAGE_MASK;
133 tlb->RPN = pa & TARGET_PAGE_MASK;
134 tlb->PID = 0;
135
136 tlb = &env->tlb.tlbe[1];
137 tlb->attr = 0;
138 tlb->prot = PAGE_VALID | ((PAGE_READ | PAGE_WRITE | PAGE_EXEC) << 4);
132 tlb->EPN = va & TARGET_PAGE_MASK;
133 tlb->RPN = pa & TARGET_PAGE_MASK;
134 tlb->PID = 0;
135
136 tlb = &env->tlb.tlbe[1];
137 tlb->attr = 0;
138 tlb->prot = PAGE_VALID | ((PAGE_READ | PAGE_WRITE | PAGE_EXEC) << 4);
139 tlb->size = 1 << 31; /* up to 0xffffffff */
139 tlb->size = 1U << 31; /* up to 0xffffffff */
140 tlb->EPN = 0x80000000 & TARGET_PAGE_MASK;
141 tlb->RPN = 0x80000000 & TARGET_PAGE_MASK;
142 tlb->PID = 0;
143}
144
145static void main_cpu_reset(void *opaque)
146{
147 PowerPCCPU *cpu = opaque;

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140 tlb->EPN = 0x80000000 & TARGET_PAGE_MASK;
141 tlb->RPN = 0x80000000 & TARGET_PAGE_MASK;
142 tlb->PID = 0;
143}
144
145static void main_cpu_reset(void *opaque)
146{
147 PowerPCCPU *cpu = opaque;

--- 160 unchanged lines hidden ---