bonito.c (25cca0a9b789244f89b24ed628b0dd6b0a169acc) bonito.c (a0b544c1c95df240629964636479fc113086d57b)
1/*
2 * bonito north bridge support
3 *
4 * Copyright (c) 2008 yajin (yajin@vm-kernel.org)
5 * Copyright (c) 2010 Huacai Chen (zltjiangshi@gmail.com)
6 *
7 * This code is licensed under the GNU GPL v2.
8 *

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34 * fun_no [10:8]
35 * reg_no [7:2]
36 *
37 * so function bonito_sbridge_pciaddr for the translation from
38 * north bridge address to pci address.
39 */
40
41#include "qemu/osdep.h"
1/*
2 * bonito north bridge support
3 *
4 * Copyright (c) 2008 yajin (yajin@vm-kernel.org)
5 * Copyright (c) 2010 Huacai Chen (zltjiangshi@gmail.com)
6 *
7 * This code is licensed under the GNU GPL v2.
8 *

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34 * fun_no [10:8]
35 * reg_no [7:2]
36 *
37 * so function bonito_sbridge_pciaddr for the translation from
38 * north bridge address to pci address.
39 */
40
41#include "qemu/osdep.h"
42#include "qemu/units.h"
42#include "qemu/error-report.h"
43#include "hw/pci/pci.h"
44#include "hw/irq.h"
45#include "hw/mips/mips.h"
46#include "hw/pci/pci_host.h"
47#include "migration/vmstate.h"
48#include "sysemu/reset.h"
49#include "sysemu/runstate.h"

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77#define BONITO_PCILO_BASE 0x10000000
78#define BONITO_PCILO_BASE_VA 0xb0000000
79#define BONITO_PCILO_SIZE 0x0c000000
80#define BONITO_PCILO_TOP (BONITO_PCILO_BASE + BONITO_PCILO_SIZE - 1)
81#define BONITO_PCILO0_BASE 0x10000000
82#define BONITO_PCILO1_BASE 0x14000000
83#define BONITO_PCILO2_BASE 0x18000000
84#define BONITO_PCIHI_BASE 0x20000000
43#include "qemu/error-report.h"
44#include "hw/pci/pci.h"
45#include "hw/irq.h"
46#include "hw/mips/mips.h"
47#include "hw/pci/pci_host.h"
48#include "migration/vmstate.h"
49#include "sysemu/reset.h"
50#include "sysemu/runstate.h"

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78#define BONITO_PCILO_BASE 0x10000000
79#define BONITO_PCILO_BASE_VA 0xb0000000
80#define BONITO_PCILO_SIZE 0x0c000000
81#define BONITO_PCILO_TOP (BONITO_PCILO_BASE + BONITO_PCILO_SIZE - 1)
82#define BONITO_PCILO0_BASE 0x10000000
83#define BONITO_PCILO1_BASE 0x14000000
84#define BONITO_PCILO2_BASE 0x18000000
85#define BONITO_PCIHI_BASE 0x20000000
85#define BONITO_PCIHI_SIZE 0x20000000
86#define BONITO_PCIHI_SIZE 0x60000000
86#define BONITO_PCIHI_TOP (BONITO_PCIHI_BASE + BONITO_PCIHI_SIZE - 1)
87#define BONITO_PCIIO_BASE 0x1fd00000
88#define BONITO_PCIIO_BASE_VA 0xbfd00000
89#define BONITO_PCIIO_SIZE 0x00010000
90#define BONITO_PCIIO_TOP (BONITO_PCIIO_BASE + BONITO_PCIIO_SIZE - 1)
91#define BONITO_PCICFG_BASE 0x1fe80000
92#define BONITO_PCICFG_SIZE 0x00080000
93#define BONITO_PCICFG_TOP (BONITO_PCICFG_BASE + BONITO_PCICFG_SIZE - 1)

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600 VMSTATE_END_OF_LIST()
601 }
602};
603
604static void bonito_pcihost_realize(DeviceState *dev, Error **errp)
605{
606 PCIHostState *phb = PCI_HOST_BRIDGE(dev);
607 BonitoState *bs = BONITO_PCI_HOST_BRIDGE(dev);
87#define BONITO_PCIHI_TOP (BONITO_PCIHI_BASE + BONITO_PCIHI_SIZE - 1)
88#define BONITO_PCIIO_BASE 0x1fd00000
89#define BONITO_PCIIO_BASE_VA 0xbfd00000
90#define BONITO_PCIIO_SIZE 0x00010000
91#define BONITO_PCIIO_TOP (BONITO_PCIIO_BASE + BONITO_PCIIO_SIZE - 1)
92#define BONITO_PCICFG_BASE 0x1fe80000
93#define BONITO_PCICFG_SIZE 0x00080000
94#define BONITO_PCICFG_TOP (BONITO_PCICFG_BASE + BONITO_PCICFG_SIZE - 1)

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601 VMSTATE_END_OF_LIST()
602 }
603};
604
605static void bonito_pcihost_realize(DeviceState *dev, Error **errp)
606{
607 PCIHostState *phb = PCI_HOST_BRIDGE(dev);
608 BonitoState *bs = BONITO_PCI_HOST_BRIDGE(dev);
609 MemoryRegion *pcimem_lo_alias = g_new(MemoryRegion, 3);
608
610
609 memory_region_init(&bs->pci_mem, OBJECT(dev), "pci.mem", BONITO_PCILO_SIZE);
611 memory_region_init(&bs->pci_mem, OBJECT(dev), "pci.mem", BONITO_PCIHI_SIZE);
610 phb->bus = pci_register_root_bus(dev, "pci",
611 pci_bonito_set_irq, pci_bonito_map_irq,
612 dev, &bs->pci_mem, get_system_io(),
613 0x28, 32, TYPE_PCI_BUS);
612 phb->bus = pci_register_root_bus(dev, "pci",
613 pci_bonito_set_irq, pci_bonito_map_irq,
614 dev, &bs->pci_mem, get_system_io(),
615 0x28, 32, TYPE_PCI_BUS);
614 memory_region_add_subregion(get_system_memory(), BONITO_PCILO_BASE,
615 &bs->pci_mem);
616
617 for (size_t i = 0; i < 3; i++) {
618 char *name = g_strdup_printf("pci.lomem%zu", i);
619
620 memory_region_init_alias(&pcimem_lo_alias[i], NULL, name,
621 &bs->pci_mem, i * 64 * MiB, 64 * MiB);
622 memory_region_add_subregion(get_system_memory(),
623 BONITO_PCILO_BASE + i * 64 * MiB,
624 &pcimem_lo_alias[i]);
625 g_free(name);
626 }
627
628 create_unimplemented_device("pci.io", BONITO_PCIIO_BASE, 1 * MiB);
616}
617
618static void bonito_realize(PCIDevice *dev, Error **errp)
619{
620 PCIBonitoState *s = PCI_BONITO(dev);
621 SysBusDevice *sysbus = SYS_BUS_DEVICE(s->pcihost);
622 PCIHostState *phb = PCI_HOST_BRIDGE(s->pcihost);
629}
630
631static void bonito_realize(PCIDevice *dev, Error **errp)
632{
633 PCIBonitoState *s = PCI_BONITO(dev);
634 SysBusDevice *sysbus = SYS_BUS_DEVICE(s->pcihost);
635 PCIHostState *phb = PCI_HOST_BRIDGE(s->pcihost);
636 BonitoState *bs = BONITO_PCI_HOST_BRIDGE(s->pcihost);
637 MemoryRegion *pcimem_alias = g_new(MemoryRegion, 1);
623
624 /*
625 * Bonito North Bridge, built on FPGA,
626 * VENDOR_ID/DEVICE_ID are "undefined"
627 */
628 pci_config_set_prog_interface(dev->config, 0x00);
629
630 /* set the north bridge register mapping */

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647
648 create_unimplemented_device("bonito", BONITO_REG_BASE, BONITO_REG_SIZE);
649
650 memory_region_init_io(&s->iomem_ldma, OBJECT(s), &bonito_ldma_ops, s,
651 "ldma", 0x100);
652 sysbus_init_mmio(sysbus, &s->iomem_ldma);
653 sysbus_mmio_map(sysbus, 3, 0x1fe00200);
654
638
639 /*
640 * Bonito North Bridge, built on FPGA,
641 * VENDOR_ID/DEVICE_ID are "undefined"
642 */
643 pci_config_set_prog_interface(dev->config, 0x00);
644
645 /* set the north bridge register mapping */

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662
663 create_unimplemented_device("bonito", BONITO_REG_BASE, BONITO_REG_SIZE);
664
665 memory_region_init_io(&s->iomem_ldma, OBJECT(s), &bonito_ldma_ops, s,
666 "ldma", 0x100);
667 sysbus_init_mmio(sysbus, &s->iomem_ldma);
668 sysbus_mmio_map(sysbus, 3, 0x1fe00200);
669
670 /* PCI copier */
655 memory_region_init_io(&s->iomem_cop, OBJECT(s), &bonito_cop_ops, s,
656 "cop", 0x100);
657 sysbus_init_mmio(sysbus, &s->iomem_cop);
658 sysbus_mmio_map(sysbus, 4, 0x1fe00300);
659
660 /* Map PCI IO Space 0x1fd0 0000 - 0x1fd1 0000 */
661 memory_region_init_alias(&s->bonito_pciio, OBJECT(s), "isa_mmio",
662 get_system_io(), 0, BONITO_PCIIO_SIZE);
663 sysbus_init_mmio(sysbus, &s->bonito_pciio);
664 sysbus_mmio_map(sysbus, 5, BONITO_PCIIO_BASE);
665
666 /* add pci local io mapping */
667 memory_region_init_alias(&s->bonito_localio, OBJECT(s), "isa_mmio",
668 get_system_io(), 0, BONITO_DEV_SIZE);
669 sysbus_init_mmio(sysbus, &s->bonito_localio);
670 sysbus_mmio_map(sysbus, 6, BONITO_DEV_BASE);
671
671 memory_region_init_io(&s->iomem_cop, OBJECT(s), &bonito_cop_ops, s,
672 "cop", 0x100);
673 sysbus_init_mmio(sysbus, &s->iomem_cop);
674 sysbus_mmio_map(sysbus, 4, 0x1fe00300);
675
676 /* Map PCI IO Space 0x1fd0 0000 - 0x1fd1 0000 */
677 memory_region_init_alias(&s->bonito_pciio, OBJECT(s), "isa_mmio",
678 get_system_io(), 0, BONITO_PCIIO_SIZE);
679 sysbus_init_mmio(sysbus, &s->bonito_pciio);
680 sysbus_mmio_map(sysbus, 5, BONITO_PCIIO_BASE);
681
682 /* add pci local io mapping */
683 memory_region_init_alias(&s->bonito_localio, OBJECT(s), "isa_mmio",
684 get_system_io(), 0, BONITO_DEV_SIZE);
685 sysbus_init_mmio(sysbus, &s->bonito_localio);
686 sysbus_mmio_map(sysbus, 6, BONITO_DEV_BASE);
687
688 memory_region_init_alias(pcimem_alias, NULL, "pci.mem.alias",
689 &bs->pci_mem, 0, BONITO_PCIHI_SIZE);
690 memory_region_add_subregion(get_system_memory(),
691 BONITO_PCIHI_BASE, pcimem_alias);
692 create_unimplemented_device("PCI_2",
693 (hwaddr)BONITO_PCIHI_BASE + BONITO_PCIHI_SIZE,
694 2 * GiB);
695
672 /* set the default value of north bridge pci config */
673 pci_set_word(dev->config + PCI_COMMAND, 0x0000);
674 pci_set_word(dev->config + PCI_STATUS, 0x0000);
675 pci_set_word(dev->config + PCI_SUBSYSTEM_VENDOR_ID, 0x0000);
676 pci_set_word(dev->config + PCI_SUBSYSTEM_ID, 0x0000);
677
678 pci_set_byte(dev->config + PCI_INTERRUPT_LINE, 0x00);
679 pci_set_byte(dev->config + PCI_INTERRUPT_PIN, 0x01);

--- 80 unchanged lines hidden --- 		696 /* set the default value of north bridge pci config */
697 pci_set_word(dev->config + PCI_COMMAND, 0x0000);
698 pci_set_word(dev->config + PCI_STATUS, 0x0000);
699 pci_set_word(dev->config + PCI_SUBSYSTEM_VENDOR_ID, 0x0000);
700 pci_set_word(dev->config + PCI_SUBSYSTEM_ID, 0x0000);
701
702 pci_set_byte(dev->config + PCI_INTERRUPT_LINE, 0x00);
703 pci_set_byte(dev->config + PCI_INTERRUPT_PIN, 0x01);

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