ioh3420.c (47b5264eb3e1cd2825e48d28fd0d1b239ed53974) ioh3420.c (125ee0ed9cad04307498ac2b7b0d51ad8a807360)
1/*
2 * ioh3420.c
3 * Intel X58 north bridge IOH
4 * PCI Express root port device id 3420
5 *
6 * Copyright (c) 2010 Isaku Yamahata <yamahata at valinux co jp>
7 * VA Linux Systems Japan K.K.
8 *

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215 k->is_express = 1;
216 k->is_bridge = 1;
217 k->config_write = ioh3420_write_config;
218 k->init = ioh3420_initfn;
219 k->exit = ioh3420_exitfn;
220 k->vendor_id = PCI_VENDOR_ID_INTEL;
221 k->device_id = PCI_DEVICE_ID_IOH_EPORT;
222 k->revision = PCI_DEVICE_ID_IOH_REV;
1/*
2 * ioh3420.c
3 * Intel X58 north bridge IOH
4 * PCI Express root port device id 3420
5 *
6 * Copyright (c) 2010 Isaku Yamahata <yamahata at valinux co jp>
7 * VA Linux Systems Japan K.K.
8 *

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215 k->is_express = 1;
216 k->is_bridge = 1;
217 k->config_write = ioh3420_write_config;
218 k->init = ioh3420_initfn;
219 k->exit = ioh3420_exitfn;
220 k->vendor_id = PCI_VENDOR_ID_INTEL;
221 k->device_id = PCI_DEVICE_ID_IOH_EPORT;
222 k->revision = PCI_DEVICE_ID_IOH_REV;
223 set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
223 dc->desc = "Intel IOH device id 3420 PCIE Root Port";
224 dc->reset = ioh3420_reset;
225 dc->vmsd = &vmstate_ioh3420;
226 dc->props = ioh3420_properties;
227}
228
229static const TypeInfo ioh3420_info = {
230 .name = "ioh3420",

--- 20 unchanged lines hidden --- 		224 dc->desc = "Intel IOH device id 3420 PCIE Root Port";
225 dc->reset = ioh3420_reset;
226 dc->vmsd = &vmstate_ioh3420;
227 dc->props = ioh3420_properties;
228}
229
230static const TypeInfo ioh3420_info = {
231 .name = "ioh3420",

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