| trace-events (99f48ae7aea70fb080f04bf1cc846cd6450bd11a) | trace-events (1e9c685ec76e3b10de29c4ac7ad02d86cb5aeff1) |
|---|---|
| 1# successful events 2pci_nvme_irq_msix(uint32_t vector) "raising MSI-X IRQ vector %u" 3pci_nvme_irq_pin(void) "pulsing IRQ pin" 4pci_nvme_irq_masked(void) "IRQ is masked" 5pci_nvme_dma_read(uint64_t prp1, uint64_t prp2) "DMA read, prp1=0x%"PRIx64" prp2=0x%"PRIx64"" 6pci_nvme_map_addr(uint64_t addr, uint64_t len) "addr 0x%"PRIx64" len %"PRIu64"" 7pci_nvme_map_addr_cmb(uint64_t addr, uint64_t len) "addr 0x%"PRIx64" len %"PRIu64"" 8pci_nvme_map_prp(uint64_t trans_len, uint32_t len, uint64_t prp1, uint64_t prp2, int num_prps) "trans_len %"PRIu64" len %"PRIu32" prp1 0x%"PRIx64" prp2 0x%"PRIx64" num_prps %d" --- 96 unchanged lines hidden (view full) --- 105pci_nvme_reset_zone(uint64_t slba, uint32_t zone_idx, int all) "reset zone, slba=%"PRIu64", idx=%"PRIu32", all=%"PRIi32"" 106pci_nvme_zns_zone_reset(uint64_t zslba) "zslba 0x%"PRIx64"" 107pci_nvme_offline_zone(uint64_t slba, uint32_t zone_idx, int all) "offline zone, slba=%"PRIu64", idx=%"PRIu32", all=%"PRIi32"" 108pci_nvme_set_descriptor_extension(uint64_t slba, uint32_t zone_idx) "set zone descriptor extension, slba=%"PRIu64", idx=%"PRIu32"" 109pci_nvme_zd_extension_set(uint32_t zone_idx) "set descriptor extension for zone_idx=%"PRIu32"" 110pci_nvme_clear_ns_close(uint32_t state, uint64_t slba) "zone state=%"PRIu32", slba=%"PRIu64" transitioned to Closed state" 111pci_nvme_clear_ns_reset(uint32_t state, uint64_t slba) "zone state=%"PRIu32", slba=%"PRIu64" transitioned to Empty state" 112pci_nvme_zoned_zrwa_implicit_flush(uint64_t zslba, uint32_t nlb) "zslba 0x%"PRIx64" nlb %"PRIu32"" | 1# successful events 2pci_nvme_irq_msix(uint32_t vector) "raising MSI-X IRQ vector %u" 3pci_nvme_irq_pin(void) "pulsing IRQ pin" 4pci_nvme_irq_masked(void) "IRQ is masked" 5pci_nvme_dma_read(uint64_t prp1, uint64_t prp2) "DMA read, prp1=0x%"PRIx64" prp2=0x%"PRIx64"" 6pci_nvme_map_addr(uint64_t addr, uint64_t len) "addr 0x%"PRIx64" len %"PRIu64"" 7pci_nvme_map_addr_cmb(uint64_t addr, uint64_t len) "addr 0x%"PRIx64" len %"PRIu64"" 8pci_nvme_map_prp(uint64_t trans_len, uint32_t len, uint64_t prp1, uint64_t prp2, int num_prps) "trans_len %"PRIu64" len %"PRIu32" prp1 0x%"PRIx64" prp2 0x%"PRIx64" num_prps %d" --- 96 unchanged lines hidden (view full) --- 105pci_nvme_reset_zone(uint64_t slba, uint32_t zone_idx, int all) "reset zone, slba=%"PRIu64", idx=%"PRIu32", all=%"PRIi32"" 106pci_nvme_zns_zone_reset(uint64_t zslba) "zslba 0x%"PRIx64"" 107pci_nvme_offline_zone(uint64_t slba, uint32_t zone_idx, int all) "offline zone, slba=%"PRIu64", idx=%"PRIu32", all=%"PRIi32"" 108pci_nvme_set_descriptor_extension(uint64_t slba, uint32_t zone_idx) "set zone descriptor extension, slba=%"PRIu64", idx=%"PRIu32"" 109pci_nvme_zd_extension_set(uint32_t zone_idx) "set descriptor extension for zone_idx=%"PRIu32"" 110pci_nvme_clear_ns_close(uint32_t state, uint64_t slba) "zone state=%"PRIu32", slba=%"PRIu64" transitioned to Closed state" 111pci_nvme_clear_ns_reset(uint32_t state, uint64_t slba) "zone state=%"PRIu32", slba=%"PRIu64" transitioned to Empty state" 112pci_nvme_zoned_zrwa_implicit_flush(uint64_t zslba, uint32_t nlb) "zslba 0x%"PRIx64" nlb %"PRIu32"" |
| 113pci_nvme_pci_reset(void) "PCI Function Level Reset" |
|
| 113 114# error conditions 115pci_nvme_err_mdts(size_t len) "len %zu" 116pci_nvme_err_zasl(size_t len) "len %zu" 117pci_nvme_err_req_status(uint16_t cid, uint32_t nsid, uint16_t status, uint8_t opc) "cid %"PRIu16" nsid %"PRIu32" status 0x%"PRIx16" opc 0x%"PRIx8"" 118pci_nvme_err_addr_read(uint64_t addr) "addr 0x%"PRIx64"" 119pci_nvme_err_addr_write(uint64_t addr) "addr 0x%"PRIx64"" 120pci_nvme_err_cfs(void) "controller fatal status" --- 87 unchanged lines hidden --- | 114 115# error conditions 116pci_nvme_err_mdts(size_t len) "len %zu" 117pci_nvme_err_zasl(size_t len) "len %zu" 118pci_nvme_err_req_status(uint16_t cid, uint32_t nsid, uint16_t status, uint8_t opc) "cid %"PRIu16" nsid %"PRIu32" status 0x%"PRIx16" opc 0x%"PRIx8"" 119pci_nvme_err_addr_read(uint64_t addr) "addr 0x%"PRIx64"" 120pci_nvme_err_addr_write(uint64_t addr) "addr 0x%"PRIx64"" 121pci_nvme_err_cfs(void) "controller fatal status" --- 87 unchanged lines hidden --- |