| igb_regs.h (1c4e67a5be1fd89bd2c919799b2eb1478142848a) | igb_regs.h (560cf339b2a50bfb6bbeb53801065119e03118f3) |
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| 1/* SPDX-License-Identifier: GPL-2.0 */ 2/* 3 * This is copied + edited from kernel header files in 4 * drivers/net/ethernet/intel/igb 5 */ 6 7#ifndef HW_IGB_REGS_H_ 8#define HW_IGB_REGS_H_ --- 438 unchanged lines hidden (view full) --- 447 448/* from igbvf/defines.h */ 449 450/* SRRCTL bit definitions */ 451#define E1000_SRRCTL_BSIZEPKT_SHIFT 10 /* Shift _right_ */ 452#define E1000_SRRCTL_BSIZEHDRSIZE_MASK 0x00000F00 453#define E1000_SRRCTL_BSIZEHDRSIZE_SHIFT 2 /* Shift _left_ */ 454#define E1000_SRRCTL_DESCTYPE_ADV_ONEBUF 0x02000000 | 1/* SPDX-License-Identifier: GPL-2.0 */ 2/* 3 * This is copied + edited from kernel header files in 4 * drivers/net/ethernet/intel/igb 5 */ 6 7#ifndef HW_IGB_REGS_H_ 8#define HW_IGB_REGS_H_ --- 438 unchanged lines hidden (view full) --- 447 448/* from igbvf/defines.h */ 449 450/* SRRCTL bit definitions */ 451#define E1000_SRRCTL_BSIZEPKT_SHIFT 10 /* Shift _right_ */ 452#define E1000_SRRCTL_BSIZEHDRSIZE_MASK 0x00000F00 453#define E1000_SRRCTL_BSIZEHDRSIZE_SHIFT 2 /* Shift _left_ */ 454#define E1000_SRRCTL_DESCTYPE_ADV_ONEBUF 0x02000000 |
| 455#define E1000_SRRCTL_DESCTYPE_HDR_SPLIT 0x04000000 |
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| 455#define E1000_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS 0x0A000000 456#define E1000_SRRCTL_DESCTYPE_MASK 0x0E000000 457#define E1000_SRRCTL_DROP_EN 0x80000000 458 459#define E1000_SRRCTL_BSIZEPKT_MASK 0x0000007F 460#define E1000_SRRCTL_BSIZEHDR_MASK 0x00003F00 461 462/* from igbvf/mbox.h */ --- 231 unchanged lines hidden (view full) --- 694 695#define E1000_ADVRXD_PKT_IP4 BIT(0) 696#define E1000_ADVRXD_PKT_IP6 BIT(2) 697#define E1000_ADVRXD_PKT_IP6E BIT(3) 698#define E1000_ADVRXD_PKT_TCP BIT(4) 699#define E1000_ADVRXD_PKT_UDP BIT(5) 700#define E1000_ADVRXD_PKT_SCTP BIT(6) 701 | 456#define E1000_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS 0x0A000000 457#define E1000_SRRCTL_DESCTYPE_MASK 0x0E000000 458#define E1000_SRRCTL_DROP_EN 0x80000000 459 460#define E1000_SRRCTL_BSIZEPKT_MASK 0x0000007F 461#define E1000_SRRCTL_BSIZEHDR_MASK 0x00003F00 462 463/* from igbvf/mbox.h */ --- 231 unchanged lines hidden (view full) --- 695 696#define E1000_ADVRXD_PKT_IP4 BIT(0) 697#define E1000_ADVRXD_PKT_IP6 BIT(2) 698#define E1000_ADVRXD_PKT_IP6E BIT(3) 699#define E1000_ADVRXD_PKT_TCP BIT(4) 700#define E1000_ADVRXD_PKT_UDP BIT(5) 701#define E1000_ADVRXD_PKT_SCTP BIT(6) 702 |
| 703#define IGB_MAX_PS_BUFFERS 2 704 705#define E1000_ADVRXD_HDR_LEN_OFFSET (21 - 16) 706#define E1000_ADVRXD_ADV_HDR_LEN_MASK ((BIT(10) - 1) << \ 707 E1000_ADVRXD_HDR_LEN_OFFSET) 708#define E1000_ADVRXD_HDR_SPH BIT(15) 709#define E1000_ADVRXD_ST_ERR_HBO_OFFSET BIT(3 + 20) 710 |
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| 702static inline uint8_t igb_ivar_entry_rx(uint8_t i) 703{ 704 return i < 8 ? i * 4 : (i - 8) * 4 + 2; 705} 706 707static inline uint8_t igb_ivar_entry_tx(uint8_t i) 708{ 709 return i < 8 ? i * 4 + 1 : (i - 8) * 4 + 3; 710} 711 712#endif | 711static inline uint8_t igb_ivar_entry_rx(uint8_t i) 712{ 713 return i < 8 ? i * 4 : (i - 8) * 4 + 2; 714} 715 716static inline uint8_t igb_ivar_entry_tx(uint8_t i) 717{ 718 return i < 8 ? i * 4 + 1 : (i - 8) * 4 + 3; 719} 720 721#endif |