e1000.c (daf6b59be8c703264765a533bc63421caef95225) e1000.c (1001cf45a7ca22d990e19a81029319ca763cad4f)
1/*
2 * QEMU e1000 emulation
3 *
4 * Software developer's manual:
5 * http://download.intel.com/design/network/manuals/8254x_GBe_SDM.pdf
6 *
7 * Nir Peleg, Tutis Systems Ltd. for Qumranet Inc.
8 * Copyright (c) 2008 Qumranet

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31#include "net/net.h"
32#include "net/checksum.h"
33#include "sysemu/sysemu.h"
34#include "sysemu/dma.h"
35#include "qemu/iov.h"
36#include "qemu/range.h"
37
38#include "e1000x_common.h"
1/*
2 * QEMU e1000 emulation
3 *
4 * Software developer's manual:
5 * http://download.intel.com/design/network/manuals/8254x_GBe_SDM.pdf
6 *
7 * Nir Peleg, Tutis Systems Ltd. for Qumranet Inc.
8 * Copyright (c) 2008 Qumranet

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31#include "net/net.h"
32#include "net/checksum.h"
33#include "sysemu/sysemu.h"
34#include "sysemu/dma.h"
35#include "qemu/iov.h"
36#include "qemu/range.h"
37
38#include "e1000x_common.h"
39#include "trace.h"
39
40static const uint8_t bcast[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
41
42/* #define E1000_DEBUG */
43
44#ifdef E1000_DEBUG
45enum {
46 DEBUG_GENERAL, DEBUG_IO, DEBUG_MMIO, DEBUG_INTERRUPT,

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842static uint64_t rx_desc_base(E1000State *s)
843{
844 uint64_t bah = s->mac_reg[RDBAH];
845 uint64_t bal = s->mac_reg[RDBAL] & ~0xf;
846
847 return (bah << 32) + bal;
848}
849
40
41static const uint8_t bcast[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
42
43/* #define E1000_DEBUG */
44
45#ifdef E1000_DEBUG
46enum {
47 DEBUG_GENERAL, DEBUG_IO, DEBUG_MMIO, DEBUG_INTERRUPT,

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843static uint64_t rx_desc_base(E1000State *s)
844{
845 uint64_t bah = s->mac_reg[RDBAH];
846 uint64_t bal = s->mac_reg[RDBAL] & ~0xf;
847
848 return (bah << 32) + bal;
849}
850
851static void
852e1000_receiver_overrun(E1000State *s, size_t size)
853{
854 trace_e1000_receiver_overrun(size, s->mac_reg[RDH], s->mac_reg[RDT]);
855 e1000x_inc_reg_if_not_full(s->mac_reg, RNBC);
856 e1000x_inc_reg_if_not_full(s->mac_reg, MPC);
857 set_ics(s, 0, E1000_ICS_RXO);
858}
859
850static ssize_t
851e1000_receive_iov(NetClientState *nc, const struct iovec *iov, int iovcnt)
852{
853 E1000State *s = qemu_get_nic_opaque(nc);
854 PCIDevice *d = PCI_DEVICE(s);
855 struct e1000_rx_desc desc;
856 dma_addr_t base;
857 unsigned int n, rdt;

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911 vlan_status = E1000_RXD_STAT_VP;
912 size -= 4;
913 }
914
915 rdh_start = s->mac_reg[RDH];
916 desc_offset = 0;
917 total_size = size + e1000x_fcs_len(s->mac_reg);
918 if (!e1000_has_rxbufs(s, total_size)) {
860static ssize_t
861e1000_receive_iov(NetClientState *nc, const struct iovec *iov, int iovcnt)
862{
863 E1000State *s = qemu_get_nic_opaque(nc);
864 PCIDevice *d = PCI_DEVICE(s);
865 struct e1000_rx_desc desc;
866 dma_addr_t base;
867 unsigned int n, rdt;

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921 vlan_status = E1000_RXD_STAT_VP;
922 size -= 4;
923 }
924
925 rdh_start = s->mac_reg[RDH];
926 desc_offset = 0;
927 total_size = size + e1000x_fcs_len(s->mac_reg);
928 if (!e1000_has_rxbufs(s, total_size)) {
919 set_ics(s, 0, E1000_ICS_RXO);
920 return -1;
929 e1000_receiver_overrun(s, total_size);
930 return -1;
921 }
922 do {
923 desc_size = total_size - desc_offset;
924 if (desc_size > s->rxbuf_size) {
925 desc_size = s->rxbuf_size;
926 }
927 base = rx_desc_base(s) + sizeof(desc) * s->mac_reg[RDH];
928 pci_dma_read(d, base, &desc, sizeof(desc));

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964
965 if (++s->mac_reg[RDH] * sizeof(desc) >= s->mac_reg[RDLEN])
966 s->mac_reg[RDH] = 0;
967 /* see comment in start_xmit; same here */
968 if (s->mac_reg[RDH] == rdh_start ||
969 rdh_start >= s->mac_reg[RDLEN] / sizeof(desc)) {
970 DBGOUT(RXERR, "RDH wraparound @%x, RDT %x, RDLEN %x\n",
971 rdh_start, s->mac_reg[RDT], s->mac_reg[RDLEN]);
931 }
932 do {
933 desc_size = total_size - desc_offset;
934 if (desc_size > s->rxbuf_size) {
935 desc_size = s->rxbuf_size;
936 }
937 base = rx_desc_base(s) + sizeof(desc) * s->mac_reg[RDH];
938 pci_dma_read(d, base, &desc, sizeof(desc));

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974
975 if (++s->mac_reg[RDH] * sizeof(desc) >= s->mac_reg[RDLEN])
976 s->mac_reg[RDH] = 0;
977 /* see comment in start_xmit; same here */
978 if (s->mac_reg[RDH] == rdh_start ||
979 rdh_start >= s->mac_reg[RDLEN] / sizeof(desc)) {
980 DBGOUT(RXERR, "RDH wraparound @%x, RDT %x, RDLEN %x\n",
981 rdh_start, s->mac_reg[RDT], s->mac_reg[RDLEN]);
972 set_ics(s, 0, E1000_ICS_RXO);
982 e1000_receiver_overrun(s, total_size);
973 return -1;
974 }
975 } while (desc_offset < total_size);
976
977 e1000x_update_rx_total_stats(s->mac_reg, size, total_size);
978
979 n = E1000_ICS_RXT0;
980 if ((rdt = s->mac_reg[RDT]) < s->mac_reg[RDH])

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984 }
985 } while (desc_offset < total_size);
986
987 e1000x_update_rx_total_stats(s->mac_reg, size, total_size);
988
989 n = E1000_ICS_RXT0;
990 if ((rdt = s->mac_reg[RDT]) < s->mac_reg[RDH])

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