arm_l2x0.c (0d1c9782a1ec965933091f7d7ef1472a15048760) arm_l2x0.c (03dd024ff57733a55cd2e455f361d053c81b1b29)
1/*
2 * ARM dummy L210, L220, PL310 cache controller.
3 *
4 * Copyright (c) 2010-2012 Calxeda
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2 or any later version, as published by the Free Software

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15 *
16 * You should have received a copy of the GNU General Public License along with
17 * this program. If not, see <http://www.gnu.org/licenses/>.
18 *
19 */
20
21#include "qemu/osdep.h"
22#include "hw/sysbus.h"
1/*
2 * ARM dummy L210, L220, PL310 cache controller.
3 *
4 * Copyright (c) 2010-2012 Calxeda
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2 or any later version, as published by the Free Software

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15 *
16 * You should have received a copy of the GNU General Public License along with
17 * this program. If not, see <http://www.gnu.org/licenses/>.
18 *
19 */
20
21#include "qemu/osdep.h"
22#include "hw/sysbus.h"
23#include "qemu/log.h"
23
24/* L2C-310 r3p2 */
25#define CACHE_ID 0x410000c8
26
27#define TYPE_ARM_L2X0 "l2x0"
28#define ARM_L2X0(obj) OBJECT_CHECK(L2x0State, (obj), TYPE_ARM_L2X0)
29
30typedef struct L2x0State {

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25/* L2C-310 r3p2 */
26#define CACHE_ID 0x410000c8
27
28#define TYPE_ARM_L2X0 "l2x0"
29#define ARM_L2X0(obj) OBJECT_CHECK(L2x0State, (obj), TYPE_ARM_L2X0)
30
31typedef struct L2x0State {

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