xics.c (760df0d121a836dcbf3726b80b820115aef21b30) xics.c (9ae1329ee2fee95f201ca219090d7c742eaf6a90)
1/*
2 * QEMU PowerPC pSeries Logical Partition (aka sPAPR) hardware System Emulator
3 *
4 * PAPR Virtualized Interrupt System, aka ICS/ICP aka xics
5 *
6 * Copyright (c) 2010,2011 David Gibson, IBM Corporation.
7 *
8 * Permission is hereby granted, free of charge, to any person obtaining a copy

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212 if (ics) {
213 ics_eoi(ics, irq);
214 }
215 if (!XISR(icp)) {
216 icp_resend(icp);
217 }
218}
219
1/*
2 * QEMU PowerPC pSeries Logical Partition (aka sPAPR) hardware System Emulator
3 *
4 * PAPR Virtualized Interrupt System, aka ICS/ICP aka xics
5 *
6 * Copyright (c) 2010,2011 David Gibson, IBM Corporation.
7 *
8 * Permission is hereby granted, free of charge, to any person obtaining a copy

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212 if (ics) {
213 ics_eoi(ics, irq);
214 }
215 if (!XISR(icp)) {
216 icp_resend(icp);
217 }
218}
219
220static void icp_irq(ICSState *ics, int server, int nr, uint8_t priority)
220void icp_irq(ICSState *ics, int server, int nr, uint8_t priority)
221{
222 ICPState *icp = xics_icp_get(ics->xics, server);
223
224 trace_xics_icp_irq(server, nr, priority);
225
226 if ((priority >= CPPR(icp))
227 || (XISR(icp) && (icp->pending_priority <= priority))) {
228 ics_reject(ics, nr);

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507 ics_write_xive_lsi(ics, srcno);
508 } else {
509 ics_write_xive_msi(ics, srcno);
510 }
511}
512
513static void ics_reject(ICSState *ics, uint32_t nr)
514{
221{
222 ICPState *icp = xics_icp_get(ics->xics, server);
223
224 trace_xics_icp_irq(server, nr, priority);
225
226 if ((priority >= CPPR(icp))
227 || (XISR(icp) && (icp->pending_priority <= priority))) {
228 ics_reject(ics, nr);

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507 ics_write_xive_lsi(ics, srcno);
508 } else {
509 ics_write_xive_msi(ics, srcno);
510 }
511}
512
513static void ics_reject(ICSState *ics, uint32_t nr)
514{
515 ICSStateClass *isc = ICS_GET_CLASS(ics);
515 ICSIRQState *irq = ics->irqs + nr - ics->offset;
516
516 ICSIRQState *irq = ics->irqs + nr - ics->offset;
517
518 if (isc->reject) {
519 isc->reject(ics, nr);
520 return;
521 }
522
517 trace_xics_ics_reject(nr, nr - ics->offset);
518 if (irq->flags & XICS_FLAGS_IRQ_MSI) {
519 irq->status |= XICS_STATUS_REJECTED;
520 } else if (irq->flags & XICS_FLAGS_IRQ_LSI) {
521 irq->status &= ~XICS_STATUS_SENT;
522 }
523}
524
525void ics_resend(ICSState *ics)
526{
523 trace_xics_ics_reject(nr, nr - ics->offset);
524 if (irq->flags & XICS_FLAGS_IRQ_MSI) {
525 irq->status |= XICS_STATUS_REJECTED;
526 } else if (irq->flags & XICS_FLAGS_IRQ_LSI) {
527 irq->status &= ~XICS_STATUS_SENT;
528 }
529}
530
531void ics_resend(ICSState *ics)
532{
533 ICSStateClass *isc = ICS_GET_CLASS(ics);
527 int i;
528
534 int i;
535
536 if (isc->resend) {
537 isc->resend(ics);
538 return;
539 }
540
529 for (i = 0; i < ics->nr_irqs; i++) {
530 /* FIXME: filter by server#? */
531 if (ics->irqs[i].flags & XICS_FLAGS_IRQ_LSI) {
532 ics_resend_lsi(ics, i);
533 } else {
534 ics_resend_msi(ics, i);
535 }
536 }

--- 207 unchanged lines hidden --- 		541 for (i = 0; i < ics->nr_irqs; i++) {
542 /* FIXME: filter by server#? */
543 if (ics->irqs[i].flags & XICS_FLAGS_IRQ_LSI) {
544 ics_resend_lsi(ics, i);
545 } else {
546 ics_resend_msi(ics, i);
547 }
548 }

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