openpic_kvm.c (c090c10dc4b85a9aa82277994576715ec2af1ed4) openpic_kvm.c (af354f19a9b6a655eac1c49b66d3be021e7ed3d9)
1/*
2 * KVM in-kernel OpenPIC
3 *
4 * Copyright 2013 Freescale Semiconductor, Inc.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights

--- 17 unchanged lines hidden (view full) ---

26#include "exec/address-spaces.h"
27#include "hw/hw.h"
28#include "hw/ppc/openpic.h"
29#include "hw/pci/msi.h"
30#include "hw/sysbus.h"
31#include "sysemu/kvm.h"
32#include "qemu/log.h"
33
1/*
2 * KVM in-kernel OpenPIC
3 *
4 * Copyright 2013 Freescale Semiconductor, Inc.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights

--- 17 unchanged lines hidden (view full) ---

26#include "exec/address-spaces.h"
27#include "hw/hw.h"
28#include "hw/ppc/openpic.h"
29#include "hw/pci/msi.h"
30#include "hw/sysbus.h"
31#include "sysemu/kvm.h"
32#include "qemu/log.h"
33
34#define GCR_RESET 0x80000000
35
34#define KVM_OPENPIC(obj) \
35 OBJECT_CHECK(KVMOpenPICState, (obj), TYPE_KVM_OPENPIC)
36
37typedef struct KVMOpenPICState {
38 /*< private >*/
39 SysBusDevice parent_obj;
40 /*< public >*/
41
42 MemoryRegion mem;
43 MemoryListener mem_listener;
44 uint32_t fd;
45 uint32_t model;
46} KVMOpenPICState;
47
48static void kvm_openpic_set_irq(void *opaque, int n_IRQ, int level)
49{
50 kvm_set_irq(kvm_state, n_IRQ, level);
51}
52
36#define KVM_OPENPIC(obj) \
37 OBJECT_CHECK(KVMOpenPICState, (obj), TYPE_KVM_OPENPIC)
38
39typedef struct KVMOpenPICState {
40 /*< private >*/
41 SysBusDevice parent_obj;
42 /*< public >*/
43
44 MemoryRegion mem;
45 MemoryListener mem_listener;
46 uint32_t fd;
47 uint32_t model;
48} KVMOpenPICState;
49
50static void kvm_openpic_set_irq(void *opaque, int n_IRQ, int level)
51{
52 kvm_set_irq(kvm_state, n_IRQ, level);
53}
54
53static void kvm_openpic_reset(DeviceState *d)
54{
55 qemu_log_mask(LOG_UNIMP, "%s: unimplemented\n", __func__);
56}
57
58static void kvm_openpic_write(void *opaque, hwaddr addr, uint64_t val,
59 unsigned size)
60{
61 KVMOpenPICState *opp = opaque;
62 struct kvm_device_attr attr;
63 uint32_t val32 = val;
64 int ret;
65
66 attr.group = KVM_DEV_MPIC_GRP_REGISTER;
67 attr.attr = addr;
68 attr.addr = (uint64_t)(unsigned long)&val32;
69
70 ret = ioctl(opp->fd, KVM_SET_DEVICE_ATTR, &attr);
71 if (ret < 0) {
72 qemu_log_mask(LOG_UNIMP, "%s: %s %" PRIx64 "\n", __func__,
73 strerror(errno), attr.attr);
74 }
75}
76
55static void kvm_openpic_write(void *opaque, hwaddr addr, uint64_t val,
56 unsigned size)
57{
58 KVMOpenPICState *opp = opaque;
59 struct kvm_device_attr attr;
60 uint32_t val32 = val;
61 int ret;
62
63 attr.group = KVM_DEV_MPIC_GRP_REGISTER;
64 attr.attr = addr;
65 attr.addr = (uint64_t)(unsigned long)&val32;
66
67 ret = ioctl(opp->fd, KVM_SET_DEVICE_ATTR, &attr);
68 if (ret < 0) {
69 qemu_log_mask(LOG_UNIMP, "%s: %s %" PRIx64 "\n", __func__,
70 strerror(errno), attr.attr);
71 }
72}
73
74static void kvm_openpic_reset(DeviceState *d)
75{
76 KVMOpenPICState *opp = KVM_OPENPIC(d);
77
78 /* Trigger the GCR.RESET bit to reset the PIC */
79 kvm_openpic_write(opp, 0x1020, GCR_RESET, sizeof(uint32_t));
80}
81
77static uint64_t kvm_openpic_read(void *opaque, hwaddr addr, unsigned size)
78{
79 KVMOpenPICState *opp = opaque;
80 struct kvm_device_attr attr;
81 uint32_t val = 0xdeadbeef;
82 int ret;
83
84 attr.group = KVM_DEV_MPIC_GRP_REGISTER;

--- 186 unchanged lines hidden --- 		82static uint64_t kvm_openpic_read(void *opaque, hwaddr addr, unsigned size)
83{
84 KVMOpenPICState *opp = opaque;
85 struct kvm_device_attr attr;
86 uint32_t val = 0xdeadbeef;
87 int ret;
88
89 attr.group = KVM_DEV_MPIC_GRP_REGISTER;

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