bcm2835_ic.c (c964b660223308150bb72c627b320c79372c7128) bcm2835_ic.c (03dd024ff57733a55cd2e455f361d053c81b1b29)
1/*
2 * Raspberry Pi emulation (c) 2012 Gregory Estrade
3 * Refactoring for Pi2 Copyright (c) 2015, Microsoft. Written by Andrew Baumann.
4 * This code is licensed under the GNU GPLv2 and later.
5 * Heavily based on pl190.c, copyright terms below:
6 *
7 * Arm PrimeCell PL190 Vector Interrupt Controller
8 *
9 * Copyright (c) 2006 CodeSourcery.
10 * Written by Paul Brook
11 *
12 * This code is licensed under the GPL.
13 */
14
15#include "qemu/osdep.h"
16#include "hw/intc/bcm2835_ic.h"
1/*
2 * Raspberry Pi emulation (c) 2012 Gregory Estrade
3 * Refactoring for Pi2 Copyright (c) 2015, Microsoft. Written by Andrew Baumann.
4 * This code is licensed under the GNU GPLv2 and later.
5 * Heavily based on pl190.c, copyright terms below:
6 *
7 * Arm PrimeCell PL190 Vector Interrupt Controller
8 *
9 * Copyright (c) 2006 CodeSourcery.
10 * Written by Paul Brook
11 *
12 * This code is licensed under the GPL.
13 */
14
15#include "qemu/osdep.h"
16#include "hw/intc/bcm2835_ic.h"
17#include "qemu/log.h"
17
18#define GPU_IRQS 64
19#define ARM_IRQS 8
20
21#define IRQ_PENDING_BASIC 0x00 /* IRQ basic pending */
22#define IRQ_PENDING_1 0x04 /* IRQ pending 1 */
23#define IRQ_PENDING_2 0x08 /* IRQ pending 2 */
24#define FIQ_CONTROL 0x0C /* FIQ register */

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18
19#define GPU_IRQS 64
20#define ARM_IRQS 8
21
22#define IRQ_PENDING_BASIC 0x00 /* IRQ basic pending */
23#define IRQ_PENDING_1 0x04 /* IRQ pending 1 */
24#define IRQ_PENDING_2 0x08 /* IRQ pending 2 */
25#define FIQ_CONTROL 0x0C /* FIQ register */

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