pl050.c (c3ab4c9cf24ec9efb9c6d82b6027c0587d3081fa) pl050.c (e607f25a620e769cb6a231314aa13804723ab734)
1/*
2 * Arm PrimeCell PL050 Keyboard / Mouse Interface
3 *
4 * Copyright (c) 2006-2007 CodeSourcery.
5 * Written by Paul Brook
6 *
7 * This code is licensed under the GPL.
8 */
9
10#include "hw/sysbus.h"
11#include "hw/input/ps2.h"
12
1/*
2 * Arm PrimeCell PL050 Keyboard / Mouse Interface
3 *
4 * Copyright (c) 2006-2007 CodeSourcery.
5 * Written by Paul Brook
6 *
7 * This code is licensed under the GPL.
8 */
9
10#include "hw/sysbus.h"
11#include "hw/input/ps2.h"
12
13typedef struct {
13typedef struct PL050State {
14 SysBusDevice busdev;
15 MemoryRegion iomem;
16 void *dev;
17 uint32_t cr;
18 uint32_t clk;
19 uint32_t last;
20 int pending;
21 qemu_irq irq;
22 int is_mouse;
14 SysBusDevice busdev;
15 MemoryRegion iomem;
16 void *dev;
17 uint32_t cr;
18 uint32_t clk;
19 uint32_t last;
20 int pending;
21 qemu_irq irq;
22 int is_mouse;
23} pl050_state;
23} PL050State;
24
25static const VMStateDescription vmstate_pl050 = {
26 .name = "pl050",
27 .version_id = 2,
28 .minimum_version_id = 2,
29 .fields = (VMStateField[]) {
24
25static const VMStateDescription vmstate_pl050 = {
26 .name = "pl050",
27 .version_id = 2,
28 .minimum_version_id = 2,
29 .fields = (VMStateField[]) {
30 VMSTATE_UINT32(cr, pl050_state),
31 VMSTATE_UINT32(clk, pl050_state),
32 VMSTATE_UINT32(last, pl050_state),
33 VMSTATE_INT32(pending, pl050_state),
30 VMSTATE_UINT32(cr, PL050State),
31 VMSTATE_UINT32(clk, PL050State),
32 VMSTATE_UINT32(last, PL050State),
33 VMSTATE_INT32(pending, PL050State),
34 VMSTATE_END_OF_LIST()
35 }
36};
37
38#define PL050_TXEMPTY (1 << 6)
39#define PL050_TXBUSY (1 << 5)
40#define PL050_RXFULL (1 << 4)
41#define PL050_RXBUSY (1 << 3)
42#define PL050_RXPARITY (1 << 2)
43#define PL050_KMIC (1 << 1)
44#define PL050_KMID (1 << 0)
45
46static const unsigned char pl050_id[] =
47{ 0x50, 0x10, 0x04, 0x00, 0x0d, 0xf0, 0x05, 0xb1 };
48
49static void pl050_update(void *opaque, int level)
50{
34 VMSTATE_END_OF_LIST()
35 }
36};
37
38#define PL050_TXEMPTY (1 << 6)
39#define PL050_TXBUSY (1 << 5)
40#define PL050_RXFULL (1 << 4)
41#define PL050_RXBUSY (1 << 3)
42#define PL050_RXPARITY (1 << 2)
43#define PL050_KMIC (1 << 1)
44#define PL050_KMID (1 << 0)
45
46static const unsigned char pl050_id[] =
47{ 0x50, 0x10, 0x04, 0x00, 0x0d, 0xf0, 0x05, 0xb1 };
48
49static void pl050_update(void *opaque, int level)
50{
51 pl050_state *s = (pl050_state *)opaque;
51 PL050State *s = (PL050State *)opaque;
52 int raise;
53
54 s->pending = level;
55 raise = (s->pending && (s->cr & 0x10) != 0)
56 || (s->cr & 0x08) != 0;
57 qemu_set_irq(s->irq, raise);
58}
59
60static uint64_t pl050_read(void *opaque, hwaddr offset,
61 unsigned size)
62{
52 int raise;
53
54 s->pending = level;
55 raise = (s->pending && (s->cr & 0x10) != 0)
56 || (s->cr & 0x08) != 0;
57 qemu_set_irq(s->irq, raise);
58}
59
60static uint64_t pl050_read(void *opaque, hwaddr offset,
61 unsigned size)
62{
63 pl050_state *s = (pl050_state *)opaque;
63 PL050State *s = (PL050State *)opaque;
64 if (offset >= 0xfe0 && offset < 0x1000)
65 return pl050_id[(offset - 0xfe0) >> 2];
66
67 switch (offset >> 2) {
68 case 0: /* KMICR */
69 return s->cr;
70 case 1: /* KMISTAT */
71 {

--- 26 unchanged lines hidden (view full) ---

98 "pl050_read: Bad offset %x\n", (int)offset);
99 return 0;
100 }
101}
102
103static void pl050_write(void *opaque, hwaddr offset,
104 uint64_t value, unsigned size)
105{
64 if (offset >= 0xfe0 && offset < 0x1000)
65 return pl050_id[(offset - 0xfe0) >> 2];
66
67 switch (offset >> 2) {
68 case 0: /* KMICR */
69 return s->cr;
70 case 1: /* KMISTAT */
71 {

--- 26 unchanged lines hidden (view full) ---

98 "pl050_read: Bad offset %x\n", (int)offset);
99 return 0;
100 }
101}
102
103static void pl050_write(void *opaque, hwaddr offset,
104 uint64_t value, unsigned size)
105{
106 pl050_state *s = (pl050_state *)opaque;
106 PL050State *s = (PL050State *)opaque;
107 switch (offset >> 2) {
108 case 0: /* KMICR */
109 s->cr = value;
110 pl050_update(s, s->pending);
111 /* ??? Need to implement the enable/disable bit. */
112 break;
113 case 2: /* KMIDATA */
114 /* ??? This should toggle the TX interrupt line. */

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130static const MemoryRegionOps pl050_ops = {
131 .read = pl050_read,
132 .write = pl050_write,
133 .endianness = DEVICE_NATIVE_ENDIAN,
134};
135
136static int pl050_init(SysBusDevice *dev, int is_mouse)
137{
107 switch (offset >> 2) {
108 case 0: /* KMICR */
109 s->cr = value;
110 pl050_update(s, s->pending);
111 /* ??? Need to implement the enable/disable bit. */
112 break;
113 case 2: /* KMIDATA */
114 /* ??? This should toggle the TX interrupt line. */

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130static const MemoryRegionOps pl050_ops = {
131 .read = pl050_read,
132 .write = pl050_write,
133 .endianness = DEVICE_NATIVE_ENDIAN,
134};
135
136static int pl050_init(SysBusDevice *dev, int is_mouse)
137{
138 pl050_state *s = FROM_SYSBUS(pl050_state, dev);
138 PL050State *s = FROM_SYSBUS(PL050State, dev);
139
140 memory_region_init_io(&s->iomem, OBJECT(s), &pl050_ops, s, "pl050", 0x1000);
141 sysbus_init_mmio(dev, &s->iomem);
142 sysbus_init_irq(dev, &s->irq);
143 s->is_mouse = is_mouse;
144 if (s->is_mouse)
145 s->dev = ps2_mouse_init(pl050_update, s);
146 else

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165
166 k->init = pl050_init_keyboard;
167 dc->vmsd = &vmstate_pl050;
168}
169
170static const TypeInfo pl050_kbd_info = {
171 .name = "pl050_keyboard",
172 .parent = TYPE_SYS_BUS_DEVICE,
139
140 memory_region_init_io(&s->iomem, OBJECT(s), &pl050_ops, s, "pl050", 0x1000);
141 sysbus_init_mmio(dev, &s->iomem);
142 sysbus_init_irq(dev, &s->irq);
143 s->is_mouse = is_mouse;
144 if (s->is_mouse)
145 s->dev = ps2_mouse_init(pl050_update, s);
146 else

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165
166 k->init = pl050_init_keyboard;
167 dc->vmsd = &vmstate_pl050;
168}
169
170static const TypeInfo pl050_kbd_info = {
171 .name = "pl050_keyboard",
172 .parent = TYPE_SYS_BUS_DEVICE,
173 .instance_size = sizeof(pl050_state),
173 .instance_size = sizeof(PL050State),
174 .class_init = pl050_kbd_class_init,
175};
176
177static void pl050_mouse_class_init(ObjectClass *klass, void *data)
178{
179 DeviceClass *dc = DEVICE_CLASS(klass);
180 SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
181
182 k->init = pl050_init_mouse;
183 dc->vmsd = &vmstate_pl050;
184}
185
186static const TypeInfo pl050_mouse_info = {
187 .name = "pl050_mouse",
188 .parent = TYPE_SYS_BUS_DEVICE,
174 .class_init = pl050_kbd_class_init,
175};
176
177static void pl050_mouse_class_init(ObjectClass *klass, void *data)
178{
179 DeviceClass *dc = DEVICE_CLASS(klass);
180 SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
181
182 k->init = pl050_init_mouse;
183 dc->vmsd = &vmstate_pl050;
184}
185
186static const TypeInfo pl050_mouse_info = {
187 .name = "pl050_mouse",
188 .parent = TYPE_SYS_BUS_DEVICE,
189 .instance_size = sizeof(pl050_state),
189 .instance_size = sizeof(PL050State),
190 .class_init = pl050_mouse_class_init,
191};
192
193static void pl050_register_types(void)
194{
195 type_register_static(&pl050_kbd_info);
196 type_register_static(&pl050_mouse_info);
197}
198
199type_init(pl050_register_types)
190 .class_init = pl050_mouse_class_init,
191};
192
193static void pl050_register_types(void)
194{
195 type_register_static(&pl050_kbd_info);
196 type_register_static(&pl050_mouse_info);
197}
198
199type_init(pl050_register_types)