piix.c (0b0cb9d310edfe2b2d108f18be4f013a1e552cfd) | piix.c (f90c2bcdbc69e41e575f868b984c3e2de8f51bac) |
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1/* 2 * QEMU IDE Emulation: PCI PIIX3/4 support. 3 * 4 * Copyright (c) 2003 Fabrice Bellard 5 * Copyright (c) 2006 Openedhand Ltd. 6 * 7 * Permission is hereby granted, free of charge, to any person obtaining a copy 8 * of this software and associated documentation files (the "Software"), to deal --- 8 unchanged lines hidden (view full) --- 17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 23 * THE SOFTWARE. 24 */ | 1/* 2 * QEMU IDE Emulation: PCI PIIX3/4 support. 3 * 4 * Copyright (c) 2003 Fabrice Bellard 5 * Copyright (c) 2006 Openedhand Ltd. 6 * 7 * Permission is hereby granted, free of charge, to any person obtaining a copy 8 * of this software and associated documentation files (the "Software"), to deal --- 8 unchanged lines hidden (view full) --- 17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 23 * THE SOFTWARE. 24 */ |
25 | |
26#include <hw/hw.h> 27#include <hw/pc.h> 28#include <hw/pci.h> 29#include <hw/isa.h> | 25#include <hw/hw.h> 26#include <hw/pc.h> 27#include <hw/pci.h> 28#include <hw/isa.h> |
30#include "blockdev.h" | 29#include "block.h" |
31#include "sysemu.h" 32#include "dma.h" 33 34#include <hw/ide/pci.h> 35 36static uint64_t bmdma_read(void *opaque, target_phys_addr_t addr, unsigned size) 37{ 38 BMDMAState *bm = opaque; --- 156 unchanged lines hidden (view full) --- 195{ 196 PCIDevice *dev; 197 198 dev = pci_create_simple(bus, devfn, "piix3-ide-xen"); 199 pci_ide_create_devs(dev, hd_table); 200 return dev; 201} 202 | 30#include "sysemu.h" 31#include "dma.h" 32 33#include <hw/ide/pci.h> 34 35static uint64_t bmdma_read(void *opaque, target_phys_addr_t addr, unsigned size) 36{ 37 BMDMAState *bm = opaque; --- 156 unchanged lines hidden (view full) --- 194{ 195 PCIDevice *dev; 196 197 dev = pci_create_simple(bus, devfn, "piix3-ide-xen"); 198 pci_ide_create_devs(dev, hd_table); 199 return dev; 200} 201 |
203static int pci_piix_ide_exitfn(PCIDevice *dev) | 202static void pci_piix_ide_exitfn(PCIDevice *dev) |
204{ 205 PCIIDEState *d = DO_UPCAST(PCIIDEState, dev, dev); 206 unsigned i; 207 208 for (i = 0; i < 2; ++i) { 209 memory_region_del_subregion(&d->bmdma_bar, &d->bmdma[i].extra_io); 210 memory_region_destroy(&d->bmdma[i].extra_io); 211 memory_region_del_subregion(&d->bmdma_bar, &d->bmdma[i].addr_ioport); 212 memory_region_destroy(&d->bmdma[i].addr_ioport); 213 } 214 memory_region_destroy(&d->bmdma_bar); | 203{ 204 PCIIDEState *d = DO_UPCAST(PCIIDEState, dev, dev); 205 unsigned i; 206 207 for (i = 0; i < 2; ++i) { 208 memory_region_del_subregion(&d->bmdma_bar, &d->bmdma[i].extra_io); 209 memory_region_destroy(&d->bmdma[i].extra_io); 210 memory_region_del_subregion(&d->bmdma_bar, &d->bmdma[i].addr_ioport); 211 memory_region_destroy(&d->bmdma[i].addr_ioport); 212 } 213 memory_region_destroy(&d->bmdma_bar); |
215 216 return 0; | |
217} 218 219/* hd_table must contain 4 block drivers */ 220/* NOTE: for the PIIX3, the IRQs and IOports are hardcoded */ 221PCIDevice *pci_piix3_ide_init(PCIBus *bus, DriveInfo **hd_table, int devfn) 222{ 223 PCIDevice *dev; 224 --- 86 unchanged lines hidden --- | 214} 215 216/* hd_table must contain 4 block drivers */ 217/* NOTE: for the PIIX3, the IRQs and IOports are hardcoded */ 218PCIDevice *pci_piix3_ide_init(PCIBus *bus, DriveInfo **hd_table, int devfn) 219{ 220 PCIDevice *dev; 221 --- 86 unchanged lines hidden --- |