ich.c (10ca2943aab6646839769d78f80b0d5499efcbe9) ich.c (f90c2bcdbc69e41e575f868b984c3e2de8f51bac)
1/*
2 * QEMU ICH Emulation
3 *
4 * Copyright (c) 2010 Sebastian Herbszt <herbszt@gmx.de>
5 * Copyright (c) 2010 Alexander Graf <agraf@suse.de>
6 *
7 * This library is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU Lesser General Public

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93
94static int pci_ich9_ahci_init(PCIDevice *dev)
95{
96 struct AHCIPCIState *d;
97 int sata_cap_offset;
98 uint8_t *sata_cap;
99 d = DO_UPCAST(struct AHCIPCIState, card, dev);
100
1/*
2 * QEMU ICH Emulation
3 *
4 * Copyright (c) 2010 Sebastian Herbszt <herbszt@gmx.de>
5 * Copyright (c) 2010 Alexander Graf <agraf@suse.de>
6 *
7 * This library is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU Lesser General Public

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93
94static int pci_ich9_ahci_init(PCIDevice *dev)
95{
96 struct AHCIPCIState *d;
97 int sata_cap_offset;
98 uint8_t *sata_cap;
99 d = DO_UPCAST(struct AHCIPCIState, card, dev);
100
101 ahci_init(&d->ahci, &dev->qdev, pci_dma_context(dev), 6);
101 ahci_init(&d->ahci, &dev->qdev, 6);
102
103 pci_config_set_prog_interface(d->card.config, AHCI_PROGMODE_MAJOR_REV_1);
104
105 d->card.config[PCI_CACHE_LINE_SIZE] = 0x08; /* Cache line size */
106 d->card.config[PCI_LATENCY_TIMER] = 0x00; /* Latency timer */
107 pci_config_set_interrupt_pin(d->card.config, 1);
108
109 /* XXX Software should program this register */

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127 pci_set_word(sata_cap + SATA_CAP_REV, 0x10);
128 pci_set_long(sata_cap + SATA_CAP_BAR,
129 (ICH9_IDP_BAR + 0x4) | (ICH9_IDP_INDEX_LOG2 << 4));
130 d->ahci.idp_offset = ICH9_IDP_INDEX;
131
132 return 0;
133}
134
102
103 pci_config_set_prog_interface(d->card.config, AHCI_PROGMODE_MAJOR_REV_1);
104
105 d->card.config[PCI_CACHE_LINE_SIZE] = 0x08; /* Cache line size */
106 d->card.config[PCI_LATENCY_TIMER] = 0x00; /* Latency timer */
107 pci_config_set_interrupt_pin(d->card.config, 1);
108
109 /* XXX Software should program this register */

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127 pci_set_word(sata_cap + SATA_CAP_REV, 0x10);
128 pci_set_long(sata_cap + SATA_CAP_BAR,
129 (ICH9_IDP_BAR + 0x4) | (ICH9_IDP_INDEX_LOG2 << 4));
130 d->ahci.idp_offset = ICH9_IDP_INDEX;
131
132 return 0;
133}
134
135static int pci_ich9_uninit(PCIDevice *dev)
135static void pci_ich9_uninit(PCIDevice *dev)
136{
137 struct AHCIPCIState *d;
138 d = DO_UPCAST(struct AHCIPCIState, card, dev);
139
140 msi_uninit(dev);
141 ahci_uninit(&d->ahci);
136{
137 struct AHCIPCIState *d;
138 d = DO_UPCAST(struct AHCIPCIState, card, dev);
139
140 msi_uninit(dev);
141 ahci_uninit(&d->ahci);
142
143 return 0;
144}
145
146static void ich_ahci_class_init(ObjectClass *klass, void *data)
147{
148 DeviceClass *dc = DEVICE_CLASS(klass);
149 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
150
151 k->init = pci_ich9_ahci_init;

--- 22 unchanged lines hidden --- 		142}
143
144static void ich_ahci_class_init(ObjectClass *klass, void *data)
145{
146 DeviceClass *dc = DEVICE_CLASS(klass);
147 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
148
149 k->init = pci_ich9_ahci_init;

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