acpi-build.c (05de778b5b8ab0b402996769117b88c7ea5c7c61) | acpi-build.c (caf108bc587908f7608729f39639dccdfa53010b) |
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1/* Support for generating ACPI tables and passing them to Guests 2 * 3 * Copyright (C) 2008-2010 Kevin O'Connor <kevin@koconnor.net> 4 * Copyright (C) 2006 Fabrice Bellard 5 * Copyright (C) 2013 Red Hat Inc 6 * 7 * Author: Michael S. Tsirkin <mst@redhat.com> 8 * --- 205 unchanged lines hidden (view full) --- 214 pm->smi_on_cpu_unplug = false; 215 216 assert(obj); 217 init_common_fadt_data(machine, obj, &pm->fadt); 218 if (piix) { 219 /* w2k requires FADT(rev1) or it won't boot, keep PC compatible */ 220 pm->fadt.rev = 1; 221 pm->cpu_hp_io_base = PIIX4_CPU_HOTPLUG_IO_BASE; | 1/* Support for generating ACPI tables and passing them to Guests 2 * 3 * Copyright (C) 2008-2010 Kevin O'Connor <kevin@koconnor.net> 4 * Copyright (C) 2006 Fabrice Bellard 5 * Copyright (C) 2013 Red Hat Inc 6 * 7 * Author: Michael S. Tsirkin <mst@redhat.com> 8 * --- 205 unchanged lines hidden (view full) --- 214 pm->smi_on_cpu_unplug = false; 215 216 assert(obj); 217 init_common_fadt_data(machine, obj, &pm->fadt); 218 if (piix) { 219 /* w2k requires FADT(rev1) or it won't boot, keep PC compatible */ 220 pm->fadt.rev = 1; 221 pm->cpu_hp_io_base = PIIX4_CPU_HOTPLUG_IO_BASE; |
222 pm->pcihp_io_base = 223 object_property_get_uint(obj, ACPI_PCIHP_IO_BASE_PROP, NULL); 224 pm->pcihp_io_len = 225 object_property_get_uint(obj, ACPI_PCIHP_IO_LEN_PROP, NULL); | |
226 } 227 if (lpc) { 228 uint64_t smi_features = object_property_get_uint(lpc, 229 ICH9_LPC_SMI_NEGOTIATED_FEAT_PROP, NULL); 230 struct AcpiGenericAddress r = { .space_id = AML_AS_SYSTEM_IO, 231 .bit_width = 8, .address = ICH9_RST_CNT_IOPORT }; 232 pm->fadt.reset_reg = r; 233 pm->fadt.reset_val = 0xf; 234 pm->fadt.flags |= 1 << ACPI_FADT_F_RESET_REG_SUP; 235 pm->cpu_hp_io_base = ICH9_CPU_HOTPLUG_IO_BASE; 236 pm->smi_on_cpuhp = 237 !!(smi_features & BIT_ULL(ICH9_LPC_SMI_F_CPU_HOTPLUG_BIT)); 238 pm->smi_on_cpu_unplug = 239 !!(smi_features & BIT_ULL(ICH9_LPC_SMI_F_CPU_HOT_UNPLUG_BIT)); 240 } | 222 } 223 if (lpc) { 224 uint64_t smi_features = object_property_get_uint(lpc, 225 ICH9_LPC_SMI_NEGOTIATED_FEAT_PROP, NULL); 226 struct AcpiGenericAddress r = { .space_id = AML_AS_SYSTEM_IO, 227 .bit_width = 8, .address = ICH9_RST_CNT_IOPORT }; 228 pm->fadt.reset_reg = r; 229 pm->fadt.reset_val = 0xf; 230 pm->fadt.flags |= 1 << ACPI_FADT_F_RESET_REG_SUP; 231 pm->cpu_hp_io_base = ICH9_CPU_HOTPLUG_IO_BASE; 232 pm->smi_on_cpuhp = 233 !!(smi_features & BIT_ULL(ICH9_LPC_SMI_F_CPU_HOTPLUG_BIT)); 234 pm->smi_on_cpu_unplug = 235 !!(smi_features & BIT_ULL(ICH9_LPC_SMI_F_CPU_HOT_UNPLUG_BIT)); 236 } |
237 pm->pcihp_io_base = 238 object_property_get_uint(obj, ACPI_PCIHP_IO_BASE_PROP, NULL); 239 pm->pcihp_io_len = 240 object_property_get_uint(obj, ACPI_PCIHP_IO_LEN_PROP, NULL); |
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241 242 /* The above need not be conditional on machine type because the reset port 243 * happens to be the same on PIIX (pc) and ICH9 (q35). */ 244 QEMU_BUILD_BUG_ON(ICH9_RST_CNT_IOPORT != PIIX_RCR_IOPORT); 245 246 /* Fill in optional s3/s4 related properties */ 247 o = object_property_get_qobject(obj, ACPI_PM_PROP_S3_DISABLED, NULL); 248 if (o) { --- 138 unchanged lines hidden (view full) --- 387 PCIDevice *pdev = bus->devices[i]; 388 int slot = PCI_SLOT(i); 389 bool hotplug_enabled_dev; 390 bool bridge_in_acpi; 391 bool cold_plugged_bridge; 392 393 if (!pdev) { 394 if (bsel) { /* add hotplug slots for non present devices */ | 241 242 /* The above need not be conditional on machine type because the reset port 243 * happens to be the same on PIIX (pc) and ICH9 (q35). */ 244 QEMU_BUILD_BUG_ON(ICH9_RST_CNT_IOPORT != PIIX_RCR_IOPORT); 245 246 /* Fill in optional s3/s4 related properties */ 247 o = object_property_get_qobject(obj, ACPI_PM_PROP_S3_DISABLED, NULL); 248 if (o) { --- 138 unchanged lines hidden (view full) --- 387 PCIDevice *pdev = bus->devices[i]; 388 int slot = PCI_SLOT(i); 389 bool hotplug_enabled_dev; 390 bool bridge_in_acpi; 391 bool cold_plugged_bridge; 392 393 if (!pdev) { 394 if (bsel) { /* add hotplug slots for non present devices */ |
395 if (pci_bus_is_express(bus) && slot > 0) { 396 break; 397 } |
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395 dev = aml_device("S%.02X", PCI_DEVFN(slot, 0)); 396 aml_append(dev, aml_name_decl("_SUN", aml_int(slot))); 397 aml_append(dev, aml_name_decl("_ADR", aml_int(slot << 16))); 398 method = aml_method("_EJ0", 1, AML_NOTSERIALIZED); 399 aml_append(method, 400 aml_call2("PCEJ", aml_name("BSEL"), aml_name("_SUN")) 401 ); 402 aml_append(dev, method); --- 113 unchanged lines hidden (view full) --- 516 aml_int(3))); /* Eject Request */ 517 } 518 519 /* Notify about child bus events in any case */ 520 if (pcihp_bridge_en) { 521 QLIST_FOREACH(sec, &bus->child, sibling) { 522 int32_t devfn = sec->parent_dev->devfn; 523 | 398 dev = aml_device("S%.02X", PCI_DEVFN(slot, 0)); 399 aml_append(dev, aml_name_decl("_SUN", aml_int(slot))); 400 aml_append(dev, aml_name_decl("_ADR", aml_int(slot << 16))); 401 method = aml_method("_EJ0", 1, AML_NOTSERIALIZED); 402 aml_append(method, 403 aml_call2("PCEJ", aml_name("BSEL"), aml_name("_SUN")) 404 ); 405 aml_append(dev, method); --- 113 unchanged lines hidden (view full) --- 519 aml_int(3))); /* Eject Request */ 520 } 521 522 /* Notify about child bus events in any case */ 523 if (pcihp_bridge_en) { 524 QLIST_FOREACH(sec, &bus->child, sibling) { 525 int32_t devfn = sec->parent_dev->devfn; 526 |
524 if (pci_bus_is_root(sec) || pci_bus_is_express(sec)) { | 527 if (pci_bus_is_root(sec)) { |
525 continue; 526 } 527 528 aml_append(method, aml_name("^S%.02X.PCNT", devfn)); 529 } 530 } 531 532 aml_append(parent_scope, method); --- 713 unchanged lines hidden (view full) --- 1246 /* PIIX PCI to ISA irq remapping */ 1247 aml_append(dev, aml_operation_region("P40C", AML_PCI_CONFIG, 1248 aml_int(0x60), 0x04)); 1249 1250 aml_append(scope, dev); 1251 aml_append(table, scope); 1252} 1253 | 528 continue; 529 } 530 531 aml_append(method, aml_name("^S%.02X.PCNT", devfn)); 532 } 533 } 534 535 aml_append(parent_scope, method); --- 713 unchanged lines hidden (view full) --- 1249 /* PIIX PCI to ISA irq remapping */ 1250 aml_append(dev, aml_operation_region("P40C", AML_PCI_CONFIG, 1251 aml_int(0x60), 0x04)); 1252 1253 aml_append(scope, dev); 1254 aml_append(table, scope); 1255} 1256 |
1254static void build_piix4_pci_hotplug(Aml *table) | 1257static void build_x86_acpi_pci_hotplug(Aml *table, uint64_t pcihp_addr) |
1255{ 1256 Aml *scope; 1257 Aml *field; 1258 Aml *method; 1259 1260 scope = aml_scope("_SB.PCI0"); 1261 1262 aml_append(scope, | 1258{ 1259 Aml *scope; 1260 Aml *field; 1261 Aml *method; 1262 1263 scope = aml_scope("_SB.PCI0"); 1264 1265 aml_append(scope, |
1263 aml_operation_region("PCST", AML_SYSTEM_IO, aml_int(0xae00), 0x08)); | 1266 aml_operation_region("PCST", AML_SYSTEM_IO, aml_int(pcihp_addr), 0x08)); |
1264 field = aml_field("PCST", AML_DWORD_ACC, AML_NOLOCK, AML_WRITE_AS_ZEROS); 1265 aml_append(field, aml_named_field("PCIU", 32)); 1266 aml_append(field, aml_named_field("PCID", 32)); 1267 aml_append(scope, field); 1268 1269 aml_append(scope, | 1267 field = aml_field("PCST", AML_DWORD_ACC, AML_NOLOCK, AML_WRITE_AS_ZEROS); 1268 aml_append(field, aml_named_field("PCIU", 32)); 1269 aml_append(field, aml_named_field("PCID", 32)); 1270 aml_append(scope, field); 1271 1272 aml_append(scope, |
1270 aml_operation_region("SEJ", AML_SYSTEM_IO, aml_int(0xae08), 0x04)); | 1273 aml_operation_region("SEJ", AML_SYSTEM_IO, 1274 aml_int(pcihp_addr + ACPI_PCIHP_SEJ_BASE), 0x04)); |
1271 field = aml_field("SEJ", AML_DWORD_ACC, AML_NOLOCK, AML_WRITE_AS_ZEROS); 1272 aml_append(field, aml_named_field("B0EJ", 32)); 1273 aml_append(scope, field); 1274 1275 aml_append(scope, | 1275 field = aml_field("SEJ", AML_DWORD_ACC, AML_NOLOCK, AML_WRITE_AS_ZEROS); 1276 aml_append(field, aml_named_field("B0EJ", 32)); 1277 aml_append(scope, field); 1278 1279 aml_append(scope, |
1276 aml_operation_region("BNMR", AML_SYSTEM_IO, aml_int(0xae10), 0x08)); | 1280 aml_operation_region("BNMR", AML_SYSTEM_IO, 1281 aml_int(pcihp_addr + ACPI_PCIHP_BNMR_BASE), 0x08)); |
1277 field = aml_field("BNMR", AML_DWORD_ACC, AML_NOLOCK, AML_WRITE_AS_ZEROS); 1278 aml_append(field, aml_named_field("BNUM", 32)); 1279 aml_append(field, aml_named_field("PIDX", 32)); 1280 aml_append(scope, field); 1281 1282 aml_append(scope, aml_mutex("BLCK", 0)); 1283 1284 method = aml_method("PCEJ", 2, AML_NOTSERIALIZED); --- 117 unchanged lines hidden (view full) --- 1402 aml_append(dsdt, sb_scope); 1403 1404 if (misc->has_hpet) { 1405 build_hpet_aml(dsdt); 1406 } 1407 build_piix4_isa_bridge(dsdt); 1408 build_isa_devices_aml(dsdt); 1409 if (pm->pcihp_bridge_en || pm->pcihp_root_en) { | 1282 field = aml_field("BNMR", AML_DWORD_ACC, AML_NOLOCK, AML_WRITE_AS_ZEROS); 1283 aml_append(field, aml_named_field("BNUM", 32)); 1284 aml_append(field, aml_named_field("PIDX", 32)); 1285 aml_append(scope, field); 1286 1287 aml_append(scope, aml_mutex("BLCK", 0)); 1288 1289 method = aml_method("PCEJ", 2, AML_NOTSERIALIZED); --- 117 unchanged lines hidden (view full) --- 1407 aml_append(dsdt, sb_scope); 1408 1409 if (misc->has_hpet) { 1410 build_hpet_aml(dsdt); 1411 } 1412 build_piix4_isa_bridge(dsdt); 1413 build_isa_devices_aml(dsdt); 1414 if (pm->pcihp_bridge_en || pm->pcihp_root_en) { |
1410 build_piix4_pci_hotplug(dsdt); | 1415 build_x86_acpi_pci_hotplug(dsdt, pm->pcihp_io_base); |
1411 } 1412 build_piix4_pci0_int(dsdt); 1413 } else { 1414 sb_scope = aml_scope("_SB"); 1415 dev = aml_device("PCI0"); 1416 aml_append(dev, aml_name_decl("_HID", aml_eisaid("PNP0A08"))); 1417 aml_append(dev, aml_name_decl("_CID", aml_eisaid("PNP0A03"))); 1418 aml_append(dev, aml_name_decl("_ADR", aml_int(0))); --- 31 unchanged lines hidden (view full) --- 1450 1451 aml_append(dsdt, sb_scope); 1452 1453 if (misc->has_hpet) { 1454 build_hpet_aml(dsdt); 1455 } 1456 build_q35_isa_bridge(dsdt); 1457 build_isa_devices_aml(dsdt); | 1416 } 1417 build_piix4_pci0_int(dsdt); 1418 } else { 1419 sb_scope = aml_scope("_SB"); 1420 dev = aml_device("PCI0"); 1421 aml_append(dev, aml_name_decl("_HID", aml_eisaid("PNP0A08"))); 1422 aml_append(dev, aml_name_decl("_CID", aml_eisaid("PNP0A03"))); 1423 aml_append(dev, aml_name_decl("_ADR", aml_int(0))); --- 31 unchanged lines hidden (view full) --- 1455 1456 aml_append(dsdt, sb_scope); 1457 1458 if (misc->has_hpet) { 1459 build_hpet_aml(dsdt); 1460 } 1461 build_q35_isa_bridge(dsdt); 1462 build_isa_devices_aml(dsdt); |
1463 if (pm->pcihp_bridge_en) { 1464 build_x86_acpi_pci_hotplug(dsdt, pm->pcihp_io_base); 1465 } |
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1458 build_q35_pci0_int(dsdt); 1459 if (pcms->smbus && !pcmc->do_not_add_smb_acpi) { 1460 build_smb0(dsdt, pcms->smbus, ICH9_SMB_DEV, ICH9_SMB_FUNC); 1461 } 1462 } 1463 1464 if (vmbus_bridge) { 1465 sb_scope = aml_scope("_SB"); --- 18 unchanged lines hidden (view full) --- 1484 "\\_GPE._E03", AML_SYSTEM_IO, 1485 pcms->memhp_io_base); 1486 } 1487 1488 scope = aml_scope("_GPE"); 1489 { 1490 aml_append(scope, aml_name_decl("_HID", aml_string("ACPI0006"))); 1491 | 1466 build_q35_pci0_int(dsdt); 1467 if (pcms->smbus && !pcmc->do_not_add_smb_acpi) { 1468 build_smb0(dsdt, pcms->smbus, ICH9_SMB_DEV, ICH9_SMB_FUNC); 1469 } 1470 } 1471 1472 if (vmbus_bridge) { 1473 sb_scope = aml_scope("_SB"); --- 18 unchanged lines hidden (view full) --- 1492 "\\_GPE._E03", AML_SYSTEM_IO, 1493 pcms->memhp_io_base); 1494 } 1495 1496 scope = aml_scope("_GPE"); 1497 { 1498 aml_append(scope, aml_name_decl("_HID", aml_string("ACPI0006"))); 1499 |
1492 if (misc->is_piix4 && (pm->pcihp_bridge_en || pm->pcihp_root_en)) { | 1500 if (pm->pcihp_bridge_en || pm->pcihp_root_en) { |
1493 method = aml_method("_E01", 0, AML_NOTSERIALIZED); 1494 aml_append(method, 1495 aml_acquire(aml_name("\\_SB.PCI0.BLCK"), 0xFFFF)); 1496 aml_append(method, aml_call0("\\_SB.PCI0.PCNT")); 1497 aml_append(method, aml_release(aml_name("\\_SB.PCI0.BLCK"))); 1498 aml_append(scope, method); 1499 } 1500 --- 1214 unchanged lines hidden --- | 1501 method = aml_method("_E01", 0, AML_NOTSERIALIZED); 1502 aml_append(method, 1503 aml_acquire(aml_name("\\_SB.PCI0.BLCK"), 0xFFFF)); 1504 aml_append(method, aml_call0("\\_SB.PCI0.PCNT")); 1505 aml_append(method, aml_release(aml_name("\\_SB.PCI0.BLCK"))); 1506 aml_append(scope, method); 1507 } 1508 --- 1214 unchanged lines hidden --- |