sifive_gpio.c (d328fef93ae757a0dd65ed786a4086e27952eef3) | sifive_gpio.c (e3d0814368d00e7985c31edf5d0cfce45972d4be) |
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1/* 2 * SiFive System-on-Chip general purpose input/output register definition 3 * 4 * Copyright 2019 AdaCore 5 * 6 * Base on nrf51_gpio.c: 7 * 8 * Copyright 2018 Steffen Görtz <contrib@steffen-goertz.de> --- 364 unchanged lines hidden (view full) --- 373 374static void sifive_gpio_class_init(ObjectClass *klass, void *data) 375{ 376 DeviceClass *dc = DEVICE_CLASS(klass); 377 378 device_class_set_props(dc, sifive_gpio_properties); 379 dc->vmsd = &vmstate_sifive_gpio; 380 dc->realize = sifive_gpio_realize; | 1/* 2 * SiFive System-on-Chip general purpose input/output register definition 3 * 4 * Copyright 2019 AdaCore 5 * 6 * Base on nrf51_gpio.c: 7 * 8 * Copyright 2018 Steffen Görtz <contrib@steffen-goertz.de> --- 364 unchanged lines hidden (view full) --- 373 374static void sifive_gpio_class_init(ObjectClass *klass, void *data) 375{ 376 DeviceClass *dc = DEVICE_CLASS(klass); 377 378 device_class_set_props(dc, sifive_gpio_properties); 379 dc->vmsd = &vmstate_sifive_gpio; 380 dc->realize = sifive_gpio_realize; |
381 dc->reset = sifive_gpio_reset; | 381 device_class_set_legacy_reset(dc, sifive_gpio_reset); |
382 dc->desc = "SiFive GPIO"; 383} 384 385static const TypeInfo sifive_gpio_info = { 386 .name = TYPE_SIFIVE_GPIO, 387 .parent = TYPE_SYS_BUS_DEVICE, 388 .instance_size = sizeof(SIFIVEGPIOState), 389 .class_init = sifive_gpio_class_init 390}; 391 392static void sifive_gpio_register_types(void) 393{ 394 type_register_static(&sifive_gpio_info); 395} 396 397type_init(sifive_gpio_register_types) | 382 dc->desc = "SiFive GPIO"; 383} 384 385static const TypeInfo sifive_gpio_info = { 386 .name = TYPE_SIFIVE_GPIO, 387 .parent = TYPE_SYS_BUS_DEVICE, 388 .instance_size = sizeof(SIFIVEGPIOState), 389 .class_init = sifive_gpio_class_init 390}; 391 392static void sifive_gpio_register_types(void) 393{ 394 type_register_static(&sifive_gpio_info); 395} 396 397type_init(sifive_gpio_register_types) |