xlnx-zdma.c (b7cbebf2b9d7aa8854cfd6a45484e160244e9f48) xlnx-zdma.c (19f703477314a5db09ffc3c0f6be9c45645f8302)
1/*
2 * QEMU model of the ZynqMP generic DMA
3 *
4 * Copyright (c) 2014 Xilinx Inc.
5 * Copyright (c) 2018 FEIMTECH AB
6 *
7 * Written by Edgar E. Iglesias <edgar.iglesias@xilinx.com>,
8 * Francisco Iglesias <francisco.iglesias@feimtech.se>

--- 297 unchanged lines hidden (view full) ---

306 qemu_log_mask(LOG_GUEST_ERROR,
307 "zdma: unaligned descriptor at %" PRIx64,
308 addr);
309 memset(buf, 0x0, sizeof(XlnxZDMADescr));
310 s->error = true;
311 return false;
312 }
313
1/*
2 * QEMU model of the ZynqMP generic DMA
3 *
4 * Copyright (c) 2014 Xilinx Inc.
5 * Copyright (c) 2018 FEIMTECH AB
6 *
7 * Written by Edgar E. Iglesias <edgar.iglesias@xilinx.com>,
8 * Francisco Iglesias <francisco.iglesias@feimtech.se>

--- 297 unchanged lines hidden (view full) ---

306 qemu_log_mask(LOG_GUEST_ERROR,
307 "zdma: unaligned descriptor at %" PRIx64,
308 addr);
309 memset(buf, 0x0, sizeof(XlnxZDMADescr));
310 s->error = true;
311 return false;
312 }
313
314 address_space_rw(s->dma_as, addr, s->attr,
315 buf, sizeof(XlnxZDMADescr), false);
314 address_space_read(s->dma_as, addr, s->attr, buf, sizeof(XlnxZDMADescr));
316 return true;
317}
318
319static void zdma_load_src_descriptor(XlnxZDMA *s)
320{
321 uint64_t src_addr;
322 unsigned int ptype = ARRAY_FIELD_EX32(s->regs, ZDMA_CH_CTRL0, POINT_TYPE);
323

--- 35 unchanged lines hidden (view full) ---

359
360 if (type == DTYPE_LINEAR) {
361 next = zdma_get_regaddr64(s, basereg);
362 next += sizeof(s->dsc_dst);
363 zdma_put_regaddr64(s, basereg, next);
364 } else {
365 addr = zdma_get_regaddr64(s, basereg);
366 addr += sizeof(s->dsc_dst);
315 return true;
316}
317
318static void zdma_load_src_descriptor(XlnxZDMA *s)
319{
320 uint64_t src_addr;
321 unsigned int ptype = ARRAY_FIELD_EX32(s->regs, ZDMA_CH_CTRL0, POINT_TYPE);
322

--- 35 unchanged lines hidden (view full) ---

358
359 if (type == DTYPE_LINEAR) {
360 next = zdma_get_regaddr64(s, basereg);
361 next += sizeof(s->dsc_dst);
362 zdma_put_regaddr64(s, basereg, next);
363 } else {
364 addr = zdma_get_regaddr64(s, basereg);
365 addr += sizeof(s->dsc_dst);
367 address_space_rw(s->dma_as, addr, s->attr, &next, 8, false);
366 address_space_read(s->dma_as, addr, s->attr, &next, 8);
368 zdma_put_regaddr64(s, basereg, next);
369 }
370 return next;
371}
372
373static void zdma_write_dst(XlnxZDMA *s, uint8_t *buf, uint32_t len)
374{
375 uint32_t dst_size, dlen;

--- 35 unchanged lines hidden (view full) ---

411
412 dlen = len > dst_size ? dst_size : len;
413 if (burst_type == AXI_BURST_FIXED) {
414 if (dlen > (s->cfg.bus_width / 8)) {
415 dlen = s->cfg.bus_width / 8;
416 }
417 }
418
367 zdma_put_regaddr64(s, basereg, next);
368 }
369 return next;
370}
371
372static void zdma_write_dst(XlnxZDMA *s, uint8_t *buf, uint32_t len)
373{
374 uint32_t dst_size, dlen;

--- 35 unchanged lines hidden (view full) ---

410
411 dlen = len > dst_size ? dst_size : len;
412 if (burst_type == AXI_BURST_FIXED) {
413 if (dlen > (s->cfg.bus_width / 8)) {
414 dlen = s->cfg.bus_width / 8;
415 }
416 }
417
419 address_space_rw(s->dma_as, s->dsc_dst.addr, s->attr, buf, dlen,
420 true);
418 address_space_write(s->dma_as, s->dsc_dst.addr, s->attr, buf, dlen);
421 if (burst_type == AXI_BURST_INCR) {
422 s->dsc_dst.addr += dlen;
423 }
424 dst_size -= dlen;
425 buf += dlen;
426 len -= dlen;
427
428 if (dst_size == 0 && dst_intr) {

--- 59 unchanged lines hidden (view full) ---

488 }
489 }
490
491 if (rw_mode == RW_MODE_WO) {
492 if (len > s->cfg.bus_width / 8) {
493 len = s->cfg.bus_width / 8;
494 }
495 } else {
419 if (burst_type == AXI_BURST_INCR) {
420 s->dsc_dst.addr += dlen;
421 }
422 dst_size -= dlen;
423 buf += dlen;
424 len -= dlen;
425
426 if (dst_size == 0 && dst_intr) {

--- 59 unchanged lines hidden (view full) ---

486 }
487 }
488
489 if (rw_mode == RW_MODE_WO) {
490 if (len > s->cfg.bus_width / 8) {
491 len = s->cfg.bus_width / 8;
492 }
493 } else {
496 address_space_rw(s->dma_as, src_addr, s->attr, s->buf, len,
497 false);
494 address_space_read(s->dma_as, src_addr, s->attr, s->buf, len);
498 if (burst_type == AXI_BURST_INCR) {
499 src_addr += len;
500 }
501 }
502
503 if (rw_mode != RW_MODE_RO) {
504 zdma_write_dst(s, s->buf, len);
505 }

--- 335 unchanged lines hidden --- 		495 if (burst_type == AXI_BURST_INCR) {
496 src_addr += len;
497 }
498 }
499
500 if (rw_mode != RW_MODE_RO) {
501 zdma_write_dst(s, s->buf, len);
502 }

--- 335 unchanged lines hidden ---