| xlnx-zdma.c (46919512fcfec1e677733a16bc178898c524854f) | xlnx-zdma.c (63e6b5645021bb2b545a39f2896a42da5c300d9c) |
|---|---|
| 1/* 2 * QEMU model of the ZynqMP generic DMA 3 * 4 * Copyright (c) 2014 Xilinx Inc. 5 * Copyright (c) 2018 FEIMTECH AB 6 * 7 * Written by Edgar E. Iglesias <edgar.iglesias@xilinx.com>, 8 * Francisco Iglesias <francisco.iglesias@feimtech.se> --- 787 unchanged lines hidden (view full) --- 796 sysbus_init_mmio(sbd, &s->iomem); 797 sysbus_init_irq(sbd, &s->irq_zdma_ch_imr); 798} 799 800static const VMStateDescription vmstate_zdma = { 801 .name = TYPE_XLNX_ZDMA, 802 .version_id = 1, 803 .minimum_version_id = 1, | 1/* 2 * QEMU model of the ZynqMP generic DMA 3 * 4 * Copyright (c) 2014 Xilinx Inc. 5 * Copyright (c) 2018 FEIMTECH AB 6 * 7 * Written by Edgar E. Iglesias <edgar.iglesias@xilinx.com>, 8 * Francisco Iglesias <francisco.iglesias@feimtech.se> --- 787 unchanged lines hidden (view full) --- 796 sysbus_init_mmio(sbd, &s->iomem); 797 sysbus_init_irq(sbd, &s->irq_zdma_ch_imr); 798} 799 800static const VMStateDescription vmstate_zdma = { 801 .name = TYPE_XLNX_ZDMA, 802 .version_id = 1, 803 .minimum_version_id = 1, |
| 804 .fields = (VMStateField[]) { | 804 .fields = (const VMStateField[]) { |
| 805 VMSTATE_UINT32_ARRAY(regs, XlnxZDMA, ZDMA_R_MAX), 806 VMSTATE_UINT32(state, XlnxZDMA), 807 VMSTATE_UINT32_ARRAY(dsc_src.words, XlnxZDMA, 4), 808 VMSTATE_UINT32_ARRAY(dsc_dst.words, XlnxZDMA, 4), 809 VMSTATE_END_OF_LIST(), 810 } 811}; 812 --- 31 unchanged lines hidden --- | 805 VMSTATE_UINT32_ARRAY(regs, XlnxZDMA, ZDMA_R_MAX), 806 VMSTATE_UINT32(state, XlnxZDMA), 807 VMSTATE_UINT32_ARRAY(dsc_src.words, XlnxZDMA, 4), 808 VMSTATE_UINT32_ARRAY(dsc_dst.words, XlnxZDMA, 4), 809 VMSTATE_END_OF_LIST(), 810 } 811}; 812 --- 31 unchanged lines hidden --- |