sparc32_dma.c (69f153667fce723ee546d2f047d66d0cfa67c3cc) sparc32_dma.c (63e6b5645021bb2b545a39f2896a42da5c300d9c)
1/*
2 * QEMU Sparc32 DMA controller emulation
3 *
4 * Copyright (c) 2006 Fabrice Bellard
5 *
6 * Modifications:
7 * 2010-Feb-14 Artyom Tarasenko : reworked irq generation
8 *

--- 235 unchanged lines hidden (view full) ---

244 memset(s->dmaregs, 0, DMA_SIZE);
245 s->dmaregs[0] = DMA_VER;
246}
247
248static const VMStateDescription vmstate_sparc32_dma_device = {
249 .name ="sparc32_dma",
250 .version_id = 2,
251 .minimum_version_id = 2,
1/*
2 * QEMU Sparc32 DMA controller emulation
3 *
4 * Copyright (c) 2006 Fabrice Bellard
5 *
6 * Modifications:
7 * 2010-Feb-14 Artyom Tarasenko : reworked irq generation
8 *

--- 235 unchanged lines hidden (view full) ---

244 memset(s->dmaregs, 0, DMA_SIZE);
245 s->dmaregs[0] = DMA_VER;
246}
247
248static const VMStateDescription vmstate_sparc32_dma_device = {
249 .name ="sparc32_dma",
250 .version_id = 2,
251 .minimum_version_id = 2,
252 .fields = (VMStateField[]) {
252 .fields = (const VMStateField[]) {
253 VMSTATE_UINT32_ARRAY(dmaregs, DMADeviceState, DMA_REGS),
254 VMSTATE_END_OF_LIST()
255 }
256};
257
258static void sparc32_dma_device_init(Object *obj)
259{
260 DeviceState *dev = DEVICE(obj);

--- 193 unchanged lines hidden --- 		253 VMSTATE_UINT32_ARRAY(dmaregs, DMADeviceState, DMA_REGS),
254 VMSTATE_END_OF_LIST()
255 }
256};
257
258static void sparc32_dma_device_init(Object *obj)
259{
260 DeviceState *dev = DEVICE(obj);

--- 193 unchanged lines hidden ---