pl080.c (d45a5270d075ea589f0b0ddcf963a5fea1f500ac) | pl080.c (63e6b5645021bb2b545a39f2896a42da5c300d9c) |
---|---|
1/* 2 * Arm PrimeCell PL080/PL081 DMA controller 3 * 4 * Copyright (c) 2006 CodeSourcery. 5 * Written by Paul Brook 6 * 7 * This code is licensed under the GPL. 8 */ --- 25 unchanged lines hidden (view full) --- 34#define PL080_CCTRL_SI 0x04000000 35#define PL080_CCTRL_D 0x02000000 36#define PL080_CCTRL_S 0x01000000 37 38static const VMStateDescription vmstate_pl080_channel = { 39 .name = "pl080_channel", 40 .version_id = 1, 41 .minimum_version_id = 1, | 1/* 2 * Arm PrimeCell PL080/PL081 DMA controller 3 * 4 * Copyright (c) 2006 CodeSourcery. 5 * Written by Paul Brook 6 * 7 * This code is licensed under the GPL. 8 */ --- 25 unchanged lines hidden (view full) --- 34#define PL080_CCTRL_SI 0x04000000 35#define PL080_CCTRL_D 0x02000000 36#define PL080_CCTRL_S 0x01000000 37 38static const VMStateDescription vmstate_pl080_channel = { 39 .name = "pl080_channel", 40 .version_id = 1, 41 .minimum_version_id = 1, |
42 .fields = (VMStateField[]) { | 42 .fields = (const VMStateField[]) { |
43 VMSTATE_UINT32(src, pl080_channel), 44 VMSTATE_UINT32(dest, pl080_channel), 45 VMSTATE_UINT32(lli, pl080_channel), 46 VMSTATE_UINT32(ctrl, pl080_channel), 47 VMSTATE_UINT32(conf, pl080_channel), 48 VMSTATE_END_OF_LIST() 49 } 50}; 51 52static const VMStateDescription vmstate_pl080 = { 53 .name = "pl080", 54 .version_id = 1, 55 .minimum_version_id = 1, | 43 VMSTATE_UINT32(src, pl080_channel), 44 VMSTATE_UINT32(dest, pl080_channel), 45 VMSTATE_UINT32(lli, pl080_channel), 46 VMSTATE_UINT32(ctrl, pl080_channel), 47 VMSTATE_UINT32(conf, pl080_channel), 48 VMSTATE_END_OF_LIST() 49 } 50}; 51 52static const VMStateDescription vmstate_pl080 = { 53 .name = "pl080", 54 .version_id = 1, 55 .minimum_version_id = 1, |
56 .fields = (VMStateField[]) { | 56 .fields = (const VMStateField[]) { |
57 VMSTATE_UINT8(tc_int, PL080State), 58 VMSTATE_UINT8(tc_mask, PL080State), 59 VMSTATE_UINT8(err_int, PL080State), 60 VMSTATE_UINT8(err_mask, PL080State), 61 VMSTATE_UINT32(conf, PL080State), 62 VMSTATE_UINT32(sync, PL080State), 63 VMSTATE_UINT32(req_single, PL080State), 64 VMSTATE_UINT32(req_burst, PL080State), --- 385 unchanged lines hidden --- | 57 VMSTATE_UINT8(tc_int, PL080State), 58 VMSTATE_UINT8(tc_mask, PL080State), 59 VMSTATE_UINT8(err_int, PL080State), 60 VMSTATE_UINT8(err_mask, PL080State), 61 VMSTATE_UINT32(conf, PL080State), 62 VMSTATE_UINT32(sync, PL080State), 63 VMSTATE_UINT32(req_single, PL080State), 64 VMSTATE_UINT32(req_burst, PL080State), --- 385 unchanged lines hidden --- |