bcm2835_dma.c (84a5a8014801a83d1b8d15fa7f0fde03db081530) bcm2835_dma.c (03dd024ff57733a55cd2e455f361d053c81b1b29)
1/*
2 * Raspberry Pi emulation (c) 2012 Gregory Estrade
3 * This code is licensed under the GNU GPLv2 and later.
4 */
5
6#include "qemu/osdep.h"
7#include "qapi/error.h"
8#include "hw/dma/bcm2835_dma.h"
1/*
2 * Raspberry Pi emulation (c) 2012 Gregory Estrade
3 * This code is licensed under the GNU GPLv2 and later.
4 */
5
6#include "qemu/osdep.h"
7#include "qapi/error.h"
8#include "hw/dma/bcm2835_dma.h"
9#include "qemu/log.h"
9
10/* DMA CS Control and Status bits */
11#define BCM2708_DMA_ACTIVE (1 << 0)
12#define BCM2708_DMA_END (1 << 1) /* GE */
13#define BCM2708_DMA_INT (1 << 2)
14#define BCM2708_DMA_ISPAUSED (1 << 4) /* Pause requested or not active */
15#define BCM2708_DMA_ISHELD (1 << 5) /* Is held by DREQ flow control */
16#define BCM2708_DMA_ERR (1 << 8)

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11/* DMA CS Control and Status bits */
12#define BCM2708_DMA_ACTIVE (1 << 0)
13#define BCM2708_DMA_END (1 << 1) /* GE */
14#define BCM2708_DMA_INT (1 << 2)
15#define BCM2708_DMA_ISPAUSED (1 << 4) /* Pause requested or not active */
16#define BCM2708_DMA_ISHELD (1 << 5) /* Is held by DREQ flow control */
17#define BCM2708_DMA_ERR (1 << 8)

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