dpcd.c (95a9457fd44ad97c518858a4e1586a5498f9773c) | dpcd.c (91e7fd3ae5a6fcd270f8d38fd5771033a806abce) |
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1/* | 1/* |
2 * dpcd.c | 2 * Xilinx Display Port Control Data |
3 * 4 * Copyright (C) 2015 : GreenSocs Ltd 5 * http://www.greensocs.com/ , email: info@greensocs.com 6 * 7 * Developed by : 8 * Frederic Konrad <fred.konrad@greensocs.com> 9 * 10 * This program is free software; you can redistribute it and/or modify --- 121 unchanged lines hidden (view full) --- 132 s->dpcd_info[DPCD_LANE_ALIGN_STATUS_UPDATED] = DPCD_INTERLANE_ALIGN_DONE; 133 s->dpcd_info[DPCD_SINK_STATUS] = DPCD_RECEIVE_PORT_0_STATUS; 134} 135 136static void dpcd_init(Object *obj) 137{ 138 DPCDState *s = DPCD(obj); 139 | 3 * 4 * Copyright (C) 2015 : GreenSocs Ltd 5 * http://www.greensocs.com/ , email: info@greensocs.com 6 * 7 * Developed by : 8 * Frederic Konrad <fred.konrad@greensocs.com> 9 * 10 * This program is free software; you can redistribute it and/or modify --- 121 unchanged lines hidden (view full) --- 132 s->dpcd_info[DPCD_LANE_ALIGN_STATUS_UPDATED] = DPCD_INTERLANE_ALIGN_DONE; 133 s->dpcd_info[DPCD_SINK_STATUS] = DPCD_RECEIVE_PORT_0_STATUS; 134} 135 136static void dpcd_init(Object *obj) 137{ 138 DPCDState *s = DPCD(obj); 139 |
140 memory_region_init_io(&s->iomem, obj, &aux_ops, s, TYPE_DPCD, 0x7FFFF); | 140 memory_region_init_io(&s->iomem, obj, &aux_ops, s, TYPE_DPCD, 0x80000); |
141 aux_init_mmio(AUX_SLAVE(obj), &s->iomem); 142} 143 144static const VMStateDescription vmstate_dpcd = { 145 .name = TYPE_DPCD, 146 .version_id = 0, 147 .minimum_version_id = 0, 148 .fields = (VMStateField[]) { --- 27 unchanged lines hidden --- | 141 aux_init_mmio(AUX_SLAVE(obj), &s->iomem); 142} 143 144static const VMStateDescription vmstate_dpcd = { 145 .name = TYPE_DPCD, 146 .version_id = 0, 147 .minimum_version_id = 0, 148 .fields = (VMStateField[]) { --- 27 unchanged lines hidden --- |