serial-pci.c (47b5264eb3e1cd2825e48d28fd0d1b239ed53974) | serial-pci.c (db895a1e6a97e919f9b86d60c969377357b05066) |
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1/* 2 * QEMU 16550A UART emulation 3 * 4 * Copyright (c) 2003-2004 Fabrice Bellard 5 * Copyright (c) 2008 Citrix Systems, Inc. 6 * 7 * Permission is hereby granted, free of charge, to any person obtaining a copy 8 * of this software and associated documentation files (the "Software"), to deal --- 13 unchanged lines hidden (view full) --- 22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 23 * THE SOFTWARE. 24 */ 25 26/* see docs/specs/pci-serial.txt */ 27 28#include "hw/char/serial.h" 29#include "hw/pci/pci.h" | 1/* 2 * QEMU 16550A UART emulation 3 * 4 * Copyright (c) 2003-2004 Fabrice Bellard 5 * Copyright (c) 2008 Citrix Systems, Inc. 6 * 7 * Permission is hereby granted, free of charge, to any person obtaining a copy 8 * of this software and associated documentation files (the "Software"), to deal --- 13 unchanged lines hidden (view full) --- 22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 23 * THE SOFTWARE. 24 */ 25 26/* see docs/specs/pci-serial.txt */ 27 28#include "hw/char/serial.h" 29#include "hw/pci/pci.h" |
30#include "qapi/qmp/qerror.h" |
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30 31#define PCI_SERIAL_MAX_PORTS 4 32 33typedef struct PCISerialState { 34 PCIDevice dev; 35 SerialState state; 36} PCISerialState; 37 --- 6 unchanged lines hidden (view full) --- 44 uint32_t level[PCI_SERIAL_MAX_PORTS]; 45 qemu_irq *irqs; 46} PCIMultiSerialState; 47 48static int serial_pci_init(PCIDevice *dev) 49{ 50 PCISerialState *pci = DO_UPCAST(PCISerialState, dev, dev); 51 SerialState *s = &pci->state; | 31 32#define PCI_SERIAL_MAX_PORTS 4 33 34typedef struct PCISerialState { 35 PCIDevice dev; 36 SerialState state; 37} PCISerialState; 38 --- 6 unchanged lines hidden (view full) --- 45 uint32_t level[PCI_SERIAL_MAX_PORTS]; 46 qemu_irq *irqs; 47} PCIMultiSerialState; 48 49static int serial_pci_init(PCIDevice *dev) 50{ 51 PCISerialState *pci = DO_UPCAST(PCISerialState, dev, dev); 52 SerialState *s = &pci->state; |
53 Error *err = NULL; |
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52 53 s->baudbase = 115200; | 54 55 s->baudbase = 115200; |
54 serial_init_core(s); | 56 serial_realize_core(s, &err); 57 if (err != NULL) { 58 qerror_report_err(err); 59 error_free(err); 60 return -1; 61 } |
55 56 pci->dev.config[PCI_INTERRUPT_PIN] = 0x01; 57 s->irq = pci->dev.irq[0]; 58 59 memory_region_init_io(&s->io, &serial_io_ops, s, "serial", 8); 60 pci_register_bar(&pci->dev, 0, PCI_BASE_ADDRESS_SPACE_IO, &s->io); 61 return 0; 62} --- 12 unchanged lines hidden (view full) --- 75 qemu_set_irq(pci->dev.irq[0], pending); 76} 77 78static int multi_serial_pci_init(PCIDevice *dev) 79{ 80 PCIDeviceClass *pc = PCI_DEVICE_GET_CLASS(dev); 81 PCIMultiSerialState *pci = DO_UPCAST(PCIMultiSerialState, dev, dev); 82 SerialState *s; | 62 63 pci->dev.config[PCI_INTERRUPT_PIN] = 0x01; 64 s->irq = pci->dev.irq[0]; 65 66 memory_region_init_io(&s->io, &serial_io_ops, s, "serial", 8); 67 pci_register_bar(&pci->dev, 0, PCI_BASE_ADDRESS_SPACE_IO, &s->io); 68 return 0; 69} --- 12 unchanged lines hidden (view full) --- 82 qemu_set_irq(pci->dev.irq[0], pending); 83} 84 85static int multi_serial_pci_init(PCIDevice *dev) 86{ 87 PCIDeviceClass *pc = PCI_DEVICE_GET_CLASS(dev); 88 PCIMultiSerialState *pci = DO_UPCAST(PCIMultiSerialState, dev, dev); 89 SerialState *s; |
90 Error *err = NULL; |
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83 int i; 84 85 switch (pc->device_id) { 86 case 0x0003: 87 pci->ports = 2; 88 break; 89 case 0x0004: 90 pci->ports = 4; --- 6 unchanged lines hidden (view full) --- 97 memory_region_init(&pci->iobar, "multiserial", 8 * pci->ports); 98 pci_register_bar(&pci->dev, 0, PCI_BASE_ADDRESS_SPACE_IO, &pci->iobar); 99 pci->irqs = qemu_allocate_irqs(multi_serial_irq_mux, pci, 100 pci->ports); 101 102 for (i = 0; i < pci->ports; i++) { 103 s = pci->state + i; 104 s->baudbase = 115200; | 91 int i; 92 93 switch (pc->device_id) { 94 case 0x0003: 95 pci->ports = 2; 96 break; 97 case 0x0004: 98 pci->ports = 4; --- 6 unchanged lines hidden (view full) --- 105 memory_region_init(&pci->iobar, "multiserial", 8 * pci->ports); 106 pci_register_bar(&pci->dev, 0, PCI_BASE_ADDRESS_SPACE_IO, &pci->iobar); 107 pci->irqs = qemu_allocate_irqs(multi_serial_irq_mux, pci, 108 pci->ports); 109 110 for (i = 0; i < pci->ports; i++) { 111 s = pci->state + i; 112 s->baudbase = 115200; |
105 serial_init_core(s); | 113 serial_realize_core(s, &err); 114 if (err != NULL) { 115 qerror_report_err(err); 116 error_free(err); 117 return -1; 118 } |
106 s->irq = pci->irqs[i]; 107 pci->name[i] = g_strdup_printf("uart #%d", i+1); 108 memory_region_init_io(&s->io, &serial_io_ops, s, pci->name[i], 8); 109 memory_region_add_subregion(&pci->iobar, 8 * i, &s->io); 110 } 111 return 0; 112} 113 --- 139 unchanged lines hidden --- | 119 s->irq = pci->irqs[i]; 120 pci->name[i] = g_strdup_printf("uart #%d", i+1); 121 memory_region_init_io(&s->io, &serial_io_ops, s, pci->name[i], 8); 122 memory_region_add_subregion(&pci->iobar, 8 * i, &s->io); 123 } 124 return 0; 125} 126 --- 139 unchanged lines hidden --- |