xlnx-versal.c (d780d056f8acdee73a1c34d95733851d58aecd60) | xlnx-versal.c (f4f318b41abe76a68ec1d616744ab9d6ec839abc) |
---|---|
1/* 2 * Xilinx Versal SoC model. 3 * 4 * Copyright (c) 2018 Xilinx Inc. 5 * Written by Edgar E. Iglesias 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License version 2 or --- 10 unchanged lines hidden (view full) --- 19#include "sysemu/sysemu.h" 20#include "sysemu/kvm.h" 21#include "hw/arm/boot.h" 22#include "kvm_arm.h" 23#include "hw/misc/unimp.h" 24#include "hw/arm/xlnx-versal.h" 25#include "qemu/log.h" 26#include "target/arm/cpu-qom.h" | 1/* 2 * Xilinx Versal SoC model. 3 * 4 * Copyright (c) 2018 Xilinx Inc. 5 * Written by Edgar E. Iglesias 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License version 2 or --- 10 unchanged lines hidden (view full) --- 19#include "sysemu/sysemu.h" 20#include "sysemu/kvm.h" 21#include "hw/arm/boot.h" 22#include "kvm_arm.h" 23#include "hw/misc/unimp.h" 24#include "hw/arm/xlnx-versal.h" 25#include "qemu/log.h" 26#include "target/arm/cpu-qom.h" |
27#include "target/arm/gtimer.h" |
|
27 28#define XLNX_VERSAL_ACPU_TYPE ARM_CPU_TYPE_NAME("cortex-a72") 29#define XLNX_VERSAL_RCPU_TYPE ARM_CPU_TYPE_NAME("cortex-r5f") 30#define GEM_REVISION 0x40070106 31 32#define VERSAL_NUM_PMC_APB_IRQS 18 33#define NUM_OSPI_IRQ_LINES 3 34 --- 963 unchanged lines hidden --- | 28 29#define XLNX_VERSAL_ACPU_TYPE ARM_CPU_TYPE_NAME("cortex-a72") 30#define XLNX_VERSAL_RCPU_TYPE ARM_CPU_TYPE_NAME("cortex-r5f") 31#define GEM_REVISION 0x40070106 32 33#define VERSAL_NUM_PMC_APB_IRQS 18 34#define NUM_OSPI_IRQ_LINES 3 35 --- 963 unchanged lines hidden --- |