stm32f205_soc.c (98a99ce0840991ed28fd4c570ae549c371e89970) stm32f205_soc.c (ba1ba5cca3962a9cc400c713c736b4fb8db1f38e)
1/*
2 * STM32F205 SoC
3 *
4 * Copyright (c) 2014 Alistair Francis <alistair@alistair23.me>
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights

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107 memory_region_add_subregion(system_memory, 0, flash_alias);
108
109 memory_region_init_ram(sram, NULL, "STM32F205.sram", SRAM_SIZE,
110 &error_fatal);
111 memory_region_add_subregion(system_memory, SRAM_BASE_ADDRESS, sram);
112
113 armv7m = DEVICE(&s->armv7m);
114 qdev_prop_set_uint32(armv7m, "num-irq", 96);
1/*
2 * STM32F205 SoC
3 *
4 * Copyright (c) 2014 Alistair Francis <alistair@alistair23.me>
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights

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107 memory_region_add_subregion(system_memory, 0, flash_alias);
108
109 memory_region_init_ram(sram, NULL, "STM32F205.sram", SRAM_SIZE,
110 &error_fatal);
111 memory_region_add_subregion(system_memory, SRAM_BASE_ADDRESS, sram);
112
113 armv7m = DEVICE(&s->armv7m);
114 qdev_prop_set_uint32(armv7m, "num-irq", 96);
115 qdev_prop_set_string(armv7m, "cpu-model", s->cpu_model);
115 qdev_prop_set_string(armv7m, "cpu-type", s->cpu_type);
116 object_property_set_link(OBJECT(&s->armv7m), OBJECT(get_system_memory()),
117 "memory", &error_abort);
118 object_property_set_bool(OBJECT(&s->armv7m), true, "realized", &err);
119 if (err != NULL) {
120 error_propagate(errp, err);
121 return;
122 }
123

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195 }
196 busdev = SYS_BUS_DEVICE(dev);
197 sysbus_mmio_map(busdev, 0, spi_addr[i]);
198 sysbus_connect_irq(busdev, 0, qdev_get_gpio_in(armv7m, spi_irq[i]));
199 }
200}
201
202static Property stm32f205_soc_properties[] = {
116 object_property_set_link(OBJECT(&s->armv7m), OBJECT(get_system_memory()),
117 "memory", &error_abort);
118 object_property_set_bool(OBJECT(&s->armv7m), true, "realized", &err);
119 if (err != NULL) {
120 error_propagate(errp, err);
121 return;
122 }
123

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195 }
196 busdev = SYS_BUS_DEVICE(dev);
197 sysbus_mmio_map(busdev, 0, spi_addr[i]);
198 sysbus_connect_irq(busdev, 0, qdev_get_gpio_in(armv7m, spi_irq[i]));
199 }
200}
201
202static Property stm32f205_soc_properties[] = {
203 DEFINE_PROP_STRING("cpu-model", STM32F205State, cpu_model),
203 DEFINE_PROP_STRING("cpu-type", STM32F205State, cpu_type),
204 DEFINE_PROP_END_OF_LIST(),
205};
206
207static void stm32f205_soc_class_init(ObjectClass *klass, void *data)
208{
209 DeviceClass *dc = DEVICE_CLASS(klass);
210
211 dc->realize = stm32f205_soc_realize;

--- 17 unchanged lines hidden --- 		204 DEFINE_PROP_END_OF_LIST(),
205};
206
207static void stm32f205_soc_class_init(ObjectClass *klass, void *data)
208{
209 DeviceClass *dc = DEVICE_CLASS(klass);
210
211 dc->realize = stm32f205_soc_realize;

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