npcm7xx.c (d45a5270d075ea589f0b0ddcf963a5fea1f500ac) npcm7xx.c (0a9df6cb9fb8f98258e51797e59ecaf9ef6b79a2)
1/*
2 * Nuvoton NPCM7xx SoC family.
3 *
4 * Copyright 2020 Google LLC
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or

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58#define NPCM7XX_RAM3_SZ (4 * KiB)
59
60/* Memory blocks at the end of the address space */
61#define NPCM7XX_RAM2_BA (0xfffd0000)
62#define NPCM7XX_RAM2_SZ (128 * KiB)
63#define NPCM7XX_ROM_BA (0xffff0000)
64#define NPCM7XX_ROM_SZ (64 * KiB)
65
1/*
2 * Nuvoton NPCM7xx SoC family.
3 *
4 * Copyright 2020 Google LLC
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or

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58#define NPCM7XX_RAM3_SZ (4 * KiB)
59
60/* Memory blocks at the end of the address space */
61#define NPCM7XX_RAM2_BA (0xfffd0000)
62#define NPCM7XX_RAM2_SZ (128 * KiB)
63#define NPCM7XX_ROM_BA (0xffff0000)
64#define NPCM7XX_ROM_SZ (64 * KiB)
65
66/* SDHCI Modules */
67#define NPCM7XX_MMC_BA (0xf0842000)
66
67/* Clock configuration values to be fixed up when bypassing bootloader */
68
69/* Run PLL1 at 1600 MHz */
70#define NPCM7XX_PLLCON1_FIXUP_VAL (0x00402101)
71/* Run the CPU from PLL1 and UART from PLL2 */
72#define NPCM7XX_CLKSEL_FIXUP_VAL (0x004aaba9)
73

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78enum NPCM7xxInterrupt {
79 NPCM7XX_ADC_IRQ = 0,
80 NPCM7XX_UART0_IRQ = 2,
81 NPCM7XX_UART1_IRQ,
82 NPCM7XX_UART2_IRQ,
83 NPCM7XX_UART3_IRQ,
84 NPCM7XX_EMC1RX_IRQ = 15,
85 NPCM7XX_EMC1TX_IRQ,
68
69/* Clock configuration values to be fixed up when bypassing bootloader */
70
71/* Run PLL1 at 1600 MHz */
72#define NPCM7XX_PLLCON1_FIXUP_VAL (0x00402101)
73/* Run the CPU from PLL1 and UART from PLL2 */
74#define NPCM7XX_CLKSEL_FIXUP_VAL (0x004aaba9)
75

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80enum NPCM7xxInterrupt {
81 NPCM7XX_ADC_IRQ = 0,
82 NPCM7XX_UART0_IRQ = 2,
83 NPCM7XX_UART1_IRQ,
84 NPCM7XX_UART2_IRQ,
85 NPCM7XX_UART3_IRQ,
86 NPCM7XX_EMC1RX_IRQ = 15,
87 NPCM7XX_EMC1TX_IRQ,
88 NPCM7XX_MMC_IRQ = 26,
86 NPCM7XX_TIMER0_IRQ = 32, /* Timer Module 0 */
87 NPCM7XX_TIMER1_IRQ,
88 NPCM7XX_TIMER2_IRQ,
89 NPCM7XX_TIMER3_IRQ,
90 NPCM7XX_TIMER4_IRQ,
91 NPCM7XX_TIMER5_IRQ, /* Timer Module 1 */
92 NPCM7XX_TIMER6_IRQ,
93 NPCM7XX_TIMER7_IRQ,

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438
439 for (i = 0; i < ARRAY_SIZE(s->mft); i++) {
440 object_initialize_child(obj, "mft[*]", &s->mft[i], TYPE_NPCM7XX_MFT);
441 }
442
443 for (i = 0; i < ARRAY_SIZE(s->emc); i++) {
444 object_initialize_child(obj, "emc[*]", &s->emc[i], TYPE_NPCM7XX_EMC);
445 }
89 NPCM7XX_TIMER0_IRQ = 32, /* Timer Module 0 */
90 NPCM7XX_TIMER1_IRQ,
91 NPCM7XX_TIMER2_IRQ,
92 NPCM7XX_TIMER3_IRQ,
93 NPCM7XX_TIMER4_IRQ,
94 NPCM7XX_TIMER5_IRQ, /* Timer Module 1 */
95 NPCM7XX_TIMER6_IRQ,
96 NPCM7XX_TIMER7_IRQ,

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441
442 for (i = 0; i < ARRAY_SIZE(s->mft); i++) {
443 object_initialize_child(obj, "mft[*]", &s->mft[i], TYPE_NPCM7XX_MFT);
444 }
445
446 for (i = 0; i < ARRAY_SIZE(s->emc); i++) {
447 object_initialize_child(obj, "emc[*]", &s->emc[i], TYPE_NPCM7XX_EMC);
448 }
449
450 object_initialize_child(obj, "mmc", &s->mmc, TYPE_NPCM7XX_SDHCI);
446}
447
448static void npcm7xx_realize(DeviceState *dev, Error **errp)
449{
450 NPCM7xxState *s = NPCM7XX(dev);
451 NPCM7xxClass *nc = NPCM7XX_GET_CLASS(s);
452 int i;
453

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702 NPCM7XX_RAM3_SZ, &error_abort);
703 memory_region_add_subregion(get_system_memory(), NPCM7XX_RAM3_BA, &s->ram3);
704
705 /* Internal ROM */
706 memory_region_init_rom(&s->irom, OBJECT(dev), "irom", NPCM7XX_ROM_SZ,
707 &error_abort);
708 memory_region_add_subregion(get_system_memory(), NPCM7XX_ROM_BA, &s->irom);
709
451}
452
453static void npcm7xx_realize(DeviceState *dev, Error **errp)
454{
455 NPCM7xxState *s = NPCM7XX(dev);
456 NPCM7xxClass *nc = NPCM7XX_GET_CLASS(s);
457 int i;
458

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707 NPCM7XX_RAM3_SZ, &error_abort);
708 memory_region_add_subregion(get_system_memory(), NPCM7XX_RAM3_BA, &s->ram3);
709
710 /* Internal ROM */
711 memory_region_init_rom(&s->irom, OBJECT(dev), "irom", NPCM7XX_ROM_SZ,
712 &error_abort);
713 memory_region_add_subregion(get_system_memory(), NPCM7XX_ROM_BA, &s->irom);
714
715 /* SDHCI */
716 sysbus_realize(SYS_BUS_DEVICE(&s->mmc), &error_abort);
717 sysbus_mmio_map(SYS_BUS_DEVICE(&s->mmc), 0, NPCM7XX_MMC_BA);
718 sysbus_connect_irq(SYS_BUS_DEVICE(&s->mmc), 0,
719 npcm7xx_irq(s, NPCM7XX_MMC_IRQ));
720
710 create_unimplemented_device("npcm7xx.shm", 0xc0001000, 4 * KiB);
711 create_unimplemented_device("npcm7xx.vdmx", 0xe0800000, 4 * KiB);
712 create_unimplemented_device("npcm7xx.pcierc", 0xe1000000, 64 * KiB);
713 create_unimplemented_device("npcm7xx.kcs", 0xf0007000, 4 * KiB);
714 create_unimplemented_device("npcm7xx.gfxi", 0xf000e000, 4 * KiB);
715 create_unimplemented_device("npcm7xx.espi", 0xf009f000, 4 * KiB);
716 create_unimplemented_device("npcm7xx.peci", 0xf0100000, 4 * KiB);
717 create_unimplemented_device("npcm7xx.siox[1]", 0xf0101000, 4 * KiB);

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731 create_unimplemented_device("npcm7xx.usbd[3]", 0xf0833000, 4 * KiB);
732 create_unimplemented_device("npcm7xx.usbd[4]", 0xf0834000, 4 * KiB);
733 create_unimplemented_device("npcm7xx.usbd[5]", 0xf0835000, 4 * KiB);
734 create_unimplemented_device("npcm7xx.usbd[6]", 0xf0836000, 4 * KiB);
735 create_unimplemented_device("npcm7xx.usbd[7]", 0xf0837000, 4 * KiB);
736 create_unimplemented_device("npcm7xx.usbd[8]", 0xf0838000, 4 * KiB);
737 create_unimplemented_device("npcm7xx.usbd[9]", 0xf0839000, 4 * KiB);
738 create_unimplemented_device("npcm7xx.sd", 0xf0840000, 8 * KiB);
721 create_unimplemented_device("npcm7xx.shm", 0xc0001000, 4 * KiB);
722 create_unimplemented_device("npcm7xx.vdmx", 0xe0800000, 4 * KiB);
723 create_unimplemented_device("npcm7xx.pcierc", 0xe1000000, 64 * KiB);
724 create_unimplemented_device("npcm7xx.kcs", 0xf0007000, 4 * KiB);
725 create_unimplemented_device("npcm7xx.gfxi", 0xf000e000, 4 * KiB);
726 create_unimplemented_device("npcm7xx.espi", 0xf009f000, 4 * KiB);
727 create_unimplemented_device("npcm7xx.peci", 0xf0100000, 4 * KiB);
728 create_unimplemented_device("npcm7xx.siox[1]", 0xf0101000, 4 * KiB);

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742 create_unimplemented_device("npcm7xx.usbd[3]", 0xf0833000, 4 * KiB);
743 create_unimplemented_device("npcm7xx.usbd[4]", 0xf0834000, 4 * KiB);
744 create_unimplemented_device("npcm7xx.usbd[5]", 0xf0835000, 4 * KiB);
745 create_unimplemented_device("npcm7xx.usbd[6]", 0xf0836000, 4 * KiB);
746 create_unimplemented_device("npcm7xx.usbd[7]", 0xf0837000, 4 * KiB);
747 create_unimplemented_device("npcm7xx.usbd[8]", 0xf0838000, 4 * KiB);
748 create_unimplemented_device("npcm7xx.usbd[9]", 0xf0839000, 4 * KiB);
749 create_unimplemented_device("npcm7xx.sd", 0xf0840000, 8 * KiB);
739 create_unimplemented_device("npcm7xx.mmc", 0xf0842000, 8 * KiB);
740 create_unimplemented_device("npcm7xx.pcimbx", 0xf0848000, 512 * KiB);
741 create_unimplemented_device("npcm7xx.aes", 0xf0858000, 4 * KiB);
742 create_unimplemented_device("npcm7xx.des", 0xf0859000, 4 * KiB);
743 create_unimplemented_device("npcm7xx.sha", 0xf085a000, 4 * KiB);
744 create_unimplemented_device("npcm7xx.secacc", 0xf085b000, 4 * KiB);
745 create_unimplemented_device("npcm7xx.spixcs0", 0xf8000000, 16 * MiB);
746 create_unimplemented_device("npcm7xx.spixcs1", 0xf9000000, 16 * MiB);
747 create_unimplemented_device("npcm7xx.spix", 0xfb001000, 4 * KiB);

--- 56 unchanged lines hidden --- 		750 create_unimplemented_device("npcm7xx.pcimbx", 0xf0848000, 512 * KiB);
751 create_unimplemented_device("npcm7xx.aes", 0xf0858000, 4 * KiB);
752 create_unimplemented_device("npcm7xx.des", 0xf0859000, 4 * KiB);
753 create_unimplemented_device("npcm7xx.sha", 0xf085a000, 4 * KiB);
754 create_unimplemented_device("npcm7xx.secacc", 0xf085b000, 4 * KiB);
755 create_unimplemented_device("npcm7xx.spixcs0", 0xf8000000, 16 * MiB);
756 create_unimplemented_device("npcm7xx.spixcs1", 0xf9000000, 16 * MiB);
757 create_unimplemented_device("npcm7xx.spix", 0xfb001000, 4 * KiB);

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