npcm7xx.c - OpenGrok cross reference for /openbmc/qemu/hw/arm/npcm7xx.c

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npcm7xx.c (77c05b0b746119a78bffb595b0313d39ac6b20fc)	npcm7xx.c (1e943c586a03f049be8f4080376884f1d4971592)
1/* 2 * Nuvoton NPCM7xx SoC family. 3 * 4 * Copyright 2020 Google LLC 5 * 6 * This program is free software; you can redistribute it and/or modify it 7 * under the terms of the GNU General Public License as published by the 8 * Free Software Foundation; either version 2 of the License, or --- 88 unchanged lines hidden (view full) --- 97 NPCM7XX_TIMER12_IRQ, 98 NPCM7XX_TIMER13_IRQ, 99 NPCM7XX_TIMER14_IRQ, 100 NPCM7XX_WDG0_IRQ = 47, /* Timer Module 0 Watchdog / 101 NPCM7XX_WDG1_IRQ, / Timer Module 1 Watchdog / 102 NPCM7XX_WDG2_IRQ, / Timer Module 2 Watchdog */ 103 NPCM7XX_EHCI_IRQ = 61, 104 NPCM7XX_OHCI_IRQ = 62,	1/* 2 * Nuvoton NPCM7xx SoC family. 3 * 4 * Copyright 2020 Google LLC 5 * 6 * This program is free software; you can redistribute it and/or modify it 7 * under the terms of the GNU General Public License as published by the 8 * Free Software Foundation; either version 2 of the License, or --- 88 unchanged lines hidden (view full) --- 97 NPCM7XX_TIMER12_IRQ, 98 NPCM7XX_TIMER13_IRQ, 99 NPCM7XX_TIMER14_IRQ, 100 NPCM7XX_WDG0_IRQ = 47, /* Timer Module 0 Watchdog / 101 NPCM7XX_WDG1_IRQ, / Timer Module 1 Watchdog / 102 NPCM7XX_WDG2_IRQ, / Timer Module 2 Watchdog */ 103 NPCM7XX_EHCI_IRQ = 61, 104 NPCM7XX_OHCI_IRQ = 62,
	105 NPCM7XX_PWM0_IRQ = 93, /* PWM module 0 / 106 NPCM7XX_PWM1_IRQ, / PWM module 1 */
105 NPCM7XX_GPIO0_IRQ = 116, 106 NPCM7XX_GPIO1_IRQ, 107 NPCM7XX_GPIO2_IRQ, 108 NPCM7XX_GPIO3_IRQ, 109 NPCM7XX_GPIO4_IRQ, 110 NPCM7XX_GPIO5_IRQ, 111 NPCM7XX_GPIO6_IRQ, 112 NPCM7XX_GPIO7_IRQ, --- 26 unchanged lines hidden (view full) --- 139/* Direct memory-mapped access to SPI3 CS0-3. / 140static const hwaddr npcm7xx_fiu3_flash_addr[] = { 141 0xa0000000, / CS0 / 142 0xa8000000, / CS1 / 143 0xb0000000, / CS2 / 144 0xb8000000, / CS3 */ 145}; 146	107 NPCM7XX_GPIO0_IRQ = 116, 108 NPCM7XX_GPIO1_IRQ, 109 NPCM7XX_GPIO2_IRQ, 110 NPCM7XX_GPIO3_IRQ, 111 NPCM7XX_GPIO4_IRQ, 112 NPCM7XX_GPIO5_IRQ, 113 NPCM7XX_GPIO6_IRQ, 114 NPCM7XX_GPIO7_IRQ, --- 26 unchanged lines hidden (view full) --- 141/* Direct memory-mapped access to SPI3 CS0-3. / 142static const hwaddr npcm7xx_fiu3_flash_addr[] = { 143 0xa0000000, / CS0 / 144 0xa8000000, / CS1 / 145 0xb0000000, / CS2 / 146 0xb8000000, / CS3 */ 147}; 148
	149/* Register base address for each PWM Module */ 150static const hwaddr npcm7xx_pwm_addr[] = { 151 0xf0103000, 152 0xf0104000, 153}; 154
147static const struct { 148 hwaddr regs_addr; 149 uint32_t unconnected_pins; 150 uint32_t reset_pu; 151 uint32_t reset_pd; 152 uint32_t reset_osrc; 153 uint32_t reset_odsc; 154} npcm7xx_gpio[] = { --- 193 unchanged lines hidden (view full) --- 348 object_initialize_child(obj, "ehci", &s->ehci, TYPE_NPCM7XX_EHCI); 349 object_initialize_child(obj, "ohci", &s->ohci, TYPE_SYSBUS_OHCI); 350 351 QEMU_BUILD_BUG_ON(ARRAY_SIZE(npcm7xx_fiu) != ARRAY_SIZE(s->fiu)); 352 for (i = 0; i < ARRAY_SIZE(s->fiu); i++) { 353 object_initialize_child(obj, npcm7xx_fiu[i].name, &s->fiu[i], 354 TYPE_NPCM7XX_FIU); 355 }	155static const struct { 156 hwaddr regs_addr; 157 uint32_t unconnected_pins; 158 uint32_t reset_pu; 159 uint32_t reset_pd; 160 uint32_t reset_osrc; 161 uint32_t reset_odsc; 162} npcm7xx_gpio[] = { --- 193 unchanged lines hidden (view full) --- 356 object_initialize_child(obj, "ehci", &s->ehci, TYPE_NPCM7XX_EHCI); 357 object_initialize_child(obj, "ohci", &s->ohci, TYPE_SYSBUS_OHCI); 358 359 QEMU_BUILD_BUG_ON(ARRAY_SIZE(npcm7xx_fiu) != ARRAY_SIZE(s->fiu)); 360 for (i = 0; i < ARRAY_SIZE(s->fiu); i++) { 361 object_initialize_child(obj, npcm7xx_fiu[i].name, &s->fiu[i], 362 TYPE_NPCM7XX_FIU); 363 }
	364 365 for (i = 0; i < ARRAY_SIZE(s->pwm); i++) { 366 object_initialize_child(obj, "pwm[*]", &s->pwm[i], TYPE_NPCM7XX_PWM); 367 }
356} 357 358static void npcm7xx_realize(DeviceState dev, Error errp) 359{ 360 NPCM7xxState s = NPCM7XX(dev); 361 NPCM7xxClass nc = NPCM7XX_GET_CLASS(s); 362 int i; 363 --- 144 unchanged lines hidden* (view full) --- 508 object_property_set_str(OBJECT(&s->ohci), "masterbus", "usb-bus.0", 509 &error_abort); 510 object_property_set_uint(OBJECT(&s->ohci), "num-ports", 1, &error_abort); 511 sysbus_realize(SYS_BUS_DEVICE(&s->ohci), &error_abort); 512 sysbus_mmio_map(SYS_BUS_DEVICE(&s->ohci), 0, NPCM7XX_OHCI_BA); 513 sysbus_connect_irq(SYS_BUS_DEVICE(&s->ohci), 0, 514 npcm7xx_irq(s, NPCM7XX_OHCI_IRQ)); 515	368} 369 370static void npcm7xx_realize(DeviceState dev, Error errp) 371{ 372 NPCM7xxState s = NPCM7XX(dev); 373 NPCM7xxClass nc = NPCM7XX_GET_CLASS(s); 374 int i; 375 --- 144 unchanged lines hidden* (view full) --- 520 object_property_set_str(OBJECT(&s->ohci), "masterbus", "usb-bus.0", 521 &error_abort); 522 object_property_set_uint(OBJECT(&s->ohci), "num-ports", 1, &error_abort); 523 sysbus_realize(SYS_BUS_DEVICE(&s->ohci), &error_abort); 524 sysbus_mmio_map(SYS_BUS_DEVICE(&s->ohci), 0, NPCM7XX_OHCI_BA); 525 sysbus_connect_irq(SYS_BUS_DEVICE(&s->ohci), 0, 526 npcm7xx_irq(s, NPCM7XX_OHCI_IRQ)); 527
	528 /* PWM Modules. Cannot fail. / 529 QEMU_BUILD_BUG_ON(ARRAY_SIZE(npcm7xx_pwm_addr) != ARRAY_SIZE(s->pwm)); 530 for (i = 0; i < ARRAY_SIZE(s->pwm); i++) { 531 SysBusDevice sbd = SYS_BUS_DEVICE(&s->pwm[i]); 532 533 qdev_connect_clock_in(DEVICE(&s->pwm[i]), "clock", qdev_get_clock_out( 534 DEVICE(&s->clk), "apb3-clock")); 535 sysbus_realize(sbd, &error_abort); 536 sysbus_mmio_map(sbd, 0, npcm7xx_pwm_addr[i]); 537 sysbus_connect_irq(sbd, i, npcm7xx_irq(s, NPCM7XX_PWM0_IRQ + i)); 538 } 539
516 /* 517 * Flash Interface Unit (FIU). Can fail if incorrect number of chip selects 518 * specified, but this is a programming error. 519 / 520 QEMU_BUILD_BUG_ON(ARRAY_SIZE(npcm7xx_fiu) != ARRAY_SIZE(s->fiu)); 521 for (i = 0; i < ARRAY_SIZE(s->fiu); i++) { 522 SysBusDevice sbd = SYS_BUS_DEVICE(&s->fiu[i]); 523 int j; --- 51 unchanged lines hidden (view full) --- 575 create_unimplemented_device("npcm7xx.smbus[12]", 0xf008c000, 4 * KiB); 576 create_unimplemented_device("npcm7xx.smbus[13]", 0xf008d000, 4 * KiB); 577 create_unimplemented_device("npcm7xx.smbus[14]", 0xf008e000, 4 * KiB); 578 create_unimplemented_device("npcm7xx.smbus[15]", 0xf008f000, 4 * KiB); 579 create_unimplemented_device("npcm7xx.espi", 0xf009f000, 4 * KiB); 580 create_unimplemented_device("npcm7xx.peci", 0xf0100000, 4 * KiB); 581 create_unimplemented_device("npcm7xx.siox[1]", 0xf0101000, 4 * KiB); 582 create_unimplemented_device("npcm7xx.siox[2]", 0xf0102000, 4 * KiB);	540 /* 541 * Flash Interface Unit (FIU). Can fail if incorrect number of chip selects 542 * specified, but this is a programming error. 543 / 544 QEMU_BUILD_BUG_ON(ARRAY_SIZE(npcm7xx_fiu) != ARRAY_SIZE(s->fiu)); 545 for (i = 0; i < ARRAY_SIZE(s->fiu); i++) { 546 SysBusDevice sbd = SYS_BUS_DEVICE(&s->fiu[i]); 547 int j; --- 51 unchanged lines hidden (view full) --- 599 create_unimplemented_device("npcm7xx.smbus[12]", 0xf008c000, 4 * KiB); 600 create_unimplemented_device("npcm7xx.smbus[13]", 0xf008d000, 4 * KiB); 601 create_unimplemented_device("npcm7xx.smbus[14]", 0xf008e000, 4 * KiB); 602 create_unimplemented_device("npcm7xx.smbus[15]", 0xf008f000, 4 * KiB); 603 create_unimplemented_device("npcm7xx.espi", 0xf009f000, 4 * KiB); 604 create_unimplemented_device("npcm7xx.peci", 0xf0100000, 4 * KiB); 605 create_unimplemented_device("npcm7xx.siox[1]", 0xf0101000, 4 * KiB); 606 create_unimplemented_device("npcm7xx.siox[2]", 0xf0102000, 4 * KiB);
583 create_unimplemented_device("npcm7xx.pwm[0]", 0xf0103000, 4 * KiB); 584 create_unimplemented_device("npcm7xx.pwm[1]", 0xf0104000, 4 * KiB);
585 create_unimplemented_device("npcm7xx.mft[0]", 0xf0180000, 4 * KiB); 586 create_unimplemented_device("npcm7xx.mft[1]", 0xf0181000, 4 * KiB); 587 create_unimplemented_device("npcm7xx.mft[2]", 0xf0182000, 4 * KiB); 588 create_unimplemented_device("npcm7xx.mft[3]", 0xf0183000, 4 * KiB); 589 create_unimplemented_device("npcm7xx.mft[4]", 0xf0184000, 4 * KiB); 590 create_unimplemented_device("npcm7xx.mft[5]", 0xf0185000, 4 * KiB); 591 create_unimplemented_device("npcm7xx.mft[6]", 0xf0186000, 4 * KiB); 592 create_unimplemented_device("npcm7xx.mft[7]", 0xf0187000, 4 * KiB); --- 87 unchanged lines hidden ---	607 create_unimplemented_device("npcm7xx.mft[0]", 0xf0180000, 4 * KiB); 608 create_unimplemented_device("npcm7xx.mft[1]", 0xf0181000, 4 * KiB); 609 create_unimplemented_device("npcm7xx.mft[2]", 0xf0182000, 4 * KiB); 610 create_unimplemented_device("npcm7xx.mft[3]", 0xf0183000, 4 * KiB); 611 create_unimplemented_device("npcm7xx.mft[4]", 0xf0184000, 4 * KiB); 612 create_unimplemented_device("npcm7xx.mft[5]", 0xf0185000, 4 * KiB); 613 create_unimplemented_device("npcm7xx.mft[6]", 0xf0186000, 4 * KiB); 614 create_unimplemented_device("npcm7xx.mft[7]", 0xf0187000, 4 * KiB); --- 87 unchanged lines hidden ---

npcm7xx.c (77c05b0b746119a78bffb595b0313d39ac6b20fc)	npcm7xx.c (1e943c586a03f049be8f4080376884f1d4971592)
1/* 2 * Nuvoton NPCM7xx SoC family. 3 * 4 * Copyright 2020 Google LLC 5 * 6 * This program is free software; you can redistribute it and/or modify it 7 * under the terms of the GNU General Public License as published by the 8 * Free Software Foundation; either version 2 of the License, or --- 88 unchanged lines hidden (view full) --- 97 NPCM7XX_TIMER12_IRQ, 98 NPCM7XX_TIMER13_IRQ, 99 NPCM7XX_TIMER14_IRQ, 100 NPCM7XX_WDG0_IRQ = 47, /* Timer Module 0 Watchdog / 101 NPCM7XX_WDG1_IRQ, / Timer Module 1 Watchdog / 102 NPCM7XX_WDG2_IRQ, / Timer Module 2 Watchdog */ 103 NPCM7XX_EHCI_IRQ = 61, 104 NPCM7XX_OHCI_IRQ = 62,	1/* 2 * Nuvoton NPCM7xx SoC family. 3 * 4 * Copyright 2020 Google LLC 5 * 6 * This program is free software; you can redistribute it and/or modify it 7 * under the terms of the GNU General Public License as published by the 8 * Free Software Foundation; either version 2 of the License, or --- 88 unchanged lines hidden (view full) --- 97 NPCM7XX_TIMER12_IRQ, 98 NPCM7XX_TIMER13_IRQ, 99 NPCM7XX_TIMER14_IRQ, 100 NPCM7XX_WDG0_IRQ = 47, /* Timer Module 0 Watchdog / 101 NPCM7XX_WDG1_IRQ, / Timer Module 1 Watchdog / 102 NPCM7XX_WDG2_IRQ, / Timer Module 2 Watchdog */ 103 NPCM7XX_EHCI_IRQ = 61, 104 NPCM7XX_OHCI_IRQ = 62,
	105 NPCM7XX_PWM0_IRQ = 93, /* PWM module 0 / 106 NPCM7XX_PWM1_IRQ, / PWM module 1 */
105 NPCM7XX_GPIO0_IRQ = 116, 106 NPCM7XX_GPIO1_IRQ, 107 NPCM7XX_GPIO2_IRQ, 108 NPCM7XX_GPIO3_IRQ, 109 NPCM7XX_GPIO4_IRQ, 110 NPCM7XX_GPIO5_IRQ, 111 NPCM7XX_GPIO6_IRQ, 112 NPCM7XX_GPIO7_IRQ, --- 26 unchanged lines hidden (view full) --- 139/* Direct memory-mapped access to SPI3 CS0-3. / 140static const hwaddr npcm7xx_fiu3_flash_addr[] = { 141 0xa0000000, / CS0 / 142 0xa8000000, / CS1 / 143 0xb0000000, / CS2 / 144 0xb8000000, / CS3 */ 145}; 146	107 NPCM7XX_GPIO0_IRQ = 116, 108 NPCM7XX_GPIO1_IRQ, 109 NPCM7XX_GPIO2_IRQ, 110 NPCM7XX_GPIO3_IRQ, 111 NPCM7XX_GPIO4_IRQ, 112 NPCM7XX_GPIO5_IRQ, 113 NPCM7XX_GPIO6_IRQ, 114 NPCM7XX_GPIO7_IRQ, --- 26 unchanged lines hidden (view full) --- 141/* Direct memory-mapped access to SPI3 CS0-3. / 142static const hwaddr npcm7xx_fiu3_flash_addr[] = { 143 0xa0000000, / CS0 / 144 0xa8000000, / CS1 / 145 0xb0000000, / CS2 / 146 0xb8000000, / CS3 */ 147}; 148
	149/* Register base address for each PWM Module */ 150static const hwaddr npcm7xx_pwm_addr[] = { 151 0xf0103000, 152 0xf0104000, 153}; 154
147static const struct { 148 hwaddr regs_addr; 149 uint32_t unconnected_pins; 150 uint32_t reset_pu; 151 uint32_t reset_pd; 152 uint32_t reset_osrc; 153 uint32_t reset_odsc; 154} npcm7xx_gpio[] = { --- 193 unchanged lines hidden (view full) --- 348 object_initialize_child(obj, "ehci", &s->ehci, TYPE_NPCM7XX_EHCI); 349 object_initialize_child(obj, "ohci", &s->ohci, TYPE_SYSBUS_OHCI); 350 351 QEMU_BUILD_BUG_ON(ARRAY_SIZE(npcm7xx_fiu) != ARRAY_SIZE(s->fiu)); 352 for (i = 0; i < ARRAY_SIZE(s->fiu); i++) { 353 object_initialize_child(obj, npcm7xx_fiu[i].name, &s->fiu[i], 354 TYPE_NPCM7XX_FIU); 355 }	155static const struct { 156 hwaddr regs_addr; 157 uint32_t unconnected_pins; 158 uint32_t reset_pu; 159 uint32_t reset_pd; 160 uint32_t reset_osrc; 161 uint32_t reset_odsc; 162} npcm7xx_gpio[] = { --- 193 unchanged lines hidden (view full) --- 356 object_initialize_child(obj, "ehci", &s->ehci, TYPE_NPCM7XX_EHCI); 357 object_initialize_child(obj, "ohci", &s->ohci, TYPE_SYSBUS_OHCI); 358 359 QEMU_BUILD_BUG_ON(ARRAY_SIZE(npcm7xx_fiu) != ARRAY_SIZE(s->fiu)); 360 for (i = 0; i < ARRAY_SIZE(s->fiu); i++) { 361 object_initialize_child(obj, npcm7xx_fiu[i].name, &s->fiu[i], 362 TYPE_NPCM7XX_FIU); 363 }
	364 365 for (i = 0; i < ARRAY_SIZE(s->pwm); i++) { 366 object_initialize_child(obj, "pwm[*]", &s->pwm[i], TYPE_NPCM7XX_PWM); 367 }
356} 357 358static void npcm7xx_realize(DeviceState dev, Error errp) 359{ 360 NPCM7xxState s = NPCM7XX(dev); 361 NPCM7xxClass nc = NPCM7XX_GET_CLASS(s); 362 int i; 363 --- 144 unchanged lines hidden* (view full) --- 508 object_property_set_str(OBJECT(&s->ohci), "masterbus", "usb-bus.0", 509 &error_abort); 510 object_property_set_uint(OBJECT(&s->ohci), "num-ports", 1, &error_abort); 511 sysbus_realize(SYS_BUS_DEVICE(&s->ohci), &error_abort); 512 sysbus_mmio_map(SYS_BUS_DEVICE(&s->ohci), 0, NPCM7XX_OHCI_BA); 513 sysbus_connect_irq(SYS_BUS_DEVICE(&s->ohci), 0, 514 npcm7xx_irq(s, NPCM7XX_OHCI_IRQ)); 515	368} 369 370static void npcm7xx_realize(DeviceState dev, Error errp) 371{ 372 NPCM7xxState s = NPCM7XX(dev); 373 NPCM7xxClass nc = NPCM7XX_GET_CLASS(s); 374 int i; 375 --- 144 unchanged lines hidden* (view full) --- 520 object_property_set_str(OBJECT(&s->ohci), "masterbus", "usb-bus.0", 521 &error_abort); 522 object_property_set_uint(OBJECT(&s->ohci), "num-ports", 1, &error_abort); 523 sysbus_realize(SYS_BUS_DEVICE(&s->ohci), &error_abort); 524 sysbus_mmio_map(SYS_BUS_DEVICE(&s->ohci), 0, NPCM7XX_OHCI_BA); 525 sysbus_connect_irq(SYS_BUS_DEVICE(&s->ohci), 0, 526 npcm7xx_irq(s, NPCM7XX_OHCI_IRQ)); 527
	528 /* PWM Modules. Cannot fail. / 529 QEMU_BUILD_BUG_ON(ARRAY_SIZE(npcm7xx_pwm_addr) != ARRAY_SIZE(s->pwm)); 530 for (i = 0; i < ARRAY_SIZE(s->pwm); i++) { 531 SysBusDevice sbd = SYS_BUS_DEVICE(&s->pwm[i]); 532 533 qdev_connect_clock_in(DEVICE(&s->pwm[i]), "clock", qdev_get_clock_out( 534 DEVICE(&s->clk), "apb3-clock")); 535 sysbus_realize(sbd, &error_abort); 536 sysbus_mmio_map(sbd, 0, npcm7xx_pwm_addr[i]); 537 sysbus_connect_irq(sbd, i, npcm7xx_irq(s, NPCM7XX_PWM0_IRQ + i)); 538 } 539
516 /* 517 * Flash Interface Unit (FIU). Can fail if incorrect number of chip selects 518 * specified, but this is a programming error. 519 / 520 QEMU_BUILD_BUG_ON(ARRAY_SIZE(npcm7xx_fiu) != ARRAY_SIZE(s->fiu)); 521 for (i = 0; i < ARRAY_SIZE(s->fiu); i++) { 522 SysBusDevice sbd = SYS_BUS_DEVICE(&s->fiu[i]); 523 int j; --- 51 unchanged lines hidden (view full) --- 575 create_unimplemented_device("npcm7xx.smbus[12]", 0xf008c000, 4 * KiB); 576 create_unimplemented_device("npcm7xx.smbus[13]", 0xf008d000, 4 * KiB); 577 create_unimplemented_device("npcm7xx.smbus[14]", 0xf008e000, 4 * KiB); 578 create_unimplemented_device("npcm7xx.smbus[15]", 0xf008f000, 4 * KiB); 579 create_unimplemented_device("npcm7xx.espi", 0xf009f000, 4 * KiB); 580 create_unimplemented_device("npcm7xx.peci", 0xf0100000, 4 * KiB); 581 create_unimplemented_device("npcm7xx.siox[1]", 0xf0101000, 4 * KiB); 582 create_unimplemented_device("npcm7xx.siox[2]", 0xf0102000, 4 * KiB);	540 /* 541 * Flash Interface Unit (FIU). Can fail if incorrect number of chip selects 542 * specified, but this is a programming error. 543 / 544 QEMU_BUILD_BUG_ON(ARRAY_SIZE(npcm7xx_fiu) != ARRAY_SIZE(s->fiu)); 545 for (i = 0; i < ARRAY_SIZE(s->fiu); i++) { 546 SysBusDevice sbd = SYS_BUS_DEVICE(&s->fiu[i]); 547 int j; --- 51 unchanged lines hidden (view full) --- 599 create_unimplemented_device("npcm7xx.smbus[12]", 0xf008c000, 4 * KiB); 600 create_unimplemented_device("npcm7xx.smbus[13]", 0xf008d000, 4 * KiB); 601 create_unimplemented_device("npcm7xx.smbus[14]", 0xf008e000, 4 * KiB); 602 create_unimplemented_device("npcm7xx.smbus[15]", 0xf008f000, 4 * KiB); 603 create_unimplemented_device("npcm7xx.espi", 0xf009f000, 4 * KiB); 604 create_unimplemented_device("npcm7xx.peci", 0xf0100000, 4 * KiB); 605 create_unimplemented_device("npcm7xx.siox[1]", 0xf0101000, 4 * KiB); 606 create_unimplemented_device("npcm7xx.siox[2]", 0xf0102000, 4 * KiB);
583 create_unimplemented_device("npcm7xx.pwm[0]", 0xf0103000, 4 * KiB); 584 create_unimplemented_device("npcm7xx.pwm[1]", 0xf0104000, 4 * KiB);
585 create_unimplemented_device("npcm7xx.mft[0]", 0xf0180000, 4 * KiB); 586 create_unimplemented_device("npcm7xx.mft[1]", 0xf0181000, 4 * KiB); 587 create_unimplemented_device("npcm7xx.mft[2]", 0xf0182000, 4 * KiB); 588 create_unimplemented_device("npcm7xx.mft[3]", 0xf0183000, 4 * KiB); 589 create_unimplemented_device("npcm7xx.mft[4]", 0xf0184000, 4 * KiB); 590 create_unimplemented_device("npcm7xx.mft[5]", 0xf0185000, 4 * KiB); 591 create_unimplemented_device("npcm7xx.mft[6]", 0xf0186000, 4 * KiB); 592 create_unimplemented_device("npcm7xx.mft[7]", 0xf0187000, 4 * KiB); --- 87 unchanged lines hidden ---	607 create_unimplemented_device("npcm7xx.mft[0]", 0xf0180000, 4 * KiB); 608 create_unimplemented_device("npcm7xx.mft[1]", 0xf0181000, 4 * KiB); 609 create_unimplemented_device("npcm7xx.mft[2]", 0xf0182000, 4 * KiB); 610 create_unimplemented_device("npcm7xx.mft[3]", 0xf0183000, 4 * KiB); 611 create_unimplemented_device("npcm7xx.mft[4]", 0xf0184000, 4 * KiB); 612 create_unimplemented_device("npcm7xx.mft[5]", 0xf0185000, 4 * KiB); 613 create_unimplemented_device("npcm7xx.mft[6]", 0xf0186000, 4 * KiB); 614 create_unimplemented_device("npcm7xx.mft[7]", 0xf0187000, 4 * KiB); --- 87 unchanged lines hidden ---