fsl-imx25.c (9fc7fc4d3909817555ce0af6bcb69dff1606140d) fsl-imx25.c (db873cc5d1a4aaa67eea87768d504b2f89d88738)
1/*
2 * Copyright (c) 2013 Jean-Christophe Dubois <jcd@tribudubois.net>
3 *
4 * i.MX25 SOC emulation.
5 *
6 * Based on hw/arm/xlnx-zynqmp.c
7 *
8 * Copyright (C) 2015 Xilinx Inc

--- 26 unchanged lines hidden (view full) ---

35
36static void fsl_imx25_init(Object *obj)
37{
38 FslIMX25State *s = FSL_IMX25(obj);
39 int i;
40
41 object_initialize_child(obj, "cpu", &s->cpu, ARM_CPU_TYPE_NAME("arm926"));
42
1/*
2 * Copyright (c) 2013 Jean-Christophe Dubois <jcd@tribudubois.net>
3 *
4 * i.MX25 SOC emulation.
5 *
6 * Based on hw/arm/xlnx-zynqmp.c
7 *
8 * Copyright (C) 2015 Xilinx Inc

--- 26 unchanged lines hidden (view full) ---

35
36static void fsl_imx25_init(Object *obj)
37{
38 FslIMX25State *s = FSL_IMX25(obj);
39 int i;
40
41 object_initialize_child(obj, "cpu", &s->cpu, ARM_CPU_TYPE_NAME("arm926"));
42
43 sysbus_init_child_obj(obj, "avic", &s->avic, sizeof(s->avic),
44 TYPE_IMX_AVIC);
43 object_initialize_child(obj, "avic", &s->avic, TYPE_IMX_AVIC);
45
44
46 sysbus_init_child_obj(obj, "ccm", &s->ccm, sizeof(s->ccm), TYPE_IMX25_CCM);
45 object_initialize_child(obj, "ccm", &s->ccm, TYPE_IMX25_CCM);
47
48 for (i = 0; i < FSL_IMX25_NUM_UARTS; i++) {
46
47 for (i = 0; i < FSL_IMX25_NUM_UARTS; i++) {
49 sysbus_init_child_obj(obj, "uart[*]", &s->uart[i], sizeof(s->uart[i]),
50 TYPE_IMX_SERIAL);
48 object_initialize_child(obj, "uart[*]", &s->uart[i], TYPE_IMX_SERIAL);
51 }
52
53 for (i = 0; i < FSL_IMX25_NUM_GPTS; i++) {
49 }
50
51 for (i = 0; i < FSL_IMX25_NUM_GPTS; i++) {
54 sysbus_init_child_obj(obj, "gpt[*]", &s->gpt[i], sizeof(s->gpt[i]),
55 TYPE_IMX25_GPT);
52 object_initialize_child(obj, "gpt[*]", &s->gpt[i], TYPE_IMX25_GPT);
56 }
57
58 for (i = 0; i < FSL_IMX25_NUM_EPITS; i++) {
53 }
54
55 for (i = 0; i < FSL_IMX25_NUM_EPITS; i++) {
59 sysbus_init_child_obj(obj, "epit[*]", &s->epit[i], sizeof(s->epit[i]),
60 TYPE_IMX_EPIT);
56 object_initialize_child(obj, "epit[*]", &s->epit[i], TYPE_IMX_EPIT);
61 }
62
57 }
58
63 sysbus_init_child_obj(obj, "fec", &s->fec, sizeof(s->fec), TYPE_IMX_FEC);
59 object_initialize_child(obj, "fec", &s->fec, TYPE_IMX_FEC);
64
60
65 sysbus_init_child_obj(obj, "rngc", &s->rngc, sizeof(s->rngc),
66 TYPE_IMX_RNGC);
61 object_initialize_child(obj, "rngc", &s->rngc, TYPE_IMX_RNGC);
67
68 for (i = 0; i < FSL_IMX25_NUM_I2CS; i++) {
62
63 for (i = 0; i < FSL_IMX25_NUM_I2CS; i++) {
69 sysbus_init_child_obj(obj, "i2c[*]", &s->i2c[i], sizeof(s->i2c[i]),
70 TYPE_IMX_I2C);
64 object_initialize_child(obj, "i2c[*]", &s->i2c[i], TYPE_IMX_I2C);
71 }
72
73 for (i = 0; i < FSL_IMX25_NUM_GPIOS; i++) {
65 }
66
67 for (i = 0; i < FSL_IMX25_NUM_GPIOS; i++) {
74 sysbus_init_child_obj(obj, "gpio[*]", &s->gpio[i], sizeof(s->gpio[i]),
75 TYPE_IMX_GPIO);
68 object_initialize_child(obj, "gpio[*]", &s->gpio[i], TYPE_IMX_GPIO);
76 }
77
78 for (i = 0; i < FSL_IMX25_NUM_ESDHCS; i++) {
69 }
70
71 for (i = 0; i < FSL_IMX25_NUM_ESDHCS; i++) {
79 sysbus_init_child_obj(obj, "sdhc[*]", &s->esdhc[i], sizeof(s->esdhc[i]),
80 TYPE_IMX_USDHC);
72 object_initialize_child(obj, "sdhc[*]", &s->esdhc[i], TYPE_IMX_USDHC);
81 }
82
83 for (i = 0; i < FSL_IMX25_NUM_USBS; i++) {
73 }
74
75 for (i = 0; i < FSL_IMX25_NUM_USBS; i++) {
84 sysbus_init_child_obj(obj, "usb[*]", &s->usb[i], sizeof(s->usb[i]),
85 TYPE_CHIPIDEA);
76 object_initialize_child(obj, "usb[*]", &s->usb[i], TYPE_CHIPIDEA);
86 }
87
77 }
78
88 sysbus_init_child_obj(obj, "wdt", &s->wdt, sizeof(s->wdt), TYPE_IMX2_WDT);
79 object_initialize_child(obj, "wdt", &s->wdt, TYPE_IMX2_WDT);
89}
90
91static void fsl_imx25_realize(DeviceState *dev, Error **errp)
92{
93 FslIMX25State *s = FSL_IMX25(dev);
94 uint8_t i;
95 Error *err = NULL;
96
97 object_property_set_bool(OBJECT(&s->cpu), true, "realized", &err);
98 if (err) {
99 error_propagate(errp, err);
100 return;
101 }
102
80}
81
82static void fsl_imx25_realize(DeviceState *dev, Error **errp)
83{
84 FslIMX25State *s = FSL_IMX25(dev);
85 uint8_t i;
86 Error *err = NULL;
87
88 object_property_set_bool(OBJECT(&s->cpu), true, "realized", &err);
89 if (err) {
90 error_propagate(errp, err);
91 return;
92 }
93
103 object_property_set_bool(OBJECT(&s->avic), true, "realized", &err);
94 sysbus_realize(SYS_BUS_DEVICE(&s->avic), &err);
104 if (err) {
105 error_propagate(errp, err);
106 return;
107 }
108 sysbus_mmio_map(SYS_BUS_DEVICE(&s->avic), 0, FSL_IMX25_AVIC_ADDR);
109 sysbus_connect_irq(SYS_BUS_DEVICE(&s->avic), 0,
110 qdev_get_gpio_in(DEVICE(&s->cpu), ARM_CPU_IRQ));
111 sysbus_connect_irq(SYS_BUS_DEVICE(&s->avic), 1,
112 qdev_get_gpio_in(DEVICE(&s->cpu), ARM_CPU_FIQ));
113
95 if (err) {
96 error_propagate(errp, err);
97 return;
98 }
99 sysbus_mmio_map(SYS_BUS_DEVICE(&s->avic), 0, FSL_IMX25_AVIC_ADDR);
100 sysbus_connect_irq(SYS_BUS_DEVICE(&s->avic), 0,
101 qdev_get_gpio_in(DEVICE(&s->cpu), ARM_CPU_IRQ));
102 sysbus_connect_irq(SYS_BUS_DEVICE(&s->avic), 1,
103 qdev_get_gpio_in(DEVICE(&s->cpu), ARM_CPU_FIQ));
104
114 object_property_set_bool(OBJECT(&s->ccm), true, "realized", &err);
105 sysbus_realize(SYS_BUS_DEVICE(&s->ccm), &err);
115 if (err) {
116 error_propagate(errp, err);
117 return;
118 }
119 sysbus_mmio_map(SYS_BUS_DEVICE(&s->ccm), 0, FSL_IMX25_CCM_ADDR);
120
121 /* Initialize all UARTs */
122 for (i = 0; i < FSL_IMX25_NUM_UARTS; i++) {

--- 5 unchanged lines hidden (view full) ---

128 { FSL_IMX25_UART2_ADDR, FSL_IMX25_UART2_IRQ },
129 { FSL_IMX25_UART3_ADDR, FSL_IMX25_UART3_IRQ },
130 { FSL_IMX25_UART4_ADDR, FSL_IMX25_UART4_IRQ },
131 { FSL_IMX25_UART5_ADDR, FSL_IMX25_UART5_IRQ }
132 };
133
134 qdev_prop_set_chr(DEVICE(&s->uart[i]), "chardev", serial_hd(i));
135
106 if (err) {
107 error_propagate(errp, err);
108 return;
109 }
110 sysbus_mmio_map(SYS_BUS_DEVICE(&s->ccm), 0, FSL_IMX25_CCM_ADDR);
111
112 /* Initialize all UARTs */
113 for (i = 0; i < FSL_IMX25_NUM_UARTS; i++) {

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119 { FSL_IMX25_UART2_ADDR, FSL_IMX25_UART2_IRQ },
120 { FSL_IMX25_UART3_ADDR, FSL_IMX25_UART3_IRQ },
121 { FSL_IMX25_UART4_ADDR, FSL_IMX25_UART4_IRQ },
122 { FSL_IMX25_UART5_ADDR, FSL_IMX25_UART5_IRQ }
123 };
124
125 qdev_prop_set_chr(DEVICE(&s->uart[i]), "chardev", serial_hd(i));
126
136 object_property_set_bool(OBJECT(&s->uart[i]), true, "realized", &err);
127 sysbus_realize(SYS_BUS_DEVICE(&s->uart[i]), &err);
137 if (err) {
138 error_propagate(errp, err);
139 return;
140 }
141 sysbus_mmio_map(SYS_BUS_DEVICE(&s->uart[i]), 0, serial_table[i].addr);
142 sysbus_connect_irq(SYS_BUS_DEVICE(&s->uart[i]), 0,
143 qdev_get_gpio_in(DEVICE(&s->avic),
144 serial_table[i].irq));

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153 { FSL_IMX25_GPT1_ADDR, FSL_IMX25_GPT1_IRQ },
154 { FSL_IMX25_GPT2_ADDR, FSL_IMX25_GPT2_IRQ },
155 { FSL_IMX25_GPT3_ADDR, FSL_IMX25_GPT3_IRQ },
156 { FSL_IMX25_GPT4_ADDR, FSL_IMX25_GPT4_IRQ }
157 };
158
159 s->gpt[i].ccm = IMX_CCM(&s->ccm);
160
128 if (err) {
129 error_propagate(errp, err);
130 return;
131 }
132 sysbus_mmio_map(SYS_BUS_DEVICE(&s->uart[i]), 0, serial_table[i].addr);
133 sysbus_connect_irq(SYS_BUS_DEVICE(&s->uart[i]), 0,
134 qdev_get_gpio_in(DEVICE(&s->avic),
135 serial_table[i].irq));

--- 8 unchanged lines hidden (view full) ---

144 { FSL_IMX25_GPT1_ADDR, FSL_IMX25_GPT1_IRQ },
145 { FSL_IMX25_GPT2_ADDR, FSL_IMX25_GPT2_IRQ },
146 { FSL_IMX25_GPT3_ADDR, FSL_IMX25_GPT3_IRQ },
147 { FSL_IMX25_GPT4_ADDR, FSL_IMX25_GPT4_IRQ }
148 };
149
150 s->gpt[i].ccm = IMX_CCM(&s->ccm);
151
161 object_property_set_bool(OBJECT(&s->gpt[i]), true, "realized", &err);
152 sysbus_realize(SYS_BUS_DEVICE(&s->gpt[i]), &err);
162 if (err) {
163 error_propagate(errp, err);
164 return;
165 }
166 sysbus_mmio_map(SYS_BUS_DEVICE(&s->gpt[i]), 0, gpt_table[i].addr);
167 sysbus_connect_irq(SYS_BUS_DEVICE(&s->gpt[i]), 0,
168 qdev_get_gpio_in(DEVICE(&s->avic),
169 gpt_table[i].irq));

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176 unsigned int irq;
177 } epit_table[FSL_IMX25_NUM_EPITS] = {
178 { FSL_IMX25_EPIT1_ADDR, FSL_IMX25_EPIT1_IRQ },
179 { FSL_IMX25_EPIT2_ADDR, FSL_IMX25_EPIT2_IRQ }
180 };
181
182 s->epit[i].ccm = IMX_CCM(&s->ccm);
183
153 if (err) {
154 error_propagate(errp, err);
155 return;
156 }
157 sysbus_mmio_map(SYS_BUS_DEVICE(&s->gpt[i]), 0, gpt_table[i].addr);
158 sysbus_connect_irq(SYS_BUS_DEVICE(&s->gpt[i]), 0,
159 qdev_get_gpio_in(DEVICE(&s->avic),
160 gpt_table[i].irq));

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167 unsigned int irq;
168 } epit_table[FSL_IMX25_NUM_EPITS] = {
169 { FSL_IMX25_EPIT1_ADDR, FSL_IMX25_EPIT1_IRQ },
170 { FSL_IMX25_EPIT2_ADDR, FSL_IMX25_EPIT2_IRQ }
171 };
172
173 s->epit[i].ccm = IMX_CCM(&s->ccm);
174
184 object_property_set_bool(OBJECT(&s->epit[i]), true, "realized", &err);
175 sysbus_realize(SYS_BUS_DEVICE(&s->epit[i]), &err);
185 if (err) {
186 error_propagate(errp, err);
187 return;
188 }
189 sysbus_mmio_map(SYS_BUS_DEVICE(&s->epit[i]), 0, epit_table[i].addr);
190 sysbus_connect_irq(SYS_BUS_DEVICE(&s->epit[i]), 0,
191 qdev_get_gpio_in(DEVICE(&s->avic),
192 epit_table[i].irq));
193 }
194
195 qdev_set_nic_properties(DEVICE(&s->fec), &nd_table[0]);
196
176 if (err) {
177 error_propagate(errp, err);
178 return;
179 }
180 sysbus_mmio_map(SYS_BUS_DEVICE(&s->epit[i]), 0, epit_table[i].addr);
181 sysbus_connect_irq(SYS_BUS_DEVICE(&s->epit[i]), 0,
182 qdev_get_gpio_in(DEVICE(&s->avic),
183 epit_table[i].irq));
184 }
185
186 qdev_set_nic_properties(DEVICE(&s->fec), &nd_table[0]);
187
197 object_property_set_bool(OBJECT(&s->fec), true, "realized", &err);
188 sysbus_realize(SYS_BUS_DEVICE(&s->fec), &err);
198 if (err) {
199 error_propagate(errp, err);
200 return;
201 }
202 sysbus_mmio_map(SYS_BUS_DEVICE(&s->fec), 0, FSL_IMX25_FEC_ADDR);
203 sysbus_connect_irq(SYS_BUS_DEVICE(&s->fec), 0,
204 qdev_get_gpio_in(DEVICE(&s->avic), FSL_IMX25_FEC_IRQ));
205
189 if (err) {
190 error_propagate(errp, err);
191 return;
192 }
193 sysbus_mmio_map(SYS_BUS_DEVICE(&s->fec), 0, FSL_IMX25_FEC_ADDR);
194 sysbus_connect_irq(SYS_BUS_DEVICE(&s->fec), 0,
195 qdev_get_gpio_in(DEVICE(&s->avic), FSL_IMX25_FEC_IRQ));
196
206 object_property_set_bool(OBJECT(&s->rngc), true, "realized", &err);
197 sysbus_realize(SYS_BUS_DEVICE(&s->rngc), &err);
207 if (err) {
208 error_propagate(errp, err);
209 return;
210 }
211 sysbus_mmio_map(SYS_BUS_DEVICE(&s->rngc), 0, FSL_IMX25_RNGC_ADDR);
212 sysbus_connect_irq(SYS_BUS_DEVICE(&s->rngc), 0,
213 qdev_get_gpio_in(DEVICE(&s->avic), FSL_IMX25_RNGC_IRQ));
214
215 /* Initialize all I2C */
216 for (i = 0; i < FSL_IMX25_NUM_I2CS; i++) {
217 static const struct {
218 hwaddr addr;
219 unsigned int irq;
220 } i2c_table[FSL_IMX25_NUM_I2CS] = {
221 { FSL_IMX25_I2C1_ADDR, FSL_IMX25_I2C1_IRQ },
222 { FSL_IMX25_I2C2_ADDR, FSL_IMX25_I2C2_IRQ },
223 { FSL_IMX25_I2C3_ADDR, FSL_IMX25_I2C3_IRQ }
224 };
225
198 if (err) {
199 error_propagate(errp, err);
200 return;
201 }
202 sysbus_mmio_map(SYS_BUS_DEVICE(&s->rngc), 0, FSL_IMX25_RNGC_ADDR);
203 sysbus_connect_irq(SYS_BUS_DEVICE(&s->rngc), 0,
204 qdev_get_gpio_in(DEVICE(&s->avic), FSL_IMX25_RNGC_IRQ));
205
206 /* Initialize all I2C */
207 for (i = 0; i < FSL_IMX25_NUM_I2CS; i++) {
208 static const struct {
209 hwaddr addr;
210 unsigned int irq;
211 } i2c_table[FSL_IMX25_NUM_I2CS] = {
212 { FSL_IMX25_I2C1_ADDR, FSL_IMX25_I2C1_IRQ },
213 { FSL_IMX25_I2C2_ADDR, FSL_IMX25_I2C2_IRQ },
214 { FSL_IMX25_I2C3_ADDR, FSL_IMX25_I2C3_IRQ }
215 };
216
226 object_property_set_bool(OBJECT(&s->i2c[i]), true, "realized", &err);
217 sysbus_realize(SYS_BUS_DEVICE(&s->i2c[i]), &err);
227 if (err) {
228 error_propagate(errp, err);
229 return;
230 }
231 sysbus_mmio_map(SYS_BUS_DEVICE(&s->i2c[i]), 0, i2c_table[i].addr);
232 sysbus_connect_irq(SYS_BUS_DEVICE(&s->i2c[i]), 0,
233 qdev_get_gpio_in(DEVICE(&s->avic),
234 i2c_table[i].irq));

--- 6 unchanged lines hidden (view full) ---

241 unsigned int irq;
242 } gpio_table[FSL_IMX25_NUM_GPIOS] = {
243 { FSL_IMX25_GPIO1_ADDR, FSL_IMX25_GPIO1_IRQ },
244 { FSL_IMX25_GPIO2_ADDR, FSL_IMX25_GPIO2_IRQ },
245 { FSL_IMX25_GPIO3_ADDR, FSL_IMX25_GPIO3_IRQ },
246 { FSL_IMX25_GPIO4_ADDR, FSL_IMX25_GPIO4_IRQ }
247 };
248
218 if (err) {
219 error_propagate(errp, err);
220 return;
221 }
222 sysbus_mmio_map(SYS_BUS_DEVICE(&s->i2c[i]), 0, i2c_table[i].addr);
223 sysbus_connect_irq(SYS_BUS_DEVICE(&s->i2c[i]), 0,
224 qdev_get_gpio_in(DEVICE(&s->avic),
225 i2c_table[i].irq));

--- 6 unchanged lines hidden (view full) ---

232 unsigned int irq;
233 } gpio_table[FSL_IMX25_NUM_GPIOS] = {
234 { FSL_IMX25_GPIO1_ADDR, FSL_IMX25_GPIO1_IRQ },
235 { FSL_IMX25_GPIO2_ADDR, FSL_IMX25_GPIO2_IRQ },
236 { FSL_IMX25_GPIO3_ADDR, FSL_IMX25_GPIO3_IRQ },
237 { FSL_IMX25_GPIO4_ADDR, FSL_IMX25_GPIO4_IRQ }
238 };
239
249 object_property_set_bool(OBJECT(&s->gpio[i]), true, "realized", &err);
240 sysbus_realize(SYS_BUS_DEVICE(&s->gpio[i]), &err);
250 if (err) {
251 error_propagate(errp, err);
252 return;
253 }
254 sysbus_mmio_map(SYS_BUS_DEVICE(&s->gpio[i]), 0, gpio_table[i].addr);
255 /* Connect GPIO IRQ to PIC */
256 sysbus_connect_irq(SYS_BUS_DEVICE(&s->gpio[i]), 0,
257 qdev_get_gpio_in(DEVICE(&s->avic),

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267 { FSL_IMX25_ESDHC1_ADDR, FSL_IMX25_ESDHC1_IRQ },
268 { FSL_IMX25_ESDHC2_ADDR, FSL_IMX25_ESDHC2_IRQ },
269 };
270
271 object_property_set_uint(OBJECT(&s->esdhc[i]), 2, "sd-spec-version",
272 &err);
273 object_property_set_uint(OBJECT(&s->esdhc[i]), IMX25_ESDHC_CAPABILITIES,
274 "capareg", &err);
241 if (err) {
242 error_propagate(errp, err);
243 return;
244 }
245 sysbus_mmio_map(SYS_BUS_DEVICE(&s->gpio[i]), 0, gpio_table[i].addr);
246 /* Connect GPIO IRQ to PIC */
247 sysbus_connect_irq(SYS_BUS_DEVICE(&s->gpio[i]), 0,
248 qdev_get_gpio_in(DEVICE(&s->avic),

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258 { FSL_IMX25_ESDHC1_ADDR, FSL_IMX25_ESDHC1_IRQ },
259 { FSL_IMX25_ESDHC2_ADDR, FSL_IMX25_ESDHC2_IRQ },
260 };
261
262 object_property_set_uint(OBJECT(&s->esdhc[i]), 2, "sd-spec-version",
263 &err);
264 object_property_set_uint(OBJECT(&s->esdhc[i]), IMX25_ESDHC_CAPABILITIES,
265 "capareg", &err);
275 object_property_set_bool(OBJECT(&s->esdhc[i]), true, "realized", &err);
266 sysbus_realize(SYS_BUS_DEVICE(&s->esdhc[i]), &err);
276 if (err) {
277 error_propagate(errp, err);
278 return;
279 }
280 sysbus_mmio_map(SYS_BUS_DEVICE(&s->esdhc[i]), 0, esdhc_table[i].addr);
281 sysbus_connect_irq(SYS_BUS_DEVICE(&s->esdhc[i]), 0,
282 qdev_get_gpio_in(DEVICE(&s->avic),
283 esdhc_table[i].irq));

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288 static const struct {
289 hwaddr addr;
290 unsigned int irq;
291 } usb_table[FSL_IMX25_NUM_USBS] = {
292 { FSL_IMX25_USB1_ADDR, FSL_IMX25_USB1_IRQ },
293 { FSL_IMX25_USB2_ADDR, FSL_IMX25_USB2_IRQ },
294 };
295
267 if (err) {
268 error_propagate(errp, err);
269 return;
270 }
271 sysbus_mmio_map(SYS_BUS_DEVICE(&s->esdhc[i]), 0, esdhc_table[i].addr);
272 sysbus_connect_irq(SYS_BUS_DEVICE(&s->esdhc[i]), 0,
273 qdev_get_gpio_in(DEVICE(&s->avic),
274 esdhc_table[i].irq));

--- 4 unchanged lines hidden (view full) ---

279 static const struct {
280 hwaddr addr;
281 unsigned int irq;
282 } usb_table[FSL_IMX25_NUM_USBS] = {
283 { FSL_IMX25_USB1_ADDR, FSL_IMX25_USB1_IRQ },
284 { FSL_IMX25_USB2_ADDR, FSL_IMX25_USB2_IRQ },
285 };
286
296 object_property_set_bool(OBJECT(&s->usb[i]), true, "realized",
297 &error_abort);
287 sysbus_realize(SYS_BUS_DEVICE(&s->usb[i]), &error_abort);
298 sysbus_mmio_map(SYS_BUS_DEVICE(&s->usb[i]), 0, usb_table[i].addr);
299 sysbus_connect_irq(SYS_BUS_DEVICE(&s->usb[i]), 0,
300 qdev_get_gpio_in(DEVICE(&s->avic),
301 usb_table[i].irq));
302 }
303
304 /* Watchdog */
305 object_property_set_bool(OBJECT(&s->wdt), true, "pretimeout-support",
306 &error_abort);
288 sysbus_mmio_map(SYS_BUS_DEVICE(&s->usb[i]), 0, usb_table[i].addr);
289 sysbus_connect_irq(SYS_BUS_DEVICE(&s->usb[i]), 0,
290 qdev_get_gpio_in(DEVICE(&s->avic),
291 usb_table[i].irq));
292 }
293
294 /* Watchdog */
295 object_property_set_bool(OBJECT(&s->wdt), true, "pretimeout-support",
296 &error_abort);
307 object_property_set_bool(OBJECT(&s->wdt), true, "realized", &error_abort);
297 sysbus_realize(SYS_BUS_DEVICE(&s->wdt), &error_abort);
308 sysbus_mmio_map(SYS_BUS_DEVICE(&s->wdt), 0, FSL_IMX25_WDT_ADDR);
309 sysbus_connect_irq(SYS_BUS_DEVICE(&s->wdt), 0,
310 qdev_get_gpio_in(DEVICE(&s->avic),
311 FSL_IMX25_WDT_IRQ));
312
313 /* initialize 2 x 16 KB ROM */
314 memory_region_init_rom(&s->rom[0], OBJECT(dev), "imx25.rom0",
315 FSL_IMX25_ROM0_SIZE, &err);

--- 59 unchanged lines hidden --- 		298 sysbus_mmio_map(SYS_BUS_DEVICE(&s->wdt), 0, FSL_IMX25_WDT_ADDR);
299 sysbus_connect_irq(SYS_BUS_DEVICE(&s->wdt), 0,
300 qdev_get_gpio_in(DEVICE(&s->avic),
301 FSL_IMX25_WDT_IRQ));
302
303 /* initialize 2 x 16 KB ROM */
304 memory_region_init_rom(&s->rom[0], OBJECT(dev), "imx25.rom0",
305 FSL_IMX25_ROM0_SIZE, &err);

--- 59 unchanged lines hidden ---