allwinner-a10.c (9bdee7f4a5b45f0240c9296fe0daacb6c08f247c) allwinner-a10.c (db873cc5d1a4aaa67eea87768d504b2f89d88738)
1/*
2 * Allwinner A10 SoC emulation
3 *
4 * Copyright (C) 2013 Li Guang
5 * Written by Li Guang <lig.fnst@cn.fujitsu.com>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the

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39
40static void aw_a10_init(Object *obj)
41{
42 AwA10State *s = AW_A10(obj);
43
44 object_initialize_child(obj, "cpu", &s->cpu,
45 ARM_CPU_TYPE_NAME("cortex-a8"));
46
1/*
2 * Allwinner A10 SoC emulation
3 *
4 * Copyright (C) 2013 Li Guang
5 * Written by Li Guang <lig.fnst@cn.fujitsu.com>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the

--- 30 unchanged lines hidden (view full) ---

39
40static void aw_a10_init(Object *obj)
41{
42 AwA10State *s = AW_A10(obj);
43
44 object_initialize_child(obj, "cpu", &s->cpu,
45 ARM_CPU_TYPE_NAME("cortex-a8"));
46
47 sysbus_init_child_obj(obj, "intc", &s->intc, sizeof(s->intc),
48 TYPE_AW_A10_PIC);
47 object_initialize_child(obj, "intc", &s->intc, TYPE_AW_A10_PIC);
49
48
50 sysbus_init_child_obj(obj, "timer", &s->timer, sizeof(s->timer),
51 TYPE_AW_A10_PIT);
49 object_initialize_child(obj, "timer", &s->timer, TYPE_AW_A10_PIT);
52
50
53 sysbus_init_child_obj(obj, "emac", &s->emac, sizeof(s->emac), TYPE_AW_EMAC);
51 object_initialize_child(obj, "emac", &s->emac, TYPE_AW_EMAC);
54
52
55 sysbus_init_child_obj(obj, "sata", &s->sata, sizeof(s->sata),
56 TYPE_ALLWINNER_AHCI);
53 object_initialize_child(obj, "sata", &s->sata, TYPE_ALLWINNER_AHCI);
57
58 if (machine_usb(current_machine)) {
59 int i;
60
61 for (i = 0; i < AW_A10_NUM_USB; i++) {
54
55 if (machine_usb(current_machine)) {
56 int i;
57
58 for (i = 0; i < AW_A10_NUM_USB; i++) {
62 sysbus_init_child_obj(obj, "ehci[*]", &s->ehci[i],
63 sizeof(s->ehci[i]), TYPE_PLATFORM_EHCI);
64 sysbus_init_child_obj(obj, "ohci[*]", &s->ohci[i],
65 sizeof(s->ohci[i]), TYPE_SYSBUS_OHCI);
59 object_initialize_child(obj, "ehci[*]", &s->ehci[i],
60 TYPE_PLATFORM_EHCI);
61 object_initialize_child(obj, "ohci[*]", &s->ohci[i],
62 TYPE_SYSBUS_OHCI);
66 }
67 }
68
63 }
64 }
65
69 sysbus_init_child_obj(obj, "mmc0", &s->mmc0, sizeof(s->mmc0),
70 TYPE_AW_SDHOST_SUN4I);
66 object_initialize_child(obj, "mmc0", &s->mmc0, TYPE_AW_SDHOST_SUN4I);
71
67
72 sysbus_init_child_obj(obj, "rtc", &s->rtc, sizeof(s->rtc),
73 TYPE_AW_RTC_SUN4I);
68 object_initialize_child(obj, "rtc", &s->rtc, TYPE_AW_RTC_SUN4I);
74}
75
76static void aw_a10_realize(DeviceState *dev, Error **errp)
77{
78 AwA10State *s = AW_A10(dev);
79 SysBusDevice *sysbusdev;
80 Error *err = NULL;
81
82 object_property_set_bool(OBJECT(&s->cpu), true, "realized", &err);
83 if (err != NULL) {
84 error_propagate(errp, err);
85 return;
86 }
87
69}
70
71static void aw_a10_realize(DeviceState *dev, Error **errp)
72{
73 AwA10State *s = AW_A10(dev);
74 SysBusDevice *sysbusdev;
75 Error *err = NULL;
76
77 object_property_set_bool(OBJECT(&s->cpu), true, "realized", &err);
78 if (err != NULL) {
79 error_propagate(errp, err);
80 return;
81 }
82
88 object_property_set_bool(OBJECT(&s->intc), true, "realized", &err);
83 sysbus_realize(SYS_BUS_DEVICE(&s->intc), &err);
89 if (err != NULL) {
90 error_propagate(errp, err);
91 return;
92 }
93 sysbusdev = SYS_BUS_DEVICE(&s->intc);
94 sysbus_mmio_map(sysbusdev, 0, AW_A10_PIC_REG_BASE);
95 sysbus_connect_irq(sysbusdev, 0,
96 qdev_get_gpio_in(DEVICE(&s->cpu), ARM_CPU_IRQ));
97 sysbus_connect_irq(sysbusdev, 1,
98 qdev_get_gpio_in(DEVICE(&s->cpu), ARM_CPU_FIQ));
99 qdev_pass_gpios(DEVICE(&s->intc), dev, NULL);
100
84 if (err != NULL) {
85 error_propagate(errp, err);
86 return;
87 }
88 sysbusdev = SYS_BUS_DEVICE(&s->intc);
89 sysbus_mmio_map(sysbusdev, 0, AW_A10_PIC_REG_BASE);
90 sysbus_connect_irq(sysbusdev, 0,
91 qdev_get_gpio_in(DEVICE(&s->cpu), ARM_CPU_IRQ));
92 sysbus_connect_irq(sysbusdev, 1,
93 qdev_get_gpio_in(DEVICE(&s->cpu), ARM_CPU_FIQ));
94 qdev_pass_gpios(DEVICE(&s->intc), dev, NULL);
95
101 object_property_set_bool(OBJECT(&s->timer), true, "realized", &err);
96 sysbus_realize(SYS_BUS_DEVICE(&s->timer), &err);
102 if (err != NULL) {
103 error_propagate(errp, err);
104 return;
105 }
106 sysbusdev = SYS_BUS_DEVICE(&s->timer);
107 sysbus_mmio_map(sysbusdev, 0, AW_A10_PIT_REG_BASE);
108 sysbus_connect_irq(sysbusdev, 0, qdev_get_gpio_in(dev, 22));
109 sysbus_connect_irq(sysbusdev, 1, qdev_get_gpio_in(dev, 23));

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117 memory_region_add_subregion(get_system_memory(), 0x00000000, &s->sram_a);
118 create_unimplemented_device("a10-sram-ctrl", 0x01c00000, 4 * KiB);
119
120 /* FIXME use qdev NIC properties instead of nd_table[] */
121 if (nd_table[0].used) {
122 qemu_check_nic_model(&nd_table[0], TYPE_AW_EMAC);
123 qdev_set_nic_properties(DEVICE(&s->emac), &nd_table[0]);
124 }
97 if (err != NULL) {
98 error_propagate(errp, err);
99 return;
100 }
101 sysbusdev = SYS_BUS_DEVICE(&s->timer);
102 sysbus_mmio_map(sysbusdev, 0, AW_A10_PIT_REG_BASE);
103 sysbus_connect_irq(sysbusdev, 0, qdev_get_gpio_in(dev, 22));
104 sysbus_connect_irq(sysbusdev, 1, qdev_get_gpio_in(dev, 23));

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112 memory_region_add_subregion(get_system_memory(), 0x00000000, &s->sram_a);
113 create_unimplemented_device("a10-sram-ctrl", 0x01c00000, 4 * KiB);
114
115 /* FIXME use qdev NIC properties instead of nd_table[] */
116 if (nd_table[0].used) {
117 qemu_check_nic_model(&nd_table[0], TYPE_AW_EMAC);
118 qdev_set_nic_properties(DEVICE(&s->emac), &nd_table[0]);
119 }
125 object_property_set_bool(OBJECT(&s->emac), true, "realized", &err);
120 sysbus_realize(SYS_BUS_DEVICE(&s->emac), &err);
126 if (err != NULL) {
127 error_propagate(errp, err);
128 return;
129 }
130 sysbusdev = SYS_BUS_DEVICE(&s->emac);
131 sysbus_mmio_map(sysbusdev, 0, AW_A10_EMAC_BASE);
132 sysbus_connect_irq(sysbusdev, 0, qdev_get_gpio_in(dev, 55));
133
121 if (err != NULL) {
122 error_propagate(errp, err);
123 return;
124 }
125 sysbusdev = SYS_BUS_DEVICE(&s->emac);
126 sysbus_mmio_map(sysbusdev, 0, AW_A10_EMAC_BASE);
127 sysbus_connect_irq(sysbusdev, 0, qdev_get_gpio_in(dev, 55));
128
134 object_property_set_bool(OBJECT(&s->sata), true, "realized", &err);
129 sysbus_realize(SYS_BUS_DEVICE(&s->sata), &err);
135 if (err) {
136 error_propagate(errp, err);
137 return;
138 }
139 sysbus_mmio_map(SYS_BUS_DEVICE(&s->sata), 0, AW_A10_SATA_BASE);
140 sysbus_connect_irq(SYS_BUS_DEVICE(&s->sata), 0, qdev_get_gpio_in(dev, 56));
141
142 /* FIXME use a qdev chardev prop instead of serial_hd() */

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149
150 for (i = 0; i < AW_A10_NUM_USB; i++) {
151 char bus[16];
152
153 sprintf(bus, "usb-bus.%d", i);
154
155 object_property_set_bool(OBJECT(&s->ehci[i]), true,
156 "companion-enable", &error_fatal);
130 if (err) {
131 error_propagate(errp, err);
132 return;
133 }
134 sysbus_mmio_map(SYS_BUS_DEVICE(&s->sata), 0, AW_A10_SATA_BASE);
135 sysbus_connect_irq(SYS_BUS_DEVICE(&s->sata), 0, qdev_get_gpio_in(dev, 56));
136
137 /* FIXME use a qdev chardev prop instead of serial_hd() */

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144
145 for (i = 0; i < AW_A10_NUM_USB; i++) {
146 char bus[16];
147
148 sprintf(bus, "usb-bus.%d", i);
149
150 object_property_set_bool(OBJECT(&s->ehci[i]), true,
151 "companion-enable", &error_fatal);
157 object_property_set_bool(OBJECT(&s->ehci[i]), true, "realized",
158 &error_fatal);
152 sysbus_realize(SYS_BUS_DEVICE(&s->ehci[i]), &error_fatal);
159 sysbus_mmio_map(SYS_BUS_DEVICE(&s->ehci[i]), 0,
160 AW_A10_EHCI_BASE + i * 0x8000);
161 sysbus_connect_irq(SYS_BUS_DEVICE(&s->ehci[i]), 0,
162 qdev_get_gpio_in(dev, 39 + i));
163
164 object_property_set_str(OBJECT(&s->ohci[i]), bus, "masterbus",
165 &error_fatal);
153 sysbus_mmio_map(SYS_BUS_DEVICE(&s->ehci[i]), 0,
154 AW_A10_EHCI_BASE + i * 0x8000);
155 sysbus_connect_irq(SYS_BUS_DEVICE(&s->ehci[i]), 0,
156 qdev_get_gpio_in(dev, 39 + i));
157
158 object_property_set_str(OBJECT(&s->ohci[i]), bus, "masterbus",
159 &error_fatal);
166 object_property_set_bool(OBJECT(&s->ohci[i]), true, "realized",
167 &error_fatal);
160 sysbus_realize(SYS_BUS_DEVICE(&s->ohci[i]), &error_fatal);
168 sysbus_mmio_map(SYS_BUS_DEVICE(&s->ohci[i]), 0,
169 AW_A10_OHCI_BASE + i * 0x8000);
170 sysbus_connect_irq(SYS_BUS_DEVICE(&s->ohci[i]), 0,
171 qdev_get_gpio_in(dev, 64 + i));
172 }
173 }
174
175 /* SD/MMC */
161 sysbus_mmio_map(SYS_BUS_DEVICE(&s->ohci[i]), 0,
162 AW_A10_OHCI_BASE + i * 0x8000);
163 sysbus_connect_irq(SYS_BUS_DEVICE(&s->ohci[i]), 0,
164 qdev_get_gpio_in(dev, 64 + i));
165 }
166 }
167
168 /* SD/MMC */
176 qdev_init_nofail(DEVICE(&s->mmc0));
169 sysbus_realize(SYS_BUS_DEVICE(&s->mmc0), &error_fatal);
177 sysbus_mmio_map(SYS_BUS_DEVICE(&s->mmc0), 0, AW_A10_MMC0_BASE);
178 sysbus_connect_irq(SYS_BUS_DEVICE(&s->mmc0), 0, qdev_get_gpio_in(dev, 32));
179 object_property_add_alias(OBJECT(s), "sd-bus", OBJECT(&s->mmc0),
180 "sd-bus");
181
182 /* RTC */
170 sysbus_mmio_map(SYS_BUS_DEVICE(&s->mmc0), 0, AW_A10_MMC0_BASE);
171 sysbus_connect_irq(SYS_BUS_DEVICE(&s->mmc0), 0, qdev_get_gpio_in(dev, 32));
172 object_property_add_alias(OBJECT(s), "sd-bus", OBJECT(&s->mmc0),
173 "sd-bus");
174
175 /* RTC */
183 qdev_init_nofail(DEVICE(&s->rtc));
176 sysbus_realize(SYS_BUS_DEVICE(&s->rtc), &error_fatal);
184 sysbus_mmio_map_overlap(SYS_BUS_DEVICE(&s->rtc), 0, AW_A10_RTC_BASE, 10);
185}
186
187static void aw_a10_class_init(ObjectClass *oc, void *data)
188{
189 DeviceClass *dc = DEVICE_CLASS(oc);
190
191 dc->realize = aw_a10_realize;

--- 18 unchanged lines hidden --- 		177 sysbus_mmio_map_overlap(SYS_BUS_DEVICE(&s->rtc), 0, AW_A10_RTC_BASE, 10);
178}
179
180static void aw_a10_class_init(ObjectClass *oc, void *data)
181{
182 DeviceClass *dc = DEVICE_CLASS(oc);
183
184 dc->realize = aw_a10_realize;

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