cputlb.c (3416343255cbe01fbe12e5e36cd4bb5042425b27) cputlb.c (f2553f04890cfaef2fb045e7d19b9c4ecd414da2)
1/*
2 * Common CPU TLB handling
3 *
4 * Copyright (c) 2003 Fabrice Bellard
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either

--- 732 unchanged lines hidden (view full) ---

741 ram_addr = qemu_ram_addr_from_host(ptr);
742 if (ram_addr == RAM_ADDR_INVALID) {
743 error_report("Bad ram pointer %p", ptr);
744 abort();
745 }
746 return ram_addr;
747}
748
1/*
2 * Common CPU TLB handling
3 *
4 * Copyright (c) 2003 Fabrice Bellard
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either

--- 732 unchanged lines hidden (view full) ---

741 ram_addr = qemu_ram_addr_from_host(ptr);
742 if (ram_addr == RAM_ADDR_INVALID) {
743 error_report("Bad ram pointer %p", ptr);
744 abort();
745 }
746 return ram_addr;
747}
748
749/* NOTE: this function can trigger an exception */
750/* NOTE2: the returned address is not exactly the physical address: it
751 * is actually a ram_addr_t (in system mode; the user mode emulation
752 * version of this function returns a guest virtual address).
753 */
754tb_page_addr_t get_page_addr_code(CPUArchState *env, target_ulong addr)
755{
756 int mmu_idx, index, pd;
757 void *p;
758 MemoryRegion *mr;
759 CPUState *cpu = ENV_GET_CPU(env);
760 CPUIOTLBEntry *iotlbentry;
761
762 index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
763 mmu_idx = cpu_mmu_index(env, true);
764 if (unlikely(env->tlb_table[mmu_idx][index].addr_code !=
765 (addr & TARGET_PAGE_MASK))) {
766 cpu_ldub_code(env, addr);
767 }
768 iotlbentry = &env->iotlb[mmu_idx][index];
769 pd = iotlbentry->addr & ~TARGET_PAGE_MASK;
770 mr = iotlb_to_region(cpu, pd, iotlbentry->attrs);
771 if (memory_region_is_unassigned(mr)) {
772 cpu_unassigned_access(cpu, addr, false, true, 0, 4);
773 /* The CPU's unassigned access hook might have longjumped out
774 * with an exception. If it didn't (or there was no hook) then
775 * we can't proceed further.
776 */
777 report_bad_exec(cpu, addr);
778 exit(1);
779 }
780 p = (void *)((uintptr_t)addr + env->tlb_table[mmu_idx][index].addend);
781 return qemu_ram_addr_from_host_nofail(p);
782}
783
784static uint64_t io_readx(CPUArchState *env, CPUIOTLBEntry *iotlbentry,
785 target_ulong addr, uintptr_t retaddr, int size)
786{
787 CPUState *cpu = ENV_GET_CPU(env);
788 hwaddr physaddr = iotlbentry->addr;
789 MemoryRegion *mr = iotlb_to_region(cpu, physaddr, iotlbentry->attrs);
790 uint64_t val;
791 bool locked = false;

--- 71 unchanged lines hidden (view full) ---

863 return false;
864}
865
866/* Macro to call the above, with local variables from the use context. */
867#define VICTIM_TLB_HIT(TY, ADDR) \
868 victim_tlb_hit(env, mmu_idx, index, offsetof(CPUTLBEntry, TY), \
869 (ADDR) & TARGET_PAGE_MASK)
870
749static uint64_t io_readx(CPUArchState *env, CPUIOTLBEntry *iotlbentry,
750 target_ulong addr, uintptr_t retaddr, int size)
751{
752 CPUState *cpu = ENV_GET_CPU(env);
753 hwaddr physaddr = iotlbentry->addr;
754 MemoryRegion *mr = iotlb_to_region(cpu, physaddr, iotlbentry->attrs);
755 uint64_t val;
756 bool locked = false;

--- 71 unchanged lines hidden (view full) ---

828 return false;
829}
830
831/* Macro to call the above, with local variables from the use context. */
832#define VICTIM_TLB_HIT(TY, ADDR) \
833 victim_tlb_hit(env, mmu_idx, index, offsetof(CPUTLBEntry, TY), \
834 (ADDR) & TARGET_PAGE_MASK)
835
836/* NOTE: this function can trigger an exception */
837/* NOTE2: the returned address is not exactly the physical address: it
838 * is actually a ram_addr_t (in system mode; the user mode emulation
839 * version of this function returns a guest virtual address).
840 */
841tb_page_addr_t get_page_addr_code(CPUArchState *env, target_ulong addr)
842{
843 int mmu_idx, index, pd;
844 void *p;
845 MemoryRegion *mr;
846 CPUState *cpu = ENV_GET_CPU(env);
847 CPUIOTLBEntry *iotlbentry;
848
849 index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
850 mmu_idx = cpu_mmu_index(env, true);
851 if (unlikely(env->tlb_table[mmu_idx][index].addr_code !=
852 (addr & TARGET_PAGE_MASK))) {
853 cpu_ldub_code(env, addr);
854 }
855 iotlbentry = &env->iotlb[mmu_idx][index];
856 pd = iotlbentry->addr & ~TARGET_PAGE_MASK;
857 mr = iotlb_to_region(cpu, pd, iotlbentry->attrs);
858 if (memory_region_is_unassigned(mr)) {
859 cpu_unassigned_access(cpu, addr, false, true, 0, 4);
860 /* The CPU's unassigned access hook might have longjumped out
861 * with an exception. If it didn't (or there was no hook) then
862 * we can't proceed further.
863 */
864 report_bad_exec(cpu, addr);
865 exit(1);
866 }
867 p = (void *)((uintptr_t)addr + env->tlb_table[mmu_idx][index].addend);
868 return qemu_ram_addr_from_host_nofail(p);
869}
870
871/* Probe for whether the specified guest write access is permitted.
872 * If it is not permitted then an exception will be taken in the same
873 * way as if this were a real write access (and we will not return).
874 * Otherwise the function will return, and there will be a valid
875 * entry in the TLB for this access.
876 */
877void probe_write(CPUArchState *env, target_ulong addr, int mmu_idx,
878 uintptr_t retaddr)

--- 173 unchanged lines hidden --- 		871/* Probe for whether the specified guest write access is permitted.
872 * If it is not permitted then an exception will be taken in the same
873 * way as if this were a real write access (and we will not return).
874 * Otherwise the function will return, and there will be a valid
875 * entry in the TLB for this access.
876 */
877void probe_write(CPUArchState *env, target_ulong addr, int mmu_idx,
878 uintptr_t retaddr)

--- 173 unchanged lines hidden ---