nfit.c (bc0868c62bb13834b20a864f684cced1f84a2412) nfit.c (6634fb06906f52a3a3125e88681a7fa6e353f31d)
1/*
2 * Copyright(c) 2013-2015 Intel Corporation. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of version 2 of the GNU General Public License as
6 * published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope that it will be useful, but

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331}
332
333static int nfit_test_ctl(struct nvdimm_bus_descriptor *nd_desc,
334 struct nvdimm *nvdimm, unsigned int cmd, void *buf,
335 unsigned int buf_len, int *cmd_rc)
336{
337 struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc);
338 struct nfit_test *t = container_of(acpi_desc, typeof(*t), acpi_desc);
1/*
2 * Copyright(c) 2013-2015 Intel Corporation. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of version 2 of the GNU General Public License as
6 * published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope that it will be useful, but

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331}
332
333static int nfit_test_ctl(struct nvdimm_bus_descriptor *nd_desc,
334 struct nvdimm *nvdimm, unsigned int cmd, void *buf,
335 unsigned int buf_len, int *cmd_rc)
336{
337 struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc);
338 struct nfit_test *t = container_of(acpi_desc, typeof(*t), acpi_desc);
339 unsigned int func = cmd;
339 int i, rc = 0, __cmd_rc;
340
341 if (!cmd_rc)
342 cmd_rc = &__cmd_rc;
343 *cmd_rc = 0;
344
345 if (nvdimm) {
346 struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm);
340 int i, rc = 0, __cmd_rc;
341
342 if (!cmd_rc)
343 cmd_rc = &__cmd_rc;
344 *cmd_rc = 0;
345
346 if (nvdimm) {
347 struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm);
348 unsigned long cmd_mask = nvdimm_cmd_mask(nvdimm);
347
349
348 if (!nfit_mem || !test_bit(cmd, &nfit_mem->dsm_mask))
350 if (!nfit_mem)
349 return -ENOTTY;
350
351 return -ENOTTY;
352
353 if (cmd == ND_CMD_CALL) {
354 struct nd_cmd_pkg *call_pkg = buf;
355
356 buf_len = call_pkg->nd_size_in + call_pkg->nd_size_out;
357 buf = (void *) call_pkg->nd_payload;
358 func = call_pkg->nd_command;
359 if (call_pkg->nd_family != nfit_mem->family)
360 return -ENOTTY;
361 }
362
363 if (!test_bit(cmd, &cmd_mask)
364 || !test_bit(func, &nfit_mem->dsm_mask))
365 return -ENOTTY;
366
351 /* lookup label space for the given dimm */
352 for (i = 0; i < ARRAY_SIZE(handle); i++)
353 if (__to_nfit_memdev(nfit_mem)->device_handle ==
354 handle[i])
355 break;
356 if (i >= ARRAY_SIZE(handle))
357 return -ENXIO;
358
367 /* lookup label space for the given dimm */
368 for (i = 0; i < ARRAY_SIZE(handle); i++)
369 if (__to_nfit_memdev(nfit_mem)->device_handle ==
370 handle[i])
371 break;
372 if (i >= ARRAY_SIZE(handle))
373 return -ENXIO;
374
359 switch (cmd) {
375 switch (func) {
360 case ND_CMD_GET_CONFIG_SIZE:
361 rc = nfit_test_cmd_get_config_size(buf, buf_len);
362 break;
363 case ND_CMD_GET_CONFIG_DATA:
364 rc = nfit_test_cmd_get_config_data(buf, buf_len,
365 t->label[i]);
366 break;
367 case ND_CMD_SET_CONFIG_DATA:
368 rc = nfit_test_cmd_set_config_data(buf, buf_len,
369 t->label[i]);
370 break;
371 default:
372 return -ENOTTY;
373 }
374 } else {
375 struct ars_state *ars_state = &t->ars_state;
376
376 case ND_CMD_GET_CONFIG_SIZE:
377 rc = nfit_test_cmd_get_config_size(buf, buf_len);
378 break;
379 case ND_CMD_GET_CONFIG_DATA:
380 rc = nfit_test_cmd_get_config_data(buf, buf_len,
381 t->label[i]);
382 break;
383 case ND_CMD_SET_CONFIG_DATA:
384 rc = nfit_test_cmd_set_config_data(buf, buf_len,
385 t->label[i]);
386 break;
387 default:
388 return -ENOTTY;
389 }
390 } else {
391 struct ars_state *ars_state = &t->ars_state;
392
377 if (!nd_desc || !test_bit(cmd, &nd_desc->dsm_mask))
393 if (!nd_desc || !test_bit(cmd, &nd_desc->cmd_mask))
378 return -ENOTTY;
379
394 return -ENOTTY;
395
380 switch (cmd) {
396 switch (func) {
381 case ND_CMD_ARS_CAP:
382 rc = nfit_test_cmd_ars_cap(buf, buf_len);
383 break;
384 case ND_CMD_ARS_START:
385 rc = nfit_test_cmd_ars_start(ars_state, buf, buf_len,
386 cmd_rc);
387 break;
388 case ND_CMD_ARS_STATUS:

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1246 flush->device_handle = handle[4];
1247 flush->hint_count = 1;
1248 flush->hint_address[0] = t->flush_dma[4];
1249 }
1250
1251 post_ars_status(&t->ars_state, t->spa_set_dma[0], SPA0_SIZE);
1252
1253 acpi_desc = &t->acpi_desc;
397 case ND_CMD_ARS_CAP:
398 rc = nfit_test_cmd_ars_cap(buf, buf_len);
399 break;
400 case ND_CMD_ARS_START:
401 rc = nfit_test_cmd_ars_start(ars_state, buf, buf_len,
402 cmd_rc);
403 break;
404 case ND_CMD_ARS_STATUS:

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1262 flush->device_handle = handle[4];
1263 flush->hint_count = 1;
1264 flush->hint_address[0] = t->flush_dma[4];
1265 }
1266
1267 post_ars_status(&t->ars_state, t->spa_set_dma[0], SPA0_SIZE);
1268
1269 acpi_desc = &t->acpi_desc;
1254 set_bit(ND_CMD_GET_CONFIG_SIZE, &acpi_desc->dimm_dsm_force_en);
1255 set_bit(ND_CMD_GET_CONFIG_DATA, &acpi_desc->dimm_dsm_force_en);
1256 set_bit(ND_CMD_SET_CONFIG_DATA, &acpi_desc->dimm_dsm_force_en);
1257 set_bit(ND_CMD_ARS_CAP, &acpi_desc->bus_dsm_force_en);
1258 set_bit(ND_CMD_ARS_START, &acpi_desc->bus_dsm_force_en);
1259 set_bit(ND_CMD_ARS_STATUS, &acpi_desc->bus_dsm_force_en);
1260 set_bit(ND_CMD_CLEAR_ERROR, &acpi_desc->bus_dsm_force_en);
1270 set_bit(ND_CMD_GET_CONFIG_SIZE, &acpi_desc->dimm_cmd_force_en);
1271 set_bit(ND_CMD_GET_CONFIG_DATA, &acpi_desc->dimm_cmd_force_en);
1272 set_bit(ND_CMD_SET_CONFIG_DATA, &acpi_desc->dimm_cmd_force_en);
1273 set_bit(ND_CMD_ARS_CAP, &acpi_desc->bus_cmd_force_en);
1274 set_bit(ND_CMD_ARS_START, &acpi_desc->bus_cmd_force_en);
1275 set_bit(ND_CMD_ARS_STATUS, &acpi_desc->bus_cmd_force_en);
1276 set_bit(ND_CMD_CLEAR_ERROR, &acpi_desc->bus_cmd_force_en);
1261}
1262
1263static void nfit_test1_setup(struct nfit_test *t)
1264{
1265 size_t offset;
1266 void *nfit_buf = t->nfit_buf;
1267 struct acpi_nfit_memory_map *memdev;
1268 struct acpi_nfit_control_region *dcr;

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1310 dcr->revision_id = 1;
1311 dcr->serial_number = ~0;
1312 dcr->code = NFIT_FIC_BYTE;
1313 dcr->windows = 0;
1314
1315 post_ars_status(&t->ars_state, t->spa_set_dma[0], SPA2_SIZE);
1316
1317 acpi_desc = &t->acpi_desc;
1277}
1278
1279static void nfit_test1_setup(struct nfit_test *t)
1280{
1281 size_t offset;
1282 void *nfit_buf = t->nfit_buf;
1283 struct acpi_nfit_memory_map *memdev;
1284 struct acpi_nfit_control_region *dcr;

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1326 dcr->revision_id = 1;
1327 dcr->serial_number = ~0;
1328 dcr->code = NFIT_FIC_BYTE;
1329 dcr->windows = 0;
1330
1331 post_ars_status(&t->ars_state, t->spa_set_dma[0], SPA2_SIZE);
1332
1333 acpi_desc = &t->acpi_desc;
1318 set_bit(ND_CMD_ARS_CAP, &acpi_desc->bus_dsm_force_en);
1319 set_bit(ND_CMD_ARS_START, &acpi_desc->bus_dsm_force_en);
1320 set_bit(ND_CMD_ARS_STATUS, &acpi_desc->bus_dsm_force_en);
1321 set_bit(ND_CMD_CLEAR_ERROR, &acpi_desc->bus_dsm_force_en);
1334 set_bit(ND_CMD_ARS_CAP, &acpi_desc->bus_cmd_force_en);
1335 set_bit(ND_CMD_ARS_START, &acpi_desc->bus_cmd_force_en);
1336 set_bit(ND_CMD_ARS_STATUS, &acpi_desc->bus_cmd_force_en);
1337 set_bit(ND_CMD_CLEAR_ERROR, &acpi_desc->bus_cmd_force_en);
1322}
1323
1324static int nfit_test_blk_do_io(struct nd_blk_region *ndbr, resource_size_t dpa,
1325 void *iobuf, u64 len, int rw)
1326{
1327 struct nfit_blk *nfit_blk = ndbr->blk_provider_data;
1328 struct nfit_blk_mmio *mmio = &nfit_blk->mmio[BDW];
1329 struct nd_region *nd_region = &ndbr->nd_region;

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1339
1340static int nfit_test_blk_do_io(struct nd_blk_region *ndbr, resource_size_t dpa,
1341 void *iobuf, u64 len, int rw)
1342{
1343 struct nfit_blk *nfit_blk = ndbr->blk_provider_data;
1344 struct nfit_blk_mmio *mmio = &nfit_blk->mmio[BDW];
1345 struct nd_region *nd_region = &ndbr->nd_region;

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