turbostat.c (f26e8817b235d8764363bffcc9cbfc61867371f2) turbostat.c (388e9c8134be6bbc3751ba7072f5fa9bc8ecbe01)
1/*
2 * turbostat -- show CPU frequency and C-state residency
3 * on modern Intel turbo-capable processors.
4 *
5 * Copyright (c) 2013 Intel Corporation.
6 * Len Brown <len.brown@intel.com>
7 *
8 * This program is free software; you can redistribute it and/or modify it

--- 7 unchanged lines hidden (view full) ---

16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
20 */
21
22#define _GNU_SOURCE
23#include MSRHEADER
1/*
2 * turbostat -- show CPU frequency and C-state residency
3 * on modern Intel turbo-capable processors.
4 *
5 * Copyright (c) 2013 Intel Corporation.
6 * Len Brown <len.brown@intel.com>
7 *
8 * This program is free software; you can redistribute it and/or modify it

--- 7 unchanged lines hidden (view full) ---

16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
20 */
21
22#define _GNU_SOURCE
23#include MSRHEADER
24#include INTEL_FAMILY_HEADER
24#include <stdarg.h>
25#include <stdio.h>
26#include <err.h>
27#include <unistd.h>
28#include <sys/types.h>
29#include <sys/wait.h>
30#include <sys/stat.h>
31#include <sys/resource.h>

--- 14 unchanged lines hidden (view full) ---

46char *proc_stat = "/proc/stat";
47FILE *outf;
48int *fd_percpu;
49struct timespec interval_ts = {5, 0};
50unsigned int debug;
51unsigned int rapl_joules;
52unsigned int summary_only;
53unsigned int dump_only;
25#include <stdarg.h>
26#include <stdio.h>
27#include <err.h>
28#include <unistd.h>
29#include <sys/types.h>
30#include <sys/wait.h>
31#include <sys/stat.h>
32#include <sys/resource.h>

--- 14 unchanged lines hidden (view full) ---

47char *proc_stat = "/proc/stat";
48FILE *outf;
49int *fd_percpu;
50struct timespec interval_ts = {5, 0};
51unsigned int debug;
52unsigned int rapl_joules;
53unsigned int summary_only;
54unsigned int dump_only;
54unsigned int skip_c0;
55unsigned int skip_c1;
56unsigned int do_nhm_cstates;
57unsigned int do_snb_cstates;
58unsigned int do_knl_cstates;
59unsigned int do_pc2;
60unsigned int do_pc3;
61unsigned int do_pc6;
62unsigned int do_pc7;
63unsigned int do_c8_c9_c10;

--- 62 unchanged lines hidden (view full) ---

126#define RAPL_DRAM (1 << 3)
127 /* 0x618 MSR_DRAM_POWER_LIMIT */
128 /* 0x619 MSR_DRAM_ENERGY_STATUS */
129#define RAPL_DRAM_PERF_STATUS (1 << 4)
130 /* 0x61b MSR_DRAM_PERF_STATUS */
131#define RAPL_DRAM_POWER_INFO (1 << 5)
132 /* 0x61c MSR_DRAM_POWER_INFO */
133
55unsigned int do_nhm_cstates;
56unsigned int do_snb_cstates;
57unsigned int do_knl_cstates;
58unsigned int do_pc2;
59unsigned int do_pc3;
60unsigned int do_pc6;
61unsigned int do_pc7;
62unsigned int do_c8_c9_c10;

--- 62 unchanged lines hidden (view full) ---

125#define RAPL_DRAM (1 << 3)
126 /* 0x618 MSR_DRAM_POWER_LIMIT */
127 /* 0x619 MSR_DRAM_ENERGY_STATUS */
128#define RAPL_DRAM_PERF_STATUS (1 << 4)
129 /* 0x61b MSR_DRAM_PERF_STATUS */
130#define RAPL_DRAM_POWER_INFO (1 << 5)
131 /* 0x61c MSR_DRAM_POWER_INFO */
132
134#define RAPL_CORES (1 << 6)
133#define RAPL_CORES_POWER_LIMIT (1 << 6)
135 /* 0x638 MSR_PP0_POWER_LIMIT */
134 /* 0x638 MSR_PP0_POWER_LIMIT */
136 /* 0x639 MSR_PP0_ENERGY_STATUS */
137#define RAPL_CORE_POLICY (1 << 7)
138 /* 0x63a MSR_PP0_POLICY */
139
140#define RAPL_GFX (1 << 8)
141 /* 0x640 MSR_PP1_POWER_LIMIT */
142 /* 0x641 MSR_PP1_ENERGY_STATUS */
143 /* 0x642 MSR_PP1_POLICY */
135#define RAPL_CORE_POLICY (1 << 7)
136 /* 0x63a MSR_PP0_POLICY */
137
138#define RAPL_GFX (1 << 8)
139 /* 0x640 MSR_PP1_POWER_LIMIT */
140 /* 0x641 MSR_PP1_ENERGY_STATUS */
141 /* 0x642 MSR_PP1_POLICY */
142
143#define RAPL_CORES_ENERGY_STATUS (1 << 9)
144 /* 0x639 MSR_PP0_ENERGY_STATUS */
145#define RAPL_CORES (RAPL_CORES_ENERGY_STATUS | RAPL_CORES_POWER_LIMIT)
144#define TJMAX_DEFAULT 100
145
146#define MAX(a, b) ((a) > (b) ? (a) : (b))
147
146#define TJMAX_DEFAULT 100
147
148#define MAX(a, b) ((a) > (b) ? (a) : (b))
149
148int aperf_mperf_unstable;
150/*
151 * buffer size used by sscanf() for added column names
152 * Usually truncated to 7 characters, but also handles 18 columns for raw 64-bit counters
153 */
154#define NAME_BYTES 20
155
149int backwards_count;
150char *progname;
151
152cpu_set_t *cpu_present_set, *cpu_affinity_set;
153size_t cpu_present_setsize, cpu_affinity_setsize;
154
155struct thread_data {
156 unsigned long long tsc;

--- 5 unchanged lines hidden (view full) ---

162 unsigned long long extra_msr32;
163 unsigned long long extra_delta32;
164 unsigned int irq_count;
165 unsigned int smi_count;
166 unsigned int cpu_id;
167 unsigned int flags;
168#define CPU_IS_FIRST_THREAD_IN_CORE 0x2
169#define CPU_IS_FIRST_CORE_IN_PACKAGE 0x4
156int backwards_count;
157char *progname;
158
159cpu_set_t *cpu_present_set, *cpu_affinity_set;
160size_t cpu_present_setsize, cpu_affinity_setsize;
161
162struct thread_data {
163 unsigned long long tsc;

--- 5 unchanged lines hidden (view full) ---

169 unsigned long long extra_msr32;
170 unsigned long long extra_delta32;
171 unsigned int irq_count;
172 unsigned int smi_count;
173 unsigned int cpu_id;
174 unsigned int flags;
175#define CPU_IS_FIRST_THREAD_IN_CORE 0x2
176#define CPU_IS_FIRST_CORE_IN_PACKAGE 0x4
177 unsigned long long counter[1];
170} *thread_even, *thread_odd;
171
172struct core_data {
173 unsigned long long c3;
174 unsigned long long c6;
175 unsigned long long c7;
176 unsigned int core_temp_c;
177 unsigned int core_id;
178} *thread_even, *thread_odd;
179
180struct core_data {
181 unsigned long long c3;
182 unsigned long long c6;
183 unsigned long long c7;
184 unsigned int core_temp_c;
185 unsigned int core_id;
186 unsigned long long counter[1];
178} *core_even, *core_odd;
179
180struct pkg_data {
181 unsigned long long pc2;
182 unsigned long long pc3;
183 unsigned long long pc6;
184 unsigned long long pc7;
185 unsigned long long pc8;

--- 8 unchanged lines hidden (view full) ---

194 unsigned int package_id;
195 unsigned int energy_pkg; /* MSR_PKG_ENERGY_STATUS */
196 unsigned int energy_dram; /* MSR_DRAM_ENERGY_STATUS */
197 unsigned int energy_cores; /* MSR_PP0_ENERGY_STATUS */
198 unsigned int energy_gfx; /* MSR_PP1_ENERGY_STATUS */
199 unsigned int rapl_pkg_perf_status; /* MSR_PKG_PERF_STATUS */
200 unsigned int rapl_dram_perf_status; /* MSR_DRAM_PERF_STATUS */
201 unsigned int pkg_temp_c;
187} *core_even, *core_odd;
188
189struct pkg_data {
190 unsigned long long pc2;
191 unsigned long long pc3;
192 unsigned long long pc6;
193 unsigned long long pc7;
194 unsigned long long pc8;

--- 8 unchanged lines hidden (view full) ---

203 unsigned int package_id;
204 unsigned int energy_pkg; /* MSR_PKG_ENERGY_STATUS */
205 unsigned int energy_dram; /* MSR_DRAM_ENERGY_STATUS */
206 unsigned int energy_cores; /* MSR_PP0_ENERGY_STATUS */
207 unsigned int energy_gfx; /* MSR_PP1_ENERGY_STATUS */
208 unsigned int rapl_pkg_perf_status; /* MSR_PKG_PERF_STATUS */
209 unsigned int rapl_dram_perf_status; /* MSR_DRAM_PERF_STATUS */
210 unsigned int pkg_temp_c;
202
211 unsigned long long counter[1];
203} *package_even, *package_odd;
204
205#define ODD_COUNTERS thread_odd, core_odd, package_odd
206#define EVEN_COUNTERS thread_even, core_even, package_even
207
208#define GET_THREAD(thread_base, thread_no, core_no, pkg_no) \
209 (thread_base + (pkg_no) * topo.num_cores_per_pkg * \
210 topo.num_threads_per_core + \
211 (core_no) * topo.num_threads_per_core + (thread_no))
212#define GET_CORE(core_base, core_no, pkg_no) \
213 (core_base + (pkg_no) * topo.num_cores_per_pkg + (core_no))
214#define GET_PKG(pkg_base, pkg_no) (pkg_base + pkg_no)
215
212} *package_even, *package_odd;
213
214#define ODD_COUNTERS thread_odd, core_odd, package_odd
215#define EVEN_COUNTERS thread_even, core_even, package_even
216
217#define GET_THREAD(thread_base, thread_no, core_no, pkg_no) \
218 (thread_base + (pkg_no) * topo.num_cores_per_pkg * \
219 topo.num_threads_per_core + \
220 (core_no) * topo.num_threads_per_core + (thread_no))
221#define GET_CORE(core_base, core_no, pkg_no) \
222 (core_base + (pkg_no) * topo.num_cores_per_pkg + (core_no))
223#define GET_PKG(pkg_base, pkg_no) (pkg_base + pkg_no)
224
225enum counter_scope {SCOPE_CPU, SCOPE_CORE, SCOPE_PACKAGE};
226enum counter_type {COUNTER_CYCLES, COUNTER_SECONDS};
227enum counter_format {FORMAT_RAW, FORMAT_DELTA, FORMAT_PERCENT};
228
229struct msr_counter {
230 unsigned int msr_num;
231 char name[NAME_BYTES];
232 unsigned int width;
233 enum counter_type type;
234 enum counter_format format;
235 struct msr_counter *next;
236};
237
238struct sys_counters {
239 unsigned int thread_counter_bytes;
240 unsigned int core_counter_bytes;
241 unsigned int package_counter_bytes;
242 struct msr_counter *tp;
243 struct msr_counter *cp;
244 struct msr_counter *pp;
245} sys;
246
216struct system_summary {
217 struct thread_data threads;
218 struct core_data cores;
219 struct pkg_data packages;
247struct system_summary {
248 struct thread_data threads;
249 struct core_data cores;
250 struct pkg_data packages;
220} sum, average;
251} average;
221
222
223struct topo_params {
224 int num_packages;
225 int num_cpus;
226 int num_cores;
227 int max_cpu_num;
228 int num_cores_per_pkg;

--- 85 unchanged lines hidden (view full) ---

314 err(-1, "msr %d offset 0x%llx read failed", cpu, (unsigned long long)offset);
315
316 return 0;
317}
318
319/*
320 * Example Format w/ field column widths:
321 *
252
253
254struct topo_params {
255 int num_packages;
256 int num_cpus;
257 int num_cores;
258 int max_cpu_num;
259 int num_cores_per_pkg;

--- 85 unchanged lines hidden (view full) ---

345 err(-1, "msr %d offset 0x%llx read failed", cpu, (unsigned long long)offset);
346
347 return 0;
348}
349
350/*
351 * Example Format w/ field column widths:
352 *
322 * Package Core CPU Avg_MHz Bzy_MHz TSC_MHz IRQ SMI Busy% CPU_%c1 CPU_%c3 CPU_%c6 CPU_%c7 CoreTmp PkgTmp GFXMHz Pkg%pc2 Pkg%pc3 Pkg%pc6 Pkg%pc7 PkgWatt CorWatt GFXWatt
353 * Package Core CPU Avg_MHz Bzy_MHz TSC_MHz IRQ SMI Busy% CPU_%c1 CPU_%c3 CPU_%c6 CPU_%c7 ThreadC CoreTmp CoreCnt PkgTmp GFXMHz Pkg%pc2 Pkg%pc3 Pkg%pc6 Pkg%pc7 PkgWatt CorWatt GFXWatt PkgCnt
323 * 12345678123456781234567812345678123456781234567812345678123456781234567812345678123456781234567812345678123456781234567812345678123456781234567812345678123456781234567812345678
324 */
325
326void print_header(void)
327{
354 * 12345678123456781234567812345678123456781234567812345678123456781234567812345678123456781234567812345678123456781234567812345678123456781234567812345678123456781234567812345678
355 */
356
357void print_header(void)
358{
359 struct msr_counter *mp;
360
328 if (show_pkg)
361 if (show_pkg)
329 outp += sprintf(outp, " Package");
362 outp += sprintf(outp, "\tPackage");
330 if (show_core)
363 if (show_core)
331 outp += sprintf(outp, " Core");
364 outp += sprintf(outp, "\tCore");
332 if (show_cpu)
365 if (show_cpu)
333 outp += sprintf(outp, " CPU");
366 outp += sprintf(outp, "\tCPU");
334 if (has_aperf)
367 if (has_aperf)
335 outp += sprintf(outp, " Avg_MHz");
368 outp += sprintf(outp, "\tAvg_MHz");
336 if (has_aperf)
369 if (has_aperf)
337 outp += sprintf(outp, " Busy%%");
370 outp += sprintf(outp, "\tBusy%%");
338 if (has_aperf)
371 if (has_aperf)
339 outp += sprintf(outp, " Bzy_MHz");
340 outp += sprintf(outp, " TSC_MHz");
372 outp += sprintf(outp, "\tBzy_MHz");
373 outp += sprintf(outp, "\tTSC_MHz");
341
342 if (extra_delta_offset32)
374
375 if (extra_delta_offset32)
343 outp += sprintf(outp, " count 0x%03X", extra_delta_offset32);
376 outp += sprintf(outp, "\tcount 0x%03X", extra_delta_offset32);
344 if (extra_delta_offset64)
377 if (extra_delta_offset64)
345 outp += sprintf(outp, " COUNT 0x%03X", extra_delta_offset64);
378 outp += sprintf(outp, "\tCOUNT 0x%03X", extra_delta_offset64);
346 if (extra_msr_offset32)
379 if (extra_msr_offset32)
347 outp += sprintf(outp, " MSR 0x%03X", extra_msr_offset32);
380 outp += sprintf(outp, "\t MSR 0x%03X", extra_msr_offset32);
348 if (extra_msr_offset64)
381 if (extra_msr_offset64)
349 outp += sprintf(outp, " MSR 0x%03X", extra_msr_offset64);
382 outp += sprintf(outp, "\tMSR 0x%03X", extra_msr_offset64);
350
351 if (!debug)
352 goto done;
353
354 if (do_irq)
383
384 if (!debug)
385 goto done;
386
387 if (do_irq)
355 outp += sprintf(outp, " IRQ");
388 outp += sprintf(outp, "\tIRQ");
356 if (do_smi)
389 if (do_smi)
357 outp += sprintf(outp, " SMI");
390 outp += sprintf(outp, "\tSMI");
358
359 if (do_nhm_cstates)
391
392 if (do_nhm_cstates)
360 outp += sprintf(outp, " CPU%%c1");
393 outp += sprintf(outp, "\tCPU%%c1");
361 if (do_nhm_cstates && !do_slm_cstates && !do_knl_cstates)
394 if (do_nhm_cstates && !do_slm_cstates && !do_knl_cstates)
362 outp += sprintf(outp, " CPU%%c3");
395 outp += sprintf(outp, "\tCPU%%c3");
363 if (do_nhm_cstates)
396 if (do_nhm_cstates)
364 outp += sprintf(outp, " CPU%%c6");
397 outp += sprintf(outp, "\tCPU%%c6");
365 if (do_snb_cstates)
398 if (do_snb_cstates)
366 outp += sprintf(outp, " CPU%%c7");
399 outp += sprintf(outp, "\tCPU%%c7");
367
400
401 for (mp = sys.tp; mp; mp = mp->next) {
402 if (mp->format == FORMAT_RAW) {
403 if (mp->width == 64)
404 outp += sprintf(outp, "\t%18.18s", mp->name);
405 else
406 outp += sprintf(outp, "\t%10.10s", mp->name);
407 } else {
408 outp += sprintf(outp, "\t%-7.7s", mp->name);
409 }
410 }
411
368 if (do_dts)
412 if (do_dts)
369 outp += sprintf(outp, " CoreTmp");
413 outp += sprintf(outp, "\tCoreTmp");
414
415 for (mp = sys.cp; mp; mp = mp->next) {
416 if (mp->format == FORMAT_RAW) {
417 if (mp->width == 64)
418 outp += sprintf(outp, "\t%18.18s", mp->name);
419 else
420 outp += sprintf(outp, "\t%10.10s", mp->name);
421 } else {
422 outp += sprintf(outp, "\t%-7.7s", mp->name);
423 }
424 }
425
370 if (do_ptm)
426 if (do_ptm)
371 outp += sprintf(outp, " PkgTmp");
427 outp += sprintf(outp, "\tPkgTmp");
372
373 if (do_gfx_rc6_ms)
428
429 if (do_gfx_rc6_ms)
374 outp += sprintf(outp, " GFX%%rc6");
430 outp += sprintf(outp, "\tGFX%%rc6");
375
376 if (do_gfx_mhz)
431
432 if (do_gfx_mhz)
377 outp += sprintf(outp, " GFXMHz");
433 outp += sprintf(outp, "\tGFXMHz");
378
379 if (do_skl_residency) {
434
435 if (do_skl_residency) {
380 outp += sprintf(outp, " Totl%%C0");
381 outp += sprintf(outp, " Any%%C0");
382 outp += sprintf(outp, " GFX%%C0");
383 outp += sprintf(outp, " CPUGFX%%");
436 outp += sprintf(outp, "\tTotl%%C0");
437 outp += sprintf(outp, "\tAny%%C0");
438 outp += sprintf(outp, "\tGFX%%C0");
439 outp += sprintf(outp, "\tCPUGFX%%");
384 }
385
386 if (do_pc2)
440 }
441
442 if (do_pc2)
387 outp += sprintf(outp, " Pkg%%pc2");
443 outp += sprintf(outp, "\tPkg%%pc2");
388 if (do_pc3)
444 if (do_pc3)
389 outp += sprintf(outp, " Pkg%%pc3");
445 outp += sprintf(outp, "\tPkg%%pc3");
390 if (do_pc6)
446 if (do_pc6)
391 outp += sprintf(outp, " Pkg%%pc6");
447 outp += sprintf(outp, "\tPkg%%pc6");
392 if (do_pc7)
448 if (do_pc7)
393 outp += sprintf(outp, " Pkg%%pc7");
449 outp += sprintf(outp, "\tPkg%%pc7");
394 if (do_c8_c9_c10) {
450 if (do_c8_c9_c10) {
395 outp += sprintf(outp, " Pkg%%pc8");
396 outp += sprintf(outp, " Pkg%%pc9");
397 outp += sprintf(outp, " Pk%%pc10");
451 outp += sprintf(outp, "\tPkg%%pc8");
452 outp += sprintf(outp, "\tPkg%%pc9");
453 outp += sprintf(outp, "\tPk%%pc10");
398 }
399
400 if (do_rapl && !rapl_joules) {
401 if (do_rapl & RAPL_PKG)
454 }
455
456 if (do_rapl && !rapl_joules) {
457 if (do_rapl & RAPL_PKG)
402 outp += sprintf(outp, " PkgWatt");
403 if (do_rapl & RAPL_CORES)
404 outp += sprintf(outp, " CorWatt");
458 outp += sprintf(outp, "\tPkgWatt");
459 if (do_rapl & RAPL_CORES_ENERGY_STATUS)
460 outp += sprintf(outp, "\tCorWatt");
405 if (do_rapl & RAPL_GFX)
461 if (do_rapl & RAPL_GFX)
406 outp += sprintf(outp, " GFXWatt");
462 outp += sprintf(outp, "\tGFXWatt");
407 if (do_rapl & RAPL_DRAM)
463 if (do_rapl & RAPL_DRAM)
408 outp += sprintf(outp, " RAMWatt");
464 outp += sprintf(outp, "\tRAMWatt");
409 if (do_rapl & RAPL_PKG_PERF_STATUS)
465 if (do_rapl & RAPL_PKG_PERF_STATUS)
410 outp += sprintf(outp, " PKG_%%");
466 outp += sprintf(outp, "\tPKG_%%");
411 if (do_rapl & RAPL_DRAM_PERF_STATUS)
467 if (do_rapl & RAPL_DRAM_PERF_STATUS)
412 outp += sprintf(outp, " RAM_%%");
468 outp += sprintf(outp, "\tRAM_%%");
413 } else if (do_rapl && rapl_joules) {
414 if (do_rapl & RAPL_PKG)
469 } else if (do_rapl && rapl_joules) {
470 if (do_rapl & RAPL_PKG)
415 outp += sprintf(outp, " Pkg_J");
416 if (do_rapl & RAPL_CORES)
417 outp += sprintf(outp, " Cor_J");
471 outp += sprintf(outp, "\tPkg_J");
472 if (do_rapl & RAPL_CORES_ENERGY_STATUS)
473 outp += sprintf(outp, "\tCor_J");
418 if (do_rapl & RAPL_GFX)
474 if (do_rapl & RAPL_GFX)
419 outp += sprintf(outp, " GFX_J");
475 outp += sprintf(outp, "\tGFX_J");
420 if (do_rapl & RAPL_DRAM)
476 if (do_rapl & RAPL_DRAM)
421 outp += sprintf(outp, " RAM_J");
477 outp += sprintf(outp, "\tRAM_J");
422 if (do_rapl & RAPL_PKG_PERF_STATUS)
478 if (do_rapl & RAPL_PKG_PERF_STATUS)
423 outp += sprintf(outp, " PKG_%%");
479 outp += sprintf(outp, "\tPKG_%%");
424 if (do_rapl & RAPL_DRAM_PERF_STATUS)
480 if (do_rapl & RAPL_DRAM_PERF_STATUS)
425 outp += sprintf(outp, " RAM_%%");
426 outp += sprintf(outp, " time");
427
481 outp += sprintf(outp, "\tRAM_%%");
428 }
482 }
429 done:
483 for (mp = sys.pp; mp; mp = mp->next) {
484 if (mp->format == FORMAT_RAW) {
485 if (mp->width == 64)
486 outp += sprintf(outp, "\t%18.18s", mp->name);
487 else
488 outp += sprintf(outp, "\t%10.10s", mp->name);
489 } else {
490 outp += sprintf(outp, "\t%-7.7s", mp->name);
491 }
492 }
493
494done:
430 outp += sprintf(outp, "\n");
431}
432
433int dump_counters(struct thread_data *t, struct core_data *c,
434 struct pkg_data *p)
435{
495 outp += sprintf(outp, "\n");
496}
497
498int dump_counters(struct thread_data *t, struct core_data *c,
499 struct pkg_data *p)
500{
501 int i;
502 struct msr_counter *mp;
503
436 outp += sprintf(outp, "t %p, c %p, p %p\n", t, c, p);
437
438 if (t) {
439 outp += sprintf(outp, "CPU: %d flags 0x%x\n",
440 t->cpu_id, t->flags);
441 outp += sprintf(outp, "TSC: %016llX\n", t->tsc);
442 outp += sprintf(outp, "aperf: %016llX\n", t->aperf);
443 outp += sprintf(outp, "mperf: %016llX\n", t->mperf);

--- 5 unchanged lines hidden (view full) ---

449 outp += sprintf(outp, "msr0x%x: %08llX\n",
450 extra_msr_offset32, t->extra_msr32);
451 outp += sprintf(outp, "msr0x%x: %016llX\n",
452 extra_msr_offset64, t->extra_msr64);
453 if (do_irq)
454 outp += sprintf(outp, "IRQ: %08X\n", t->irq_count);
455 if (do_smi)
456 outp += sprintf(outp, "SMI: %08X\n", t->smi_count);
504 outp += sprintf(outp, "t %p, c %p, p %p\n", t, c, p);
505
506 if (t) {
507 outp += sprintf(outp, "CPU: %d flags 0x%x\n",
508 t->cpu_id, t->flags);
509 outp += sprintf(outp, "TSC: %016llX\n", t->tsc);
510 outp += sprintf(outp, "aperf: %016llX\n", t->aperf);
511 outp += sprintf(outp, "mperf: %016llX\n", t->mperf);

--- 5 unchanged lines hidden (view full) ---

517 outp += sprintf(outp, "msr0x%x: %08llX\n",
518 extra_msr_offset32, t->extra_msr32);
519 outp += sprintf(outp, "msr0x%x: %016llX\n",
520 extra_msr_offset64, t->extra_msr64);
521 if (do_irq)
522 outp += sprintf(outp, "IRQ: %08X\n", t->irq_count);
523 if (do_smi)
524 outp += sprintf(outp, "SMI: %08X\n", t->smi_count);
525
526 for (i = 0, mp = sys.tp; mp; i++, mp = mp->next) {
527 outp += sprintf(outp, "tADDED [%d] msr0x%x: %08llX\n",
528 i, mp->msr_num, t->counter[i]);
529 }
457 }
458
459 if (c) {
460 outp += sprintf(outp, "core: %d\n", c->core_id);
461 outp += sprintf(outp, "c3: %016llX\n", c->c3);
462 outp += sprintf(outp, "c6: %016llX\n", c->c6);
463 outp += sprintf(outp, "c7: %016llX\n", c->c7);
464 outp += sprintf(outp, "DTS: %dC\n", c->core_temp_c);
530 }
531
532 if (c) {
533 outp += sprintf(outp, "core: %d\n", c->core_id);
534 outp += sprintf(outp, "c3: %016llX\n", c->c3);
535 outp += sprintf(outp, "c6: %016llX\n", c->c6);
536 outp += sprintf(outp, "c7: %016llX\n", c->c7);
537 outp += sprintf(outp, "DTS: %dC\n", c->core_temp_c);
538
539 for (i = 0, mp = sys.cp; mp; i++, mp = mp->next) {
540 outp += sprintf(outp, "cADDED [%d] msr0x%x: %08llX\n",
541 i, mp->msr_num, c->counter[i]);
542 }
465 }
466
467 if (p) {
468 outp += sprintf(outp, "package: %d\n", p->package_id);
469
470 outp += sprintf(outp, "Weighted cores: %016llX\n", p->pkg_wtd_core_c0);
471 outp += sprintf(outp, "Any cores: %016llX\n", p->pkg_any_core_c0);
472 outp += sprintf(outp, "Any GFX: %016llX\n", p->pkg_any_gfxe_c0);

--- 13 unchanged lines hidden (view full) ---

486 outp += sprintf(outp, "Joules COR: %0X\n", p->energy_cores);
487 outp += sprintf(outp, "Joules GFX: %0X\n", p->energy_gfx);
488 outp += sprintf(outp, "Joules RAM: %0X\n", p->energy_dram);
489 outp += sprintf(outp, "Throttle PKG: %0X\n",
490 p->rapl_pkg_perf_status);
491 outp += sprintf(outp, "Throttle RAM: %0X\n",
492 p->rapl_dram_perf_status);
493 outp += sprintf(outp, "PTM: %dC\n", p->pkg_temp_c);
543 }
544
545 if (p) {
546 outp += sprintf(outp, "package: %d\n", p->package_id);
547
548 outp += sprintf(outp, "Weighted cores: %016llX\n", p->pkg_wtd_core_c0);
549 outp += sprintf(outp, "Any cores: %016llX\n", p->pkg_any_core_c0);
550 outp += sprintf(outp, "Any GFX: %016llX\n", p->pkg_any_gfxe_c0);

--- 13 unchanged lines hidden (view full) ---

564 outp += sprintf(outp, "Joules COR: %0X\n", p->energy_cores);
565 outp += sprintf(outp, "Joules GFX: %0X\n", p->energy_gfx);
566 outp += sprintf(outp, "Joules RAM: %0X\n", p->energy_dram);
567 outp += sprintf(outp, "Throttle PKG: %0X\n",
568 p->rapl_pkg_perf_status);
569 outp += sprintf(outp, "Throttle RAM: %0X\n",
570 p->rapl_dram_perf_status);
571 outp += sprintf(outp, "PTM: %dC\n", p->pkg_temp_c);
572
573 for (i = 0, mp = sys.pp; mp; i++, mp = mp->next) {
574 outp += sprintf(outp, "pADDED [%d] msr0x%x: %08llX\n",
575 i, mp->msr_num, p->counter[i]);
576 }
494 }
495
496 outp += sprintf(outp, "\n");
497
498 return 0;
499}
500
501/*
502 * column formatting convention & formats
503 */
504int format_counters(struct thread_data *t, struct core_data *c,
505 struct pkg_data *p)
506{
507 double interval_float;
508 char *fmt8;
577 }
578
579 outp += sprintf(outp, "\n");
580
581 return 0;
582}
583
584/*
585 * column formatting convention & formats
586 */
587int format_counters(struct thread_data *t, struct core_data *c,
588 struct pkg_data *p)
589{
590 double interval_float;
591 char *fmt8;
592 int i;
593 struct msr_counter *mp;
509
510 /* if showing only 1st thread in core and this isn't one, bail out */
511 if (show_core_only && !(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
512 return 0;
513
514 /* if showing only 1st thread in pkg and this isn't one, bail out */
515 if (show_pkg_only && !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
516 return 0;
517
518 interval_float = tv_delta.tv_sec + tv_delta.tv_usec/1000000.0;
519
520 /* topo columns, print blanks on 1st (average) line */
521 if (t == &average.threads) {
522 if (show_pkg)
594
595 /* if showing only 1st thread in core and this isn't one, bail out */
596 if (show_core_only && !(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
597 return 0;
598
599 /* if showing only 1st thread in pkg and this isn't one, bail out */
600 if (show_pkg_only && !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
601 return 0;
602
603 interval_float = tv_delta.tv_sec + tv_delta.tv_usec/1000000.0;
604
605 /* topo columns, print blanks on 1st (average) line */
606 if (t == &average.threads) {
607 if (show_pkg)
523 outp += sprintf(outp, " -");
608 outp += sprintf(outp, "\t-");
524 if (show_core)
609 if (show_core)
525 outp += sprintf(outp, " -");
610 outp += sprintf(outp, "\t-");
526 if (show_cpu)
611 if (show_cpu)
527 outp += sprintf(outp, " -");
612 outp += sprintf(outp, "\t-");
528 } else {
529 if (show_pkg) {
530 if (p)
613 } else {
614 if (show_pkg) {
615 if (p)
531 outp += sprintf(outp, "%8d", p->package_id);
616 outp += sprintf(outp, "\t%d", p->package_id);
532 else
617 else
533 outp += sprintf(outp, " -");
618 outp += sprintf(outp, "\t-");
534 }
535 if (show_core) {
536 if (c)
619 }
620 if (show_core) {
621 if (c)
537 outp += sprintf(outp, "%8d", c->core_id);
622 outp += sprintf(outp, "\t%d", c->core_id);
538 else
623 else
539 outp += sprintf(outp, " -");
624 outp += sprintf(outp, "\t-");
540 }
541 if (show_cpu)
625 }
626 if (show_cpu)
542 outp += sprintf(outp, "%8d", t->cpu_id);
627 outp += sprintf(outp, "\t%d", t->cpu_id);
543 }
544
545 /* Avg_MHz */
546 if (has_aperf)
628 }
629
630 /* Avg_MHz */
631 if (has_aperf)
547 outp += sprintf(outp, "%8.0f",
632 outp += sprintf(outp, "\t%.0f",
548 1.0 / units * t->aperf / interval_float);
549
550 /* Busy% */
633 1.0 / units * t->aperf / interval_float);
634
635 /* Busy% */
551 if (has_aperf) {
552 if (!skip_c0)
553 outp += sprintf(outp, "%8.2f", 100.0 * t->mperf/t->tsc/tsc_tweak);
554 else
555 outp += sprintf(outp, "********");
556 }
636 if (has_aperf)
637 outp += sprintf(outp, "\t%.2f", 100.0 * t->mperf/t->tsc/tsc_tweak);
557
558 /* Bzy_MHz */
559 if (has_aperf) {
560 if (has_base_hz)
638
639 /* Bzy_MHz */
640 if (has_aperf) {
641 if (has_base_hz)
561 outp += sprintf(outp, "%8.0f", base_hz / units * t->aperf / t->mperf);
642 outp += sprintf(outp, "\t%.0f", base_hz / units * t->aperf / t->mperf);
562 else
643 else
563 outp += sprintf(outp, "%8.0f",
644 outp += sprintf(outp, "\t%.0f",
564 1.0 * t->tsc / units * t->aperf / t->mperf / interval_float);
565 }
566
567 /* TSC_MHz */
645 1.0 * t->tsc / units * t->aperf / t->mperf / interval_float);
646 }
647
648 /* TSC_MHz */
568 outp += sprintf(outp, "%8.0f", 1.0 * t->tsc/units/interval_float);
649 outp += sprintf(outp, "\t%.0f", 1.0 * t->tsc/units/interval_float);
569
570 /* delta */
571 if (extra_delta_offset32)
650
651 /* delta */
652 if (extra_delta_offset32)
572 outp += sprintf(outp, " %11llu", t->extra_delta32);
653 outp += sprintf(outp, "\t%11llu", t->extra_delta32);
573
574 /* DELTA */
575 if (extra_delta_offset64)
654
655 /* DELTA */
656 if (extra_delta_offset64)
576 outp += sprintf(outp, " %11llu", t->extra_delta64);
657 outp += sprintf(outp, "\t%11llu", t->extra_delta64);
577 /* msr */
578 if (extra_msr_offset32)
658 /* msr */
659 if (extra_msr_offset32)
579 outp += sprintf(outp, " 0x%08llx", t->extra_msr32);
660 outp += sprintf(outp, "\t0x%08llx", t->extra_msr32);
580
581 /* MSR */
582 if (extra_msr_offset64)
661
662 /* MSR */
663 if (extra_msr_offset64)
583 outp += sprintf(outp, " 0x%016llx", t->extra_msr64);
664 outp += sprintf(outp, "\t0x%016llx", t->extra_msr64);
584
585 if (!debug)
586 goto done;
587
588 /* IRQ */
589 if (do_irq)
665
666 if (!debug)
667 goto done;
668
669 /* IRQ */
670 if (do_irq)
590 outp += sprintf(outp, "%8d", t->irq_count);
671 outp += sprintf(outp, "\t%d", t->irq_count);
591
592 /* SMI */
593 if (do_smi)
672
673 /* SMI */
674 if (do_smi)
594 outp += sprintf(outp, "%8d", t->smi_count);
675 outp += sprintf(outp, "\t%d", t->smi_count);
595
676
596 if (do_nhm_cstates) {
597 if (!skip_c1)
598 outp += sprintf(outp, "%8.2f", 100.0 * t->c1/t->tsc);
599 else
600 outp += sprintf(outp, "********");
601 }
677 if (do_nhm_cstates)
678 outp += sprintf(outp, "\t%.2f", 100.0 * t->c1/t->tsc);
602
603 /* print per-core data only for 1st thread in core */
604 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
605 goto done;
606
607 if (do_nhm_cstates && !do_slm_cstates && !do_knl_cstates)
679
680 /* print per-core data only for 1st thread in core */
681 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
682 goto done;
683
684 if (do_nhm_cstates && !do_slm_cstates && !do_knl_cstates)
608 outp += sprintf(outp, "%8.2f", 100.0 * c->c3/t->tsc);
685 outp += sprintf(outp, "\t%.2f", 100.0 * c->c3/t->tsc);
609 if (do_nhm_cstates)
686 if (do_nhm_cstates)
610 outp += sprintf(outp, "%8.2f", 100.0 * c->c6/t->tsc);
687 outp += sprintf(outp, "\t%.2f", 100.0 * c->c6/t->tsc);
611 if (do_snb_cstates)
688 if (do_snb_cstates)
612 outp += sprintf(outp, "%8.2f", 100.0 * c->c7/t->tsc);
689 outp += sprintf(outp, "\t%.2f", 100.0 * c->c7/t->tsc);
613
690
691 for (i = 0, mp = sys.tp; mp; i++, mp = mp->next) {
692 if (mp->format == FORMAT_RAW) {
693 if (mp->width == 32)
694 outp += sprintf(outp, "\t0x%08lx", (unsigned long) t->counter[i]);
695 else
696 outp += sprintf(outp, "\t0x%016llx", t->counter[i]);
697 } else if (mp->format == FORMAT_DELTA) {
698 outp += sprintf(outp, "\t%8lld", t->counter[i]);
699 } else if (mp->format == FORMAT_PERCENT) {
700 outp += sprintf(outp, "\t%.2f", 100.0 * t->counter[i]/t->tsc);
701 }
702 }
703
704
614 if (do_dts)
705 if (do_dts)
615 outp += sprintf(outp, "%8d", c->core_temp_c);
706 outp += sprintf(outp, "\t%d", c->core_temp_c);
616
707
708 for (i = 0, mp = sys.cp; mp; i++, mp = mp->next) {
709 if (mp->format == FORMAT_RAW) {
710 if (mp->width == 32)
711 outp += sprintf(outp, "\t0x%08lx", (unsigned long) c->counter[i]);
712 else
713 outp += sprintf(outp, "\t0x%016llx", c->counter[i]);
714 } else if (mp->format == FORMAT_DELTA) {
715 outp += sprintf(outp, "\t%8lld", c->counter[i]);
716 } else if (mp->format == FORMAT_PERCENT) {
717 outp += sprintf(outp, "\t%.2f", 100.0 * c->counter[i]/t->tsc);
718 }
719 }
720
617 /* print per-package data only for 1st core in package */
618 if (!(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
619 goto done;
620
621 /* PkgTmp */
622 if (do_ptm)
721 /* print per-package data only for 1st core in package */
722 if (!(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
723 goto done;
724
725 /* PkgTmp */
726 if (do_ptm)
623 outp += sprintf(outp, "%8d", p->pkg_temp_c);
727 outp += sprintf(outp, "\t%d", p->pkg_temp_c);
624
625 /* GFXrc6 */
626 if (do_gfx_rc6_ms) {
728
729 /* GFXrc6 */
730 if (do_gfx_rc6_ms) {
627 if (p->gfx_rc6_ms == -1) { /* detect counter reset */
628 outp += sprintf(outp, " ***.**");
731 if (p->gfx_rc6_ms == -1) { /* detect GFX counter reset */
732 outp += sprintf(outp, "\t**.**");
629 } else {
733 } else {
630 outp += sprintf(outp, "%8.2f",
734 outp += sprintf(outp, "\t%.2f",
631 p->gfx_rc6_ms / 10.0 / interval_float);
632 }
633 }
634
635 /* GFXMHz */
636 if (do_gfx_mhz)
735 p->gfx_rc6_ms / 10.0 / interval_float);
736 }
737 }
738
739 /* GFXMHz */
740 if (do_gfx_mhz)
637 outp += sprintf(outp, "%8d", p->gfx_mhz);
741 outp += sprintf(outp, "\t%d", p->gfx_mhz);
638
639 /* Totl%C0, Any%C0 GFX%C0 CPUGFX% */
640 if (do_skl_residency) {
742
743 /* Totl%C0, Any%C0 GFX%C0 CPUGFX% */
744 if (do_skl_residency) {
641 outp += sprintf(outp, "%8.2f", 100.0 * p->pkg_wtd_core_c0/t->tsc);
642 outp += sprintf(outp, "%8.2f", 100.0 * p->pkg_any_core_c0/t->tsc);
643 outp += sprintf(outp, "%8.2f", 100.0 * p->pkg_any_gfxe_c0/t->tsc);
644 outp += sprintf(outp, "%8.2f", 100.0 * p->pkg_both_core_gfxe_c0/t->tsc);
745 outp += sprintf(outp, "\t%.2f", 100.0 * p->pkg_wtd_core_c0/t->tsc);
746 outp += sprintf(outp, "\t%.2f", 100.0 * p->pkg_any_core_c0/t->tsc);
747 outp += sprintf(outp, "\t%.2f", 100.0 * p->pkg_any_gfxe_c0/t->tsc);
748 outp += sprintf(outp, "\t%.2f", 100.0 * p->pkg_both_core_gfxe_c0/t->tsc);
645 }
646
647 if (do_pc2)
749 }
750
751 if (do_pc2)
648 outp += sprintf(outp, "%8.2f", 100.0 * p->pc2/t->tsc);
752 outp += sprintf(outp, "\t%.2f", 100.0 * p->pc2/t->tsc);
649 if (do_pc3)
753 if (do_pc3)
650 outp += sprintf(outp, "%8.2f", 100.0 * p->pc3/t->tsc);
754 outp += sprintf(outp, "\t%.2f", 100.0 * p->pc3/t->tsc);
651 if (do_pc6)
755 if (do_pc6)
652 outp += sprintf(outp, "%8.2f", 100.0 * p->pc6/t->tsc);
756 outp += sprintf(outp, "\t%.2f", 100.0 * p->pc6/t->tsc);
653 if (do_pc7)
757 if (do_pc7)
654 outp += sprintf(outp, "%8.2f", 100.0 * p->pc7/t->tsc);
758 outp += sprintf(outp, "\t%.2f", 100.0 * p->pc7/t->tsc);
655 if (do_c8_c9_c10) {
759 if (do_c8_c9_c10) {
656 outp += sprintf(outp, "%8.2f", 100.0 * p->pc8/t->tsc);
657 outp += sprintf(outp, "%8.2f", 100.0 * p->pc9/t->tsc);
658 outp += sprintf(outp, "%8.2f", 100.0 * p->pc10/t->tsc);
760 outp += sprintf(outp, "\t%.2f", 100.0 * p->pc8/t->tsc);
761 outp += sprintf(outp, "\t%.2f", 100.0 * p->pc9/t->tsc);
762 outp += sprintf(outp, "\t%.2f", 100.0 * p->pc10/t->tsc);
659 }
660
661 /*
662 * If measurement interval exceeds minimum RAPL Joule Counter range,
663 * indicate that results are suspect by printing "**" in fraction place.
664 */
665 if (interval_float < rapl_joule_counter_range)
763 }
764
765 /*
766 * If measurement interval exceeds minimum RAPL Joule Counter range,
767 * indicate that results are suspect by printing "**" in fraction place.
768 */
769 if (interval_float < rapl_joule_counter_range)
666 fmt8 = "%8.2f";
770 fmt8 = "\t%.2f";
667 else
771 else
668 fmt8 = " %6.0f**";
772 fmt8 = "%6.0f**";
669
670 if (do_rapl && !rapl_joules) {
671 if (do_rapl & RAPL_PKG)
672 outp += sprintf(outp, fmt8, p->energy_pkg * rapl_energy_units / interval_float);
773
774 if (do_rapl && !rapl_joules) {
775 if (do_rapl & RAPL_PKG)
776 outp += sprintf(outp, fmt8, p->energy_pkg * rapl_energy_units / interval_float);
673 if (do_rapl & RAPL_CORES)
777 if (do_rapl & RAPL_CORES_ENERGY_STATUS)
674 outp += sprintf(outp, fmt8, p->energy_cores * rapl_energy_units / interval_float);
675 if (do_rapl & RAPL_GFX)
676 outp += sprintf(outp, fmt8, p->energy_gfx * rapl_energy_units / interval_float);
677 if (do_rapl & RAPL_DRAM)
678 outp += sprintf(outp, fmt8, p->energy_dram * rapl_dram_energy_units / interval_float);
679 if (do_rapl & RAPL_PKG_PERF_STATUS)
680 outp += sprintf(outp, fmt8, 100.0 * p->rapl_pkg_perf_status * rapl_time_units / interval_float);
681 if (do_rapl & RAPL_DRAM_PERF_STATUS)

--- 10 unchanged lines hidden (view full) ---

692 p->energy_gfx * rapl_energy_units);
693 if (do_rapl & RAPL_DRAM)
694 outp += sprintf(outp, fmt8,
695 p->energy_dram * rapl_dram_energy_units);
696 if (do_rapl & RAPL_PKG_PERF_STATUS)
697 outp += sprintf(outp, fmt8, 100.0 * p->rapl_pkg_perf_status * rapl_time_units / interval_float);
698 if (do_rapl & RAPL_DRAM_PERF_STATUS)
699 outp += sprintf(outp, fmt8, 100.0 * p->rapl_dram_perf_status * rapl_time_units / interval_float);
778 outp += sprintf(outp, fmt8, p->energy_cores * rapl_energy_units / interval_float);
779 if (do_rapl & RAPL_GFX)
780 outp += sprintf(outp, fmt8, p->energy_gfx * rapl_energy_units / interval_float);
781 if (do_rapl & RAPL_DRAM)
782 outp += sprintf(outp, fmt8, p->energy_dram * rapl_dram_energy_units / interval_float);
783 if (do_rapl & RAPL_PKG_PERF_STATUS)
784 outp += sprintf(outp, fmt8, 100.0 * p->rapl_pkg_perf_status * rapl_time_units / interval_float);
785 if (do_rapl & RAPL_DRAM_PERF_STATUS)

--- 10 unchanged lines hidden (view full) ---

796 p->energy_gfx * rapl_energy_units);
797 if (do_rapl & RAPL_DRAM)
798 outp += sprintf(outp, fmt8,
799 p->energy_dram * rapl_dram_energy_units);
800 if (do_rapl & RAPL_PKG_PERF_STATUS)
801 outp += sprintf(outp, fmt8, 100.0 * p->rapl_pkg_perf_status * rapl_time_units / interval_float);
802 if (do_rapl & RAPL_DRAM_PERF_STATUS)
803 outp += sprintf(outp, fmt8, 100.0 * p->rapl_dram_perf_status * rapl_time_units / interval_float);
700
701 outp += sprintf(outp, fmt8, interval_float);
702 }
804 }
805 for (i = 0, mp = sys.pp; mp; i++, mp = mp->next) {
806 if (mp->format == FORMAT_RAW) {
807 if (mp->width == 32)
808 outp += sprintf(outp, "\t0x%08lx", (unsigned long) p->counter[i]);
809 else
810 outp += sprintf(outp, "\t0x%016llx", p->counter[i]);
811 } else if (mp->format == FORMAT_DELTA) {
812 outp += sprintf(outp, "\t%8lld", p->counter[i]);
813 } else if (mp->format == FORMAT_PERCENT) {
814 outp += sprintf(outp, "\t%.2f", 100.0 * p->counter[i]/t->tsc);
815 }
816 }
817
703done:
704 outp += sprintf(outp, "\n");
705
706 return 0;
707}
708
709void flush_output_stdout(void)
710{

--- 36 unchanged lines hidden (view full) ---

747
748#define DELTA_WRAP32(new, old) \
749 if (new > old) { \
750 old = new - old; \
751 } else { \
752 old = 0x100000000 + new - old; \
753 }
754
818done:
819 outp += sprintf(outp, "\n");
820
821 return 0;
822}
823
824void flush_output_stdout(void)
825{

--- 36 unchanged lines hidden (view full) ---

862
863#define DELTA_WRAP32(new, old) \
864 if (new > old) { \
865 old = new - old; \
866 } else { \
867 old = 0x100000000 + new - old; \
868 }
869
755void
870int
756delta_package(struct pkg_data *new, struct pkg_data *old)
757{
871delta_package(struct pkg_data *new, struct pkg_data *old)
872{
873 int i;
874 struct msr_counter *mp;
758
759 if (do_skl_residency) {
760 old->pkg_wtd_core_c0 = new->pkg_wtd_core_c0 - old->pkg_wtd_core_c0;
761 old->pkg_any_core_c0 = new->pkg_any_core_c0 - old->pkg_any_core_c0;
762 old->pkg_any_gfxe_c0 = new->pkg_any_gfxe_c0 - old->pkg_any_gfxe_c0;
763 old->pkg_both_core_gfxe_c0 = new->pkg_both_core_gfxe_c0 - old->pkg_both_core_gfxe_c0;
764 }
765 old->pc2 = new->pc2 - old->pc2;

--- 17 unchanged lines hidden (view full) ---

783 old->gfx_mhz = new->gfx_mhz;
784
785 DELTA_WRAP32(new->energy_pkg, old->energy_pkg);
786 DELTA_WRAP32(new->energy_cores, old->energy_cores);
787 DELTA_WRAP32(new->energy_gfx, old->energy_gfx);
788 DELTA_WRAP32(new->energy_dram, old->energy_dram);
789 DELTA_WRAP32(new->rapl_pkg_perf_status, old->rapl_pkg_perf_status);
790 DELTA_WRAP32(new->rapl_dram_perf_status, old->rapl_dram_perf_status);
875
876 if (do_skl_residency) {
877 old->pkg_wtd_core_c0 = new->pkg_wtd_core_c0 - old->pkg_wtd_core_c0;
878 old->pkg_any_core_c0 = new->pkg_any_core_c0 - old->pkg_any_core_c0;
879 old->pkg_any_gfxe_c0 = new->pkg_any_gfxe_c0 - old->pkg_any_gfxe_c0;
880 old->pkg_both_core_gfxe_c0 = new->pkg_both_core_gfxe_c0 - old->pkg_both_core_gfxe_c0;
881 }
882 old->pc2 = new->pc2 - old->pc2;

--- 17 unchanged lines hidden (view full) ---

900 old->gfx_mhz = new->gfx_mhz;
901
902 DELTA_WRAP32(new->energy_pkg, old->energy_pkg);
903 DELTA_WRAP32(new->energy_cores, old->energy_cores);
904 DELTA_WRAP32(new->energy_gfx, old->energy_gfx);
905 DELTA_WRAP32(new->energy_dram, old->energy_dram);
906 DELTA_WRAP32(new->rapl_pkg_perf_status, old->rapl_pkg_perf_status);
907 DELTA_WRAP32(new->rapl_dram_perf_status, old->rapl_dram_perf_status);
908
909 for (i = 0, mp = sys.pp; mp; i++, mp = mp->next) {
910 if (mp->format == FORMAT_RAW)
911 old->counter[i] = new->counter[i];
912 else
913 old->counter[i] = new->counter[i] - old->counter[i];
914 }
915
916 return 0;
791}
792
793void
794delta_core(struct core_data *new, struct core_data *old)
795{
917}
918
919void
920delta_core(struct core_data *new, struct core_data *old)
921{
922 int i;
923 struct msr_counter *mp;
924
796 old->c3 = new->c3 - old->c3;
797 old->c6 = new->c6 - old->c6;
798 old->c7 = new->c7 - old->c7;
799 old->core_temp_c = new->core_temp_c;
925 old->c3 = new->c3 - old->c3;
926 old->c6 = new->c6 - old->c6;
927 old->c7 = new->c7 - old->c7;
928 old->core_temp_c = new->core_temp_c;
929
930 for (i = 0, mp = sys.cp; mp; i++, mp = mp->next) {
931 if (mp->format == FORMAT_RAW)
932 old->counter[i] = new->counter[i];
933 else
934 old->counter[i] = new->counter[i] - old->counter[i];
935 }
800}
801
802/*
803 * old = new - old
804 */
936}
937
938/*
939 * old = new - old
940 */
805void
941int
806delta_thread(struct thread_data *new, struct thread_data *old,
807 struct core_data *core_delta)
808{
942delta_thread(struct thread_data *new, struct thread_data *old,
943 struct core_data *core_delta)
944{
945 int i;
946 struct msr_counter *mp;
947
809 old->tsc = new->tsc - old->tsc;
810
811 /* check for TSC < 1 Mcycles over interval */
812 if (old->tsc < (1000 * 1000))
813 errx(-3, "Insanely slow TSC rate, TSC stops in idle?\n"
814 "You can disable all c-states by booting with \"idle=poll\"\n"
815 "or just the deep ones with \"processor.max_cstate=1\"");
816
817 old->c1 = new->c1 - old->c1;
818
819 if (has_aperf) {
820 if ((new->aperf > old->aperf) && (new->mperf > old->mperf)) {
821 old->aperf = new->aperf - old->aperf;
822 old->mperf = new->mperf - old->mperf;
823 } else {
948 old->tsc = new->tsc - old->tsc;
949
950 /* check for TSC < 1 Mcycles over interval */
951 if (old->tsc < (1000 * 1000))
952 errx(-3, "Insanely slow TSC rate, TSC stops in idle?\n"
953 "You can disable all c-states by booting with \"idle=poll\"\n"
954 "or just the deep ones with \"processor.max_cstate=1\"");
955
956 old->c1 = new->c1 - old->c1;
957
958 if (has_aperf) {
959 if ((new->aperf > old->aperf) && (new->mperf > old->mperf)) {
960 old->aperf = new->aperf - old->aperf;
961 old->mperf = new->mperf - old->mperf;
962 } else {
824
825 if (!aperf_mperf_unstable) {
826 fprintf(outf, "%s: APERF or MPERF went backwards *\n", progname);
827 fprintf(outf, "* Frequency results do not cover entire interval *\n");
828 fprintf(outf, "* fix this by running Linux-2.6.30 or later *\n");
829
830 aperf_mperf_unstable = 1;
831 }
832 /*
833 * mperf delta is likely a huge "positive" number
834 * can not use it for calculating c0 time
835 */
836 skip_c0 = 1;
837 skip_c1 = 1;
963 return -1;
838 }
839 }
840
841
842 if (use_c1_residency_msr) {
843 /*
844 * Some models have a dedicated C1 residency MSR,
845 * which should be more accurate than the derivation below.

--- 30 unchanged lines hidden (view full) ---

876 old->extra_msr32 = new->extra_msr32;
877 old->extra_msr64 = new->extra_msr64;
878
879 if (do_irq)
880 old->irq_count = new->irq_count - old->irq_count;
881
882 if (do_smi)
883 old->smi_count = new->smi_count - old->smi_count;
964 }
965 }
966
967
968 if (use_c1_residency_msr) {
969 /*
970 * Some models have a dedicated C1 residency MSR,
971 * which should be more accurate than the derivation below.

--- 30 unchanged lines hidden (view full) ---

1002 old->extra_msr32 = new->extra_msr32;
1003 old->extra_msr64 = new->extra_msr64;
1004
1005 if (do_irq)
1006 old->irq_count = new->irq_count - old->irq_count;
1007
1008 if (do_smi)
1009 old->smi_count = new->smi_count - old->smi_count;
1010
1011 for (i = 0, mp = sys.tp; mp; i++, mp = mp->next) {
1012 if (mp->format == FORMAT_RAW)
1013 old->counter[i] = new->counter[i];
1014 else
1015 old->counter[i] = new->counter[i] - old->counter[i];
1016 }
1017 return 0;
884}
885
886int delta_cpu(struct thread_data *t, struct core_data *c,
887 struct pkg_data *p, struct thread_data *t2,
888 struct core_data *c2, struct pkg_data *p2)
889{
1018}
1019
1020int delta_cpu(struct thread_data *t, struct core_data *c,
1021 struct pkg_data *p, struct thread_data *t2,
1022 struct core_data *c2, struct pkg_data *p2)
1023{
1024 int retval = 0;
1025
890 /* calculate core delta only for 1st thread in core */
891 if (t->flags & CPU_IS_FIRST_THREAD_IN_CORE)
892 delta_core(c, c2);
893
894 /* always calculate thread delta */
1026 /* calculate core delta only for 1st thread in core */
1027 if (t->flags & CPU_IS_FIRST_THREAD_IN_CORE)
1028 delta_core(c, c2);
1029
1030 /* always calculate thread delta */
895 delta_thread(t, t2, c2); /* c2 is core delta */
1031 retval = delta_thread(t, t2, c2); /* c2 is core delta */
1032 if (retval)
1033 return retval;
896
897 /* calculate package delta only for 1st core in package */
898 if (t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE)
1034
1035 /* calculate package delta only for 1st core in package */
1036 if (t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE)
899 delta_package(p, p2);
1037 retval = delta_package(p, p2);
900
1038
901 return 0;
1039 return retval;
902}
903
904void clear_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p)
905{
1040}
1041
1042void clear_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p)
1043{
1044 int i;
1045 struct msr_counter *mp;
1046
906 t->tsc = 0;
907 t->aperf = 0;
908 t->mperf = 0;
909 t->c1 = 0;
910
911 t->extra_delta32 = 0;
912 t->extra_delta64 = 0;
913

--- 29 unchanged lines hidden (view full) ---

943 p->energy_cores = 0;
944 p->energy_gfx = 0;
945 p->rapl_pkg_perf_status = 0;
946 p->rapl_dram_perf_status = 0;
947 p->pkg_temp_c = 0;
948
949 p->gfx_rc6_ms = 0;
950 p->gfx_mhz = 0;
1047 t->tsc = 0;
1048 t->aperf = 0;
1049 t->mperf = 0;
1050 t->c1 = 0;
1051
1052 t->extra_delta32 = 0;
1053 t->extra_delta64 = 0;
1054

--- 29 unchanged lines hidden (view full) ---

1084 p->energy_cores = 0;
1085 p->energy_gfx = 0;
1086 p->rapl_pkg_perf_status = 0;
1087 p->rapl_dram_perf_status = 0;
1088 p->pkg_temp_c = 0;
1089
1090 p->gfx_rc6_ms = 0;
1091 p->gfx_mhz = 0;
1092
1093 for (i = 0, mp = sys.tp; mp; i++, mp = mp->next)
1094 t->counter[i] = 0;
1095
1096 for (i = 0, mp = sys.cp; mp; i++, mp = mp->next)
1097 c->counter[i] = 0;
1098
1099 for (i = 0, mp = sys.pp; mp; i++, mp = mp->next)
1100 p->counter[i] = 0;
951}
952int sum_counters(struct thread_data *t, struct core_data *c,
953 struct pkg_data *p)
954{
1101}
1102int sum_counters(struct thread_data *t, struct core_data *c,
1103 struct pkg_data *p)
1104{
1105 int i;
1106 struct msr_counter *mp;
1107
955 average.threads.tsc += t->tsc;
956 average.threads.aperf += t->aperf;
957 average.threads.mperf += t->mperf;
958 average.threads.c1 += t->c1;
959
960 average.threads.extra_delta32 += t->extra_delta32;
961 average.threads.extra_delta64 += t->extra_delta64;
962
963 average.threads.irq_count += t->irq_count;
964 average.threads.smi_count += t->smi_count;
965
1108 average.threads.tsc += t->tsc;
1109 average.threads.aperf += t->aperf;
1110 average.threads.mperf += t->mperf;
1111 average.threads.c1 += t->c1;
1112
1113 average.threads.extra_delta32 += t->extra_delta32;
1114 average.threads.extra_delta64 += t->extra_delta64;
1115
1116 average.threads.irq_count += t->irq_count;
1117 average.threads.smi_count += t->smi_count;
1118
1119 for (i = 0, mp = sys.tp; mp; i++, mp = mp->next) {
1120 if (mp->format == FORMAT_RAW)
1121 continue;
1122 average.threads.counter[i] += t->counter[i];
1123 }
1124
966 /* sum per-core values only for 1st thread in core */
967 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
968 return 0;
969
970 average.cores.c3 += c->c3;
971 average.cores.c6 += c->c6;
972 average.cores.c7 += c->c7;
973
974 average.cores.core_temp_c = MAX(average.cores.core_temp_c, c->core_temp_c);
975
1125 /* sum per-core values only for 1st thread in core */
1126 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
1127 return 0;
1128
1129 average.cores.c3 += c->c3;
1130 average.cores.c6 += c->c6;
1131 average.cores.c7 += c->c7;
1132
1133 average.cores.core_temp_c = MAX(average.cores.core_temp_c, c->core_temp_c);
1134
1135 for (i = 0, mp = sys.cp; mp; i++, mp = mp->next) {
1136 if (mp->format == FORMAT_RAW)
1137 continue;
1138 average.cores.counter[i] += c->counter[i];
1139 }
1140
976 /* sum per-pkg values only for 1st core in pkg */
977 if (!(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
978 return 0;
979
980 if (do_skl_residency) {
981 average.packages.pkg_wtd_core_c0 += p->pkg_wtd_core_c0;
982 average.packages.pkg_any_core_c0 += p->pkg_any_core_c0;
983 average.packages.pkg_any_gfxe_c0 += p->pkg_any_gfxe_c0;

--- 18 unchanged lines hidden (view full) ---

1002
1003 average.packages.gfx_rc6_ms = p->gfx_rc6_ms;
1004 average.packages.gfx_mhz = p->gfx_mhz;
1005
1006 average.packages.pkg_temp_c = MAX(average.packages.pkg_temp_c, p->pkg_temp_c);
1007
1008 average.packages.rapl_pkg_perf_status += p->rapl_pkg_perf_status;
1009 average.packages.rapl_dram_perf_status += p->rapl_dram_perf_status;
1141 /* sum per-pkg values only for 1st core in pkg */
1142 if (!(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
1143 return 0;
1144
1145 if (do_skl_residency) {
1146 average.packages.pkg_wtd_core_c0 += p->pkg_wtd_core_c0;
1147 average.packages.pkg_any_core_c0 += p->pkg_any_core_c0;
1148 average.packages.pkg_any_gfxe_c0 += p->pkg_any_gfxe_c0;

--- 18 unchanged lines hidden (view full) ---

1167
1168 average.packages.gfx_rc6_ms = p->gfx_rc6_ms;
1169 average.packages.gfx_mhz = p->gfx_mhz;
1170
1171 average.packages.pkg_temp_c = MAX(average.packages.pkg_temp_c, p->pkg_temp_c);
1172
1173 average.packages.rapl_pkg_perf_status += p->rapl_pkg_perf_status;
1174 average.packages.rapl_dram_perf_status += p->rapl_dram_perf_status;
1175
1176 for (i = 0, mp = sys.pp; mp; i++, mp = mp->next) {
1177 if (mp->format == FORMAT_RAW)
1178 continue;
1179 average.packages.counter[i] += p->counter[i];
1180 }
1010 return 0;
1011}
1012/*
1013 * sum the counters for all cpus in the system
1014 * compute the weighted average
1015 */
1016void compute_average(struct thread_data *t, struct core_data *c,
1017 struct pkg_data *p)
1018{
1181 return 0;
1182}
1183/*
1184 * sum the counters for all cpus in the system
1185 * compute the weighted average
1186 */
1187void compute_average(struct thread_data *t, struct core_data *c,
1188 struct pkg_data *p)
1189{
1190 int i;
1191 struct msr_counter *mp;
1192
1019 clear_counters(&average.threads, &average.cores, &average.packages);
1020
1021 for_all_cpus(sum_counters, t, c, p);
1022
1023 average.threads.tsc /= topo.num_cpus;
1024 average.threads.aperf /= topo.num_cpus;
1025 average.threads.mperf /= topo.num_cpus;
1026 average.threads.c1 /= topo.num_cpus;

--- 20 unchanged lines hidden (view full) ---

1047 if (do_pc6)
1048 average.packages.pc6 /= topo.num_packages;
1049 if (do_pc7)
1050 average.packages.pc7 /= topo.num_packages;
1051
1052 average.packages.pc8 /= topo.num_packages;
1053 average.packages.pc9 /= topo.num_packages;
1054 average.packages.pc10 /= topo.num_packages;
1193 clear_counters(&average.threads, &average.cores, &average.packages);
1194
1195 for_all_cpus(sum_counters, t, c, p);
1196
1197 average.threads.tsc /= topo.num_cpus;
1198 average.threads.aperf /= topo.num_cpus;
1199 average.threads.mperf /= topo.num_cpus;
1200 average.threads.c1 /= topo.num_cpus;

--- 20 unchanged lines hidden (view full) ---

1221 if (do_pc6)
1222 average.packages.pc6 /= topo.num_packages;
1223 if (do_pc7)
1224 average.packages.pc7 /= topo.num_packages;
1225
1226 average.packages.pc8 /= topo.num_packages;
1227 average.packages.pc9 /= topo.num_packages;
1228 average.packages.pc10 /= topo.num_packages;
1229
1230 for (i = 0, mp = sys.tp; mp; i++, mp = mp->next) {
1231 if (mp->format == FORMAT_RAW)
1232 continue;
1233 average.threads.counter[i] /= topo.num_cpus;
1234 }
1235 for (i = 0, mp = sys.cp; mp; i++, mp = mp->next) {
1236 if (mp->format == FORMAT_RAW)
1237 continue;
1238 average.cores.counter[i] /= topo.num_cores;
1239 }
1240 for (i = 0, mp = sys.pp; mp; i++, mp = mp->next) {
1241 if (mp->format == FORMAT_RAW)
1242 continue;
1243 average.packages.counter[i] /= topo.num_packages;
1244 }
1055}
1056
1057static unsigned long long rdtsc(void)
1058{
1059 unsigned int low, high;
1060
1061 asm volatile("rdtsc" : "=a" (low), "=d" (high));
1062

--- 5 unchanged lines hidden (view full) ---

1068 * migrate to cpu
1069 * acquire and record local counters for that cpu
1070 */
1071int get_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p)
1072{
1073 int cpu = t->cpu_id;
1074 unsigned long long msr;
1075 int aperf_mperf_retry_count = 0;
1245}
1246
1247static unsigned long long rdtsc(void)
1248{
1249 unsigned int low, high;
1250
1251 asm volatile("rdtsc" : "=a" (low), "=d" (high));
1252

--- 5 unchanged lines hidden (view full) ---

1258 * migrate to cpu
1259 * acquire and record local counters for that cpu
1260 */
1261int get_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p)
1262{
1263 int cpu = t->cpu_id;
1264 unsigned long long msr;
1265 int aperf_mperf_retry_count = 0;
1266 struct msr_counter *mp;
1267 int i;
1076
1077 if (cpu_migrate(cpu)) {
1078 fprintf(outf, "Could not migrate to CPU %d\n", cpu);
1079 return -1;
1080 }
1081
1082retry:
1083 t->tsc = rdtsc(); /* we are running on local CPU of interest */

--- 81 unchanged lines hidden (view full) ---

1165 if (get_msr(cpu, extra_msr_offset64, &t->extra_msr64))
1166 return -5;
1167
1168 if (use_c1_residency_msr) {
1169 if (get_msr(cpu, MSR_CORE_C1_RES, &t->c1))
1170 return -6;
1171 }
1172
1268
1269 if (cpu_migrate(cpu)) {
1270 fprintf(outf, "Could not migrate to CPU %d\n", cpu);
1271 return -1;
1272 }
1273
1274retry:
1275 t->tsc = rdtsc(); /* we are running on local CPU of interest */

--- 81 unchanged lines hidden (view full) ---

1357 if (get_msr(cpu, extra_msr_offset64, &t->extra_msr64))
1358 return -5;
1359
1360 if (use_c1_residency_msr) {
1361 if (get_msr(cpu, MSR_CORE_C1_RES, &t->c1))
1362 return -6;
1363 }
1364
1365 for (i = 0, mp = sys.tp; mp; i++, mp = mp->next) {
1366 if (get_msr(cpu, mp->msr_num, &t->counter[i]))
1367 return -10;
1368 }
1369
1370
1173 /* collect core counters only for 1st thread in core */
1174 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
1175 return 0;
1176
1177 if (do_nhm_cstates && !do_slm_cstates && !do_knl_cstates) {
1178 if (get_msr(cpu, MSR_CORE_C3_RESIDENCY, &c->c3))
1179 return -6;
1180 }

--- 11 unchanged lines hidden (view full) ---

1192 return -8;
1193
1194 if (do_dts) {
1195 if (get_msr(cpu, MSR_IA32_THERM_STATUS, &msr))
1196 return -9;
1197 c->core_temp_c = tcc_activation_temp - ((msr >> 16) & 0x7F);
1198 }
1199
1371 /* collect core counters only for 1st thread in core */
1372 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
1373 return 0;
1374
1375 if (do_nhm_cstates && !do_slm_cstates && !do_knl_cstates) {
1376 if (get_msr(cpu, MSR_CORE_C3_RESIDENCY, &c->c3))
1377 return -6;
1378 }

--- 11 unchanged lines hidden (view full) ---

1390 return -8;
1391
1392 if (do_dts) {
1393 if (get_msr(cpu, MSR_IA32_THERM_STATUS, &msr))
1394 return -9;
1395 c->core_temp_c = tcc_activation_temp - ((msr >> 16) & 0x7F);
1396 }
1397
1398 for (i = 0, mp = sys.cp; mp; i++, mp = mp->next) {
1399 if (get_msr(cpu, mp->msr_num, &c->counter[i]))
1400 return -10;
1401 }
1200
1201 /* collect package counters only for 1st core in package */
1202 if (!(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
1203 return 0;
1204
1205 if (do_skl_residency) {
1206 if (get_msr(cpu, MSR_PKG_WEIGHTED_CORE_C0_RES, &p->pkg_wtd_core_c0))
1207 return -10;

--- 24 unchanged lines hidden (view full) ---

1232 if (get_msr(cpu, MSR_PKG_C10_RESIDENCY, &p->pc10))
1233 return -13;
1234 }
1235 if (do_rapl & RAPL_PKG) {
1236 if (get_msr(cpu, MSR_PKG_ENERGY_STATUS, &msr))
1237 return -13;
1238 p->energy_pkg = msr & 0xFFFFFFFF;
1239 }
1402
1403 /* collect package counters only for 1st core in package */
1404 if (!(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
1405 return 0;
1406
1407 if (do_skl_residency) {
1408 if (get_msr(cpu, MSR_PKG_WEIGHTED_CORE_C0_RES, &p->pkg_wtd_core_c0))
1409 return -10;

--- 24 unchanged lines hidden (view full) ---

1434 if (get_msr(cpu, MSR_PKG_C10_RESIDENCY, &p->pc10))
1435 return -13;
1436 }
1437 if (do_rapl & RAPL_PKG) {
1438 if (get_msr(cpu, MSR_PKG_ENERGY_STATUS, &msr))
1439 return -13;
1440 p->energy_pkg = msr & 0xFFFFFFFF;
1441 }
1240 if (do_rapl & RAPL_CORES) {
1442 if (do_rapl & RAPL_CORES_ENERGY_STATUS) {
1241 if (get_msr(cpu, MSR_PP0_ENERGY_STATUS, &msr))
1242 return -14;
1243 p->energy_cores = msr & 0xFFFFFFFF;
1244 }
1245 if (do_rapl & RAPL_DRAM) {
1246 if (get_msr(cpu, MSR_DRAM_ENERGY_STATUS, &msr))
1247 return -15;
1248 p->energy_dram = msr & 0xFFFFFFFF;

--- 20 unchanged lines hidden (view full) ---

1269 }
1270
1271 if (do_gfx_rc6_ms)
1272 p->gfx_rc6_ms = gfx_cur_rc6_ms;
1273
1274 if (do_gfx_mhz)
1275 p->gfx_mhz = gfx_cur_mhz;
1276
1443 if (get_msr(cpu, MSR_PP0_ENERGY_STATUS, &msr))
1444 return -14;
1445 p->energy_cores = msr & 0xFFFFFFFF;
1446 }
1447 if (do_rapl & RAPL_DRAM) {
1448 if (get_msr(cpu, MSR_DRAM_ENERGY_STATUS, &msr))
1449 return -15;
1450 p->energy_dram = msr & 0xFFFFFFFF;

--- 20 unchanged lines hidden (view full) ---

1471 }
1472
1473 if (do_gfx_rc6_ms)
1474 p->gfx_rc6_ms = gfx_cur_rc6_ms;
1475
1476 if (do_gfx_mhz)
1477 p->gfx_mhz = gfx_cur_mhz;
1478
1479 for (i = 0, mp = sys.pp; mp; i++, mp = mp->next) {
1480 if (get_msr(cpu, mp->msr_num, &p->counter[i]))
1481 return -10;
1482 }
1483
1277 return 0;
1278}
1279
1280/*
1281 * MSR_PKG_CST_CONFIG_CONTROL decoding for pkg_cstate_limit:
1282 * If you change the values, note they are used both in comparisons
1283 * (>= PCL__7) and to index pkg_cstate_limit_strings[].
1284 */

--- 20 unchanged lines hidden (view full) ---

1305
1306int nhm_pkg_cstate_limits[16] = {PCL__0, PCL__1, PCL__3, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
1307int snb_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL_6N, PCL_6R, PCL__7, PCL_7S, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
1308int hsw_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL__3, PCL__6, PCL__7, PCL_7S, PCL__8, PCL__9, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
1309int slv_pkg_cstate_limits[16] = {PCL__0, PCL__1, PCLRSV, PCLRSV, PCL__4, PCLRSV, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
1310int amt_pkg_cstate_limits[16] = {PCL__0, PCL__1, PCL__2, PCLRSV, PCLRSV, PCLRSV, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
1311int phi_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL_6N, PCL_6R, PCLRSV, PCLRSV, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
1312int bxt_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
1484 return 0;
1485}
1486
1487/*
1488 * MSR_PKG_CST_CONFIG_CONTROL decoding for pkg_cstate_limit:
1489 * If you change the values, note they are used both in comparisons
1490 * (>= PCL__7) and to index pkg_cstate_limit_strings[].
1491 */

--- 20 unchanged lines hidden (view full) ---

1512
1513int nhm_pkg_cstate_limits[16] = {PCL__0, PCL__1, PCL__3, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
1514int snb_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL_6N, PCL_6R, PCL__7, PCL_7S, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
1515int hsw_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL__3, PCL__6, PCL__7, PCL_7S, PCL__8, PCL__9, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
1516int slv_pkg_cstate_limits[16] = {PCL__0, PCL__1, PCLRSV, PCLRSV, PCL__4, PCLRSV, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
1517int amt_pkg_cstate_limits[16] = {PCL__0, PCL__1, PCL__2, PCLRSV, PCLRSV, PCLRSV, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
1518int phi_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL_6N, PCL_6R, PCLRSV, PCLRSV, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
1519int bxt_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
1520int skx_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL_6N, PCL_6R, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
1313
1314
1315static void
1316calculate_tsc_tweak()
1317{
1318 tsc_tweak = base_hz / tsc_hz;
1319}
1320

--- 312 unchanged lines hidden (view full) ---

1633 fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
1634 (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
1635
1636}
1637void free_fd_percpu(void)
1638{
1639 int i;
1640
1521
1522
1523static void
1524calculate_tsc_tweak()
1525{
1526 tsc_tweak = base_hz / tsc_hz;
1527}
1528

--- 312 unchanged lines hidden (view full) ---

1841 fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
1842 (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
1843
1844}
1845void free_fd_percpu(void)
1846{
1847 int i;
1848
1641 for (i = 0; i < topo.max_cpu_num; ++i) {
1849 for (i = 0; i < topo.max_cpu_num + 1; ++i) {
1642 if (fd_percpu[i] != 0)
1643 close(fd_percpu[i]);
1644 }
1645
1646 free(fd_percpu);
1647}
1648
1649void free_all_buffers(void)

--- 416 unchanged lines hidden (view full) ---

2066 if (retval < -1) {
2067 exit(retval);
2068 } else if (retval == -1) {
2069 re_initialize();
2070 goto restart;
2071 }
2072 gettimeofday(&tv_odd, (struct timezone *)NULL);
2073 timersub(&tv_odd, &tv_even, &tv_delta);
1850 if (fd_percpu[i] != 0)
1851 close(fd_percpu[i]);
1852 }
1853
1854 free(fd_percpu);
1855}
1856
1857void free_all_buffers(void)

--- 416 unchanged lines hidden (view full) ---

2274 if (retval < -1) {
2275 exit(retval);
2276 } else if (retval == -1) {
2277 re_initialize();
2278 goto restart;
2279 }
2280 gettimeofday(&tv_odd, (struct timezone *)NULL);
2281 timersub(&tv_odd, &tv_even, &tv_delta);
2074 for_all_cpus_2(delta_cpu, ODD_COUNTERS, EVEN_COUNTERS);
2282 if (for_all_cpus_2(delta_cpu, ODD_COUNTERS, EVEN_COUNTERS)) {
2283 re_initialize();
2284 goto restart;
2285 }
2075 compute_average(EVEN_COUNTERS);
2076 format_all_counters(EVEN_COUNTERS);
2077 flush_output_stdout();
2078 nanosleep(&interval_ts, NULL);
2079 if (snapshot_proc_sysfs_files())
2080 goto restart;
2081 retval = for_all_cpus(get_counters, EVEN_COUNTERS);
2082 if (retval < -1) {
2083 exit(retval);
2084 } else if (retval == -1) {
2085 re_initialize();
2086 goto restart;
2087 }
2088 gettimeofday(&tv_even, (struct timezone *)NULL);
2089 timersub(&tv_even, &tv_odd, &tv_delta);
2286 compute_average(EVEN_COUNTERS);
2287 format_all_counters(EVEN_COUNTERS);
2288 flush_output_stdout();
2289 nanosleep(&interval_ts, NULL);
2290 if (snapshot_proc_sysfs_files())
2291 goto restart;
2292 retval = for_all_cpus(get_counters, EVEN_COUNTERS);
2293 if (retval < -1) {
2294 exit(retval);
2295 } else if (retval == -1) {
2296 re_initialize();
2297 goto restart;
2298 }
2299 gettimeofday(&tv_even, (struct timezone *)NULL);
2300 timersub(&tv_even, &tv_odd, &tv_delta);
2090 for_all_cpus_2(delta_cpu, EVEN_COUNTERS, ODD_COUNTERS);
2301 if (for_all_cpus_2(delta_cpu, EVEN_COUNTERS, ODD_COUNTERS)) {
2302 re_initialize();
2303 goto restart;
2304 }
2091 compute_average(ODD_COUNTERS);
2092 format_all_counters(ODD_COUNTERS);
2093 flush_output_stdout();
2094 }
2095}
2096
2097void check_dev_msr()
2098{

--- 70 unchanged lines hidden (view full) ---

2169 return 0;
2170
2171 if (family != 6)
2172 return 0;
2173
2174 bclk = discover_bclk(family, model);
2175
2176 switch (model) {
2305 compute_average(ODD_COUNTERS);
2306 format_all_counters(ODD_COUNTERS);
2307 flush_output_stdout();
2308 }
2309}
2310
2311void check_dev_msr()
2312{

--- 70 unchanged lines hidden (view full) ---

2383 return 0;
2384
2385 if (family != 6)
2386 return 0;
2387
2388 bclk = discover_bclk(family, model);
2389
2390 switch (model) {
2177 case 0x1A: /* Core i7, Xeon 5500 series - Bloomfield, Gainstown NHM-EP */
2178 case 0x1E: /* Core i7 and i5 Processor - Clarksfield, Lynnfield, Jasper Forest */
2391 case INTEL_FAM6_NEHALEM_EP: /* Core i7, Xeon 5500 series - Bloomfield, Gainstown NHM-EP */
2392 case INTEL_FAM6_NEHALEM: /* Core i7 and i5 Processor - Clarksfield, Lynnfield, Jasper Forest */
2179 case 0x1F: /* Core i7 and i5 Processor - Nehalem */
2393 case 0x1F: /* Core i7 and i5 Processor - Nehalem */
2180 case 0x25: /* Westmere Client - Clarkdale, Arrandale */
2181 case 0x2C: /* Westmere EP - Gulftown */
2182 case 0x2E: /* Nehalem-EX Xeon - Beckton */
2183 case 0x2F: /* Westmere-EX Xeon - Eagleton */
2394 case INTEL_FAM6_WESTMERE: /* Westmere Client - Clarkdale, Arrandale */
2395 case INTEL_FAM6_WESTMERE_EP: /* Westmere EP - Gulftown */
2396 case INTEL_FAM6_NEHALEM_EX: /* Nehalem-EX Xeon - Beckton */
2397 case INTEL_FAM6_WESTMERE_EX: /* Westmere-EX Xeon - Eagleton */
2184 pkg_cstate_limits = nhm_pkg_cstate_limits;
2185 break;
2398 pkg_cstate_limits = nhm_pkg_cstate_limits;
2399 break;
2186 case 0x2A: /* SNB */
2187 case 0x2D: /* SNB Xeon */
2188 case 0x3A: /* IVB */
2189 case 0x3E: /* IVB Xeon */
2400 case INTEL_FAM6_SANDYBRIDGE: /* SNB */
2401 case INTEL_FAM6_SANDYBRIDGE_X: /* SNB Xeon */
2402 case INTEL_FAM6_IVYBRIDGE: /* IVB */
2403 case INTEL_FAM6_IVYBRIDGE_X: /* IVB Xeon */
2190 pkg_cstate_limits = snb_pkg_cstate_limits;
2191 break;
2404 pkg_cstate_limits = snb_pkg_cstate_limits;
2405 break;
2192 case 0x3C: /* HSW */
2193 case 0x3F: /* HSX */
2194 case 0x45: /* HSW */
2195 case 0x46: /* HSW */
2196 case 0x3D: /* BDW */
2197 case 0x47: /* BDW */
2198 case 0x4F: /* BDX */
2199 case 0x56: /* BDX-DE */
2200 case 0x4E: /* SKL */
2201 case 0x5E: /* SKL */
2202 case 0x8E: /* KBL */
2203 case 0x9E: /* KBL */
2204 case 0x55: /* SKX */
2406 case INTEL_FAM6_HASWELL_CORE: /* HSW */
2407 case INTEL_FAM6_HASWELL_X: /* HSX */
2408 case INTEL_FAM6_HASWELL_ULT: /* HSW */
2409 case INTEL_FAM6_HASWELL_GT3E: /* HSW */
2410 case INTEL_FAM6_BROADWELL_CORE: /* BDW */
2411 case INTEL_FAM6_BROADWELL_GT3E: /* BDW */
2412 case INTEL_FAM6_BROADWELL_X: /* BDX */
2413 case INTEL_FAM6_BROADWELL_XEON_D: /* BDX-DE */
2414 case INTEL_FAM6_SKYLAKE_MOBILE: /* SKL */
2415 case INTEL_FAM6_SKYLAKE_DESKTOP: /* SKL */
2416 case INTEL_FAM6_KABYLAKE_MOBILE: /* KBL */
2417 case INTEL_FAM6_KABYLAKE_DESKTOP: /* KBL */
2205 pkg_cstate_limits = hsw_pkg_cstate_limits;
2206 break;
2418 pkg_cstate_limits = hsw_pkg_cstate_limits;
2419 break;
2207 case 0x37: /* BYT */
2208 case 0x4D: /* AVN */
2420 case INTEL_FAM6_SKYLAKE_X: /* SKX */
2421 pkg_cstate_limits = skx_pkg_cstate_limits;
2422 break;
2423 case INTEL_FAM6_ATOM_SILVERMONT1: /* BYT */
2424 case INTEL_FAM6_ATOM_SILVERMONT2: /* AVN */
2209 pkg_cstate_limits = slv_pkg_cstate_limits;
2210 break;
2425 pkg_cstate_limits = slv_pkg_cstate_limits;
2426 break;
2211 case 0x4C: /* AMT */
2427 case INTEL_FAM6_ATOM_AIRMONT: /* AMT */
2212 pkg_cstate_limits = amt_pkg_cstate_limits;
2213 break;
2428 pkg_cstate_limits = amt_pkg_cstate_limits;
2429 break;
2214 case 0x57: /* PHI */
2430 case INTEL_FAM6_XEON_PHI_KNL: /* PHI */
2431 case INTEL_FAM6_XEON_PHI_KNM:
2215 pkg_cstate_limits = phi_pkg_cstate_limits;
2216 break;
2432 pkg_cstate_limits = phi_pkg_cstate_limits;
2433 break;
2217 case 0x5C: /* BXT */
2434 case INTEL_FAM6_ATOM_GOLDMONT: /* BXT */
2435 case INTEL_FAM6_ATOM_DENVERTON: /* DNV */
2218 pkg_cstate_limits = bxt_pkg_cstate_limits;
2219 break;
2220 default:
2221 return 0;
2222 }
2223 get_msr(base_cpu, MSR_NHM_SNB_PKG_CST_CFG_CTL, &msr);
2224 pkg_cstate_limit = pkg_cstate_limits[msr & 0xF];
2225
2226 get_msr(base_cpu, MSR_PLATFORM_INFO, &msr);
2227 base_ratio = (msr >> 8) & 0xFF;
2228
2229 base_hz = base_ratio * bclk * 1000000;
2230 has_base_hz = 1;
2231 return 1;
2232}
2233int has_nhm_turbo_ratio_limit(unsigned int family, unsigned int model)
2234{
2235 switch (model) {
2236 /* Nehalem compatible, but do not include turbo-ratio limit support */
2436 pkg_cstate_limits = bxt_pkg_cstate_limits;
2437 break;
2438 default:
2439 return 0;
2440 }
2441 get_msr(base_cpu, MSR_NHM_SNB_PKG_CST_CFG_CTL, &msr);
2442 pkg_cstate_limit = pkg_cstate_limits[msr & 0xF];
2443
2444 get_msr(base_cpu, MSR_PLATFORM_INFO, &msr);
2445 base_ratio = (msr >> 8) & 0xFF;
2446
2447 base_hz = base_ratio * bclk * 1000000;
2448 has_base_hz = 1;
2449 return 1;
2450}
2451int has_nhm_turbo_ratio_limit(unsigned int family, unsigned int model)
2452{
2453 switch (model) {
2454 /* Nehalem compatible, but do not include turbo-ratio limit support */
2237 case 0x2E: /* Nehalem-EX Xeon - Beckton */
2238 case 0x2F: /* Westmere-EX Xeon - Eagleton */
2239 case 0x57: /* PHI - Knights Landing (different MSR definition) */
2455 case INTEL_FAM6_NEHALEM_EX: /* Nehalem-EX Xeon - Beckton */
2456 case INTEL_FAM6_WESTMERE_EX: /* Westmere-EX Xeon - Eagleton */
2457 case INTEL_FAM6_XEON_PHI_KNL: /* PHI - Knights Landing (different MSR definition) */
2458 case INTEL_FAM6_XEON_PHI_KNM:
2240 return 0;
2241 default:
2242 return 1;
2243 }
2244}
2245int has_ivt_turbo_ratio_limit(unsigned int family, unsigned int model)
2246{
2247 if (!genuine_intel)
2248 return 0;
2249
2250 if (family != 6)
2251 return 0;
2252
2253 switch (model) {
2459 return 0;
2460 default:
2461 return 1;
2462 }
2463}
2464int has_ivt_turbo_ratio_limit(unsigned int family, unsigned int model)
2465{
2466 if (!genuine_intel)
2467 return 0;
2468
2469 if (family != 6)
2470 return 0;
2471
2472 switch (model) {
2254 case 0x3E: /* IVB Xeon */
2255 case 0x3F: /* HSW Xeon */
2473 case INTEL_FAM6_IVYBRIDGE_X: /* IVB Xeon */
2474 case INTEL_FAM6_HASWELL_X: /* HSW Xeon */
2256 return 1;
2257 default:
2258 return 0;
2259 }
2260}
2261int has_hsw_turbo_ratio_limit(unsigned int family, unsigned int model)
2262{
2263 if (!genuine_intel)
2264 return 0;
2265
2266 if (family != 6)
2267 return 0;
2268
2269 switch (model) {
2475 return 1;
2476 default:
2477 return 0;
2478 }
2479}
2480int has_hsw_turbo_ratio_limit(unsigned int family, unsigned int model)
2481{
2482 if (!genuine_intel)
2483 return 0;
2484
2485 if (family != 6)
2486 return 0;
2487
2488 switch (model) {
2270 case 0x3F: /* HSW Xeon */
2489 case INTEL_FAM6_HASWELL_X: /* HSW Xeon */
2271 return 1;
2272 default:
2273 return 0;
2274 }
2275}
2276
2277int has_knl_turbo_ratio_limit(unsigned int family, unsigned int model)
2278{
2279 if (!genuine_intel)
2280 return 0;
2281
2282 if (family != 6)
2283 return 0;
2284
2285 switch (model) {
2490 return 1;
2491 default:
2492 return 0;
2493 }
2494}
2495
2496int has_knl_turbo_ratio_limit(unsigned int family, unsigned int model)
2497{
2498 if (!genuine_intel)
2499 return 0;
2500
2501 if (family != 6)
2502 return 0;
2503
2504 switch (model) {
2286 case 0x57: /* Knights Landing */
2505 case INTEL_FAM6_XEON_PHI_KNL: /* Knights Landing */
2506 case INTEL_FAM6_XEON_PHI_KNM:
2287 return 1;
2288 default:
2289 return 0;
2290 }
2291}
2292int has_config_tdp(unsigned int family, unsigned int model)
2293{
2294 if (!genuine_intel)
2295 return 0;
2296
2297 if (family != 6)
2298 return 0;
2299
2300 switch (model) {
2507 return 1;
2508 default:
2509 return 0;
2510 }
2511}
2512int has_config_tdp(unsigned int family, unsigned int model)
2513{
2514 if (!genuine_intel)
2515 return 0;
2516
2517 if (family != 6)
2518 return 0;
2519
2520 switch (model) {
2301 case 0x3A: /* IVB */
2302 case 0x3C: /* HSW */
2303 case 0x3F: /* HSX */
2304 case 0x45: /* HSW */
2305 case 0x46: /* HSW */
2306 case 0x3D: /* BDW */
2307 case 0x47: /* BDW */
2308 case 0x4F: /* BDX */
2309 case 0x56: /* BDX-DE */
2310 case 0x4E: /* SKL */
2311 case 0x5E: /* SKL */
2312 case 0x8E: /* KBL */
2313 case 0x9E: /* KBL */
2314 case 0x55: /* SKX */
2521 case INTEL_FAM6_IVYBRIDGE: /* IVB */
2522 case INTEL_FAM6_HASWELL_CORE: /* HSW */
2523 case INTEL_FAM6_HASWELL_X: /* HSX */
2524 case INTEL_FAM6_HASWELL_ULT: /* HSW */
2525 case INTEL_FAM6_HASWELL_GT3E: /* HSW */
2526 case INTEL_FAM6_BROADWELL_CORE: /* BDW */
2527 case INTEL_FAM6_BROADWELL_GT3E: /* BDW */
2528 case INTEL_FAM6_BROADWELL_X: /* BDX */
2529 case INTEL_FAM6_BROADWELL_XEON_D: /* BDX-DE */
2530 case INTEL_FAM6_SKYLAKE_MOBILE: /* SKL */
2531 case INTEL_FAM6_SKYLAKE_DESKTOP: /* SKL */
2532 case INTEL_FAM6_KABYLAKE_MOBILE: /* KBL */
2533 case INTEL_FAM6_KABYLAKE_DESKTOP: /* KBL */
2534 case INTEL_FAM6_SKYLAKE_X: /* SKX */
2315
2535
2316 case 0x57: /* Knights Landing */
2536 case INTEL_FAM6_XEON_PHI_KNL: /* Knights Landing */
2537 case INTEL_FAM6_XEON_PHI_KNM:
2317 return 1;
2318 default:
2319 return 0;
2320 }
2321}
2322
2323static void
2324dump_cstate_pstate_config_info(unsigned int family, unsigned int model)

--- 263 unchanged lines hidden (view full) ---

2588{
2589 unsigned long long msr;
2590
2591 if (do_rapl & RAPL_PKG_POWER_INFO)
2592 if (!get_msr(base_cpu, MSR_PKG_POWER_INFO, &msr))
2593 return ((msr >> 0) & RAPL_POWER_GRANULARITY) * rapl_power_units;
2594
2595 switch (model) {
2538 return 1;
2539 default:
2540 return 0;
2541 }
2542}
2543
2544static void
2545dump_cstate_pstate_config_info(unsigned int family, unsigned int model)

--- 263 unchanged lines hidden (view full) ---

2809{
2810 unsigned long long msr;
2811
2812 if (do_rapl & RAPL_PKG_POWER_INFO)
2813 if (!get_msr(base_cpu, MSR_PKG_POWER_INFO, &msr))
2814 return ((msr >> 0) & RAPL_POWER_GRANULARITY) * rapl_power_units;
2815
2816 switch (model) {
2596 case 0x37:
2597 case 0x4D:
2817 case INTEL_FAM6_ATOM_SILVERMONT1:
2818 case INTEL_FAM6_ATOM_SILVERMONT2:
2598 return 30.0;
2599 default:
2600 return 135.0;
2601 }
2602}
2603
2604/*
2605 * rapl_dram_energy_units_probe()
2606 * Energy units are either hard-coded, or come from RAPL Energy Unit MSR.
2607 */
2608static double
2609rapl_dram_energy_units_probe(int model, double rapl_energy_units)
2610{
2611 /* only called for genuine_intel, family 6 */
2612
2613 switch (model) {
2819 return 30.0;
2820 default:
2821 return 135.0;
2822 }
2823}
2824
2825/*
2826 * rapl_dram_energy_units_probe()
2827 * Energy units are either hard-coded, or come from RAPL Energy Unit MSR.
2828 */
2829static double
2830rapl_dram_energy_units_probe(int model, double rapl_energy_units)
2831{
2832 /* only called for genuine_intel, family 6 */
2833
2834 switch (model) {
2614 case 0x3F: /* HSX */
2615 case 0x4F: /* BDX */
2616 case 0x56: /* BDX-DE */
2617 case 0x57: /* KNL */
2835 case INTEL_FAM6_HASWELL_X: /* HSX */
2836 case INTEL_FAM6_BROADWELL_X: /* BDX */
2837 case INTEL_FAM6_BROADWELL_XEON_D: /* BDX-DE */
2838 case INTEL_FAM6_XEON_PHI_KNL: /* KNL */
2839 case INTEL_FAM6_XEON_PHI_KNM:
2618 return (rapl_dram_energy_units = 15.3 / 1000000);
2619 default:
2620 return (rapl_energy_units);
2621 }
2622}
2623
2624
2625/*

--- 9 unchanged lines hidden (view full) ---

2635
2636 if (!genuine_intel)
2637 return;
2638
2639 if (family != 6)
2640 return;
2641
2642 switch (model) {
2840 return (rapl_dram_energy_units = 15.3 / 1000000);
2841 default:
2842 return (rapl_energy_units);
2843 }
2844}
2845
2846
2847/*

--- 9 unchanged lines hidden (view full) ---

2857
2858 if (!genuine_intel)
2859 return;
2860
2861 if (family != 6)
2862 return;
2863
2864 switch (model) {
2643 case 0x2A:
2644 case 0x3A:
2645 case 0x3C: /* HSW */
2646 case 0x45: /* HSW */
2647 case 0x46: /* HSW */
2648 case 0x3D: /* BDW */
2649 case 0x47: /* BDW */
2865 case INTEL_FAM6_SANDYBRIDGE:
2866 case INTEL_FAM6_IVYBRIDGE:
2867 case INTEL_FAM6_HASWELL_CORE: /* HSW */
2868 case INTEL_FAM6_HASWELL_ULT: /* HSW */
2869 case INTEL_FAM6_HASWELL_GT3E: /* HSW */
2870 case INTEL_FAM6_BROADWELL_CORE: /* BDW */
2871 case INTEL_FAM6_BROADWELL_GT3E: /* BDW */
2650 do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_GFX | RAPL_PKG_POWER_INFO;
2651 break;
2872 do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_GFX | RAPL_PKG_POWER_INFO;
2873 break;
2652 case 0x5C: /* BXT */
2874 case INTEL_FAM6_ATOM_GOLDMONT: /* BXT */
2653 do_rapl = RAPL_PKG | RAPL_PKG_POWER_INFO;
2654 break;
2875 do_rapl = RAPL_PKG | RAPL_PKG_POWER_INFO;
2876 break;
2655 case 0x4E: /* SKL */
2656 case 0x5E: /* SKL */
2657 case 0x8E: /* KBL */
2658 case 0x9E: /* KBL */
2877 case INTEL_FAM6_SKYLAKE_MOBILE: /* SKL */
2878 case INTEL_FAM6_SKYLAKE_DESKTOP: /* SKL */
2879 case INTEL_FAM6_KABYLAKE_MOBILE: /* KBL */
2880 case INTEL_FAM6_KABYLAKE_DESKTOP: /* KBL */
2659 do_rapl = RAPL_PKG | RAPL_DRAM | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_PKG_POWER_INFO;
2660 break;
2881 do_rapl = RAPL_PKG | RAPL_DRAM | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_PKG_POWER_INFO;
2882 break;
2661 case 0x3F: /* HSX */
2662 case 0x4F: /* BDX */
2663 case 0x56: /* BDX-DE */
2664 case 0x55: /* SKX */
2665 case 0x57: /* KNL */
2883 case INTEL_FAM6_HASWELL_X: /* HSX */
2884 case INTEL_FAM6_BROADWELL_X: /* BDX */
2885 case INTEL_FAM6_BROADWELL_XEON_D: /* BDX-DE */
2886 case INTEL_FAM6_SKYLAKE_X: /* SKX */
2887 case INTEL_FAM6_XEON_PHI_KNL: /* KNL */
2888 case INTEL_FAM6_XEON_PHI_KNM:
2666 do_rapl = RAPL_PKG | RAPL_DRAM | RAPL_DRAM_POWER_INFO | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_PKG_POWER_INFO;
2667 break;
2889 do_rapl = RAPL_PKG | RAPL_DRAM | RAPL_DRAM_POWER_INFO | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_PKG_POWER_INFO;
2890 break;
2668 case 0x2D:
2669 case 0x3E:
2891 case INTEL_FAM6_SANDYBRIDGE_X:
2892 case INTEL_FAM6_IVYBRIDGE_X:
2670 do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_DRAM | RAPL_DRAM_POWER_INFO | RAPL_PKG_PERF_STATUS | RAPL_DRAM_PERF_STATUS | RAPL_PKG_POWER_INFO;
2671 break;
2893 do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_DRAM | RAPL_DRAM_POWER_INFO | RAPL_PKG_PERF_STATUS | RAPL_DRAM_PERF_STATUS | RAPL_PKG_POWER_INFO;
2894 break;
2672 case 0x37: /* BYT */
2673 case 0x4D: /* AVN */
2674 do_rapl = RAPL_PKG | RAPL_CORES ;
2895 case INTEL_FAM6_ATOM_SILVERMONT1: /* BYT */
2896 case INTEL_FAM6_ATOM_SILVERMONT2: /* AVN */
2897 do_rapl = RAPL_PKG | RAPL_CORES;
2675 break;
2898 break;
2899 case INTEL_FAM6_ATOM_DENVERTON: /* DNV */
2900 do_rapl = RAPL_PKG | RAPL_DRAM | RAPL_DRAM_POWER_INFO | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_PKG_POWER_INFO | RAPL_CORES_ENERGY_STATUS;
2901 break;
2676 default:
2677 return;
2678 }
2679
2680 /* units on package 0, verify later other packages match */
2681 if (get_msr(base_cpu, MSR_RAPL_POWER_UNIT, &msr))
2682 return;
2683
2684 rapl_power_units = 1.0 / (1 << (msr & 0xF));
2902 default:
2903 return;
2904 }
2905
2906 /* units on package 0, verify later other packages match */
2907 if (get_msr(base_cpu, MSR_RAPL_POWER_UNIT, &msr))
2908 return;
2909
2910 rapl_power_units = 1.0 / (1 << (msr & 0xF));
2685 if (model == 0x37)
2911 if (model == INTEL_FAM6_ATOM_SILVERMONT1)
2686 rapl_energy_units = 1.0 * (1 << (msr >> 8 & 0x1F)) / 1000000;
2687 else
2688 rapl_energy_units = 1.0 / (1 << (msr >> 8 & 0x1F));
2689
2690 rapl_dram_energy_units = rapl_dram_energy_units_probe(model, rapl_energy_units);
2691
2692 time_unit = msr >> 16 & 0xF;
2693 if (time_unit == 0)

--- 14 unchanged lines hidden (view full) ---

2708{
2709 if (!genuine_intel)
2710 return;
2711
2712 if (family != 6)
2713 return;
2714
2715 switch (model) {
2912 rapl_energy_units = 1.0 * (1 << (msr >> 8 & 0x1F)) / 1000000;
2913 else
2914 rapl_energy_units = 1.0 / (1 << (msr >> 8 & 0x1F));
2915
2916 rapl_dram_energy_units = rapl_dram_energy_units_probe(model, rapl_energy_units);
2917
2918 time_unit = msr >> 16 & 0xF;
2919 if (time_unit == 0)

--- 14 unchanged lines hidden (view full) ---

2934{
2935 if (!genuine_intel)
2936 return;
2937
2938 if (family != 6)
2939 return;
2940
2941 switch (model) {
2716 case 0x3C: /* HSW */
2717 case 0x45: /* HSW */
2718 case 0x46: /* HSW */
2942 case INTEL_FAM6_HASWELL_CORE: /* HSW */
2943 case INTEL_FAM6_HASWELL_ULT: /* HSW */
2944 case INTEL_FAM6_HASWELL_GT3E: /* HSW */
2719 do_gfx_perf_limit_reasons = 1;
2945 do_gfx_perf_limit_reasons = 1;
2720 case 0x3F: /* HSX */
2946 case INTEL_FAM6_HASWELL_X: /* HSX */
2721 do_core_perf_limit_reasons = 1;
2722 do_ring_perf_limit_reasons = 1;
2723 default:
2724 return;
2725 }
2726}
2727
2728int print_thermal(struct thread_data *t, struct core_data *c, struct pkg_data *p)
2729{
2730 unsigned long long msr;
2731 unsigned int dts;
2732 int cpu;
2733
2734 if (!(do_dts || do_ptm))
2735 return 0;
2736
2737 cpu = t->cpu_id;
2738
2739 /* DTS is per-core, no need to print for each thread */
2947 do_core_perf_limit_reasons = 1;
2948 do_ring_perf_limit_reasons = 1;
2949 default:
2950 return;
2951 }
2952}
2953
2954int print_thermal(struct thread_data *t, struct core_data *c, struct pkg_data *p)
2955{
2956 unsigned long long msr;
2957 unsigned int dts;
2958 int cpu;
2959
2960 if (!(do_dts || do_ptm))
2961 return 0;
2962
2963 cpu = t->cpu_id;
2964
2965 /* DTS is per-core, no need to print for each thread */
2740 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
2966 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
2741 return 0;
2742
2743 if (cpu_migrate(cpu)) {
2744 fprintf(outf, "Could not migrate to CPU %d\n", cpu);
2745 return -1;
2746 }
2747
2748 if (do_ptm && (t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE)) {

--- 132 unchanged lines hidden (view full) ---

2881 if (do_rapl & RAPL_CORE_POLICY) {
2882 if (debug) {
2883 if (get_msr(cpu, MSR_PP0_POLICY, &msr))
2884 return -7;
2885
2886 fprintf(outf, "cpu%d: MSR_PP0_POLICY: %lld\n", cpu, msr & 0xF);
2887 }
2888 }
2967 return 0;
2968
2969 if (cpu_migrate(cpu)) {
2970 fprintf(outf, "Could not migrate to CPU %d\n", cpu);
2971 return -1;
2972 }
2973
2974 if (do_ptm && (t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE)) {

--- 132 unchanged lines hidden (view full) ---

3107 if (do_rapl & RAPL_CORE_POLICY) {
3108 if (debug) {
3109 if (get_msr(cpu, MSR_PP0_POLICY, &msr))
3110 return -7;
3111
3112 fprintf(outf, "cpu%d: MSR_PP0_POLICY: %lld\n", cpu, msr & 0xF);
3113 }
3114 }
2889 if (do_rapl & RAPL_CORES) {
3115 if (do_rapl & RAPL_CORES_POWER_LIMIT) {
2890 if (debug) {
3116 if (debug) {
2891
2892 if (get_msr(cpu, MSR_PP0_POWER_LIMIT, &msr))
2893 return -9;
2894 fprintf(outf, "cpu%d: MSR_PP0_POWER_LIMIT: 0x%08llx (%slocked)\n",
2895 cpu, msr, (msr >> 31) & 1 ? "": "UN");
2896 print_power_limit_msr(cpu, msr, "Cores Limit");
2897 }
2898 }
2899 if (do_rapl & RAPL_GFX) {

--- 22 unchanged lines hidden (view full) ---

2922 */
2923
2924int has_snb_msrs(unsigned int family, unsigned int model)
2925{
2926 if (!genuine_intel)
2927 return 0;
2928
2929 switch (model) {
3117 if (get_msr(cpu, MSR_PP0_POWER_LIMIT, &msr))
3118 return -9;
3119 fprintf(outf, "cpu%d: MSR_PP0_POWER_LIMIT: 0x%08llx (%slocked)\n",
3120 cpu, msr, (msr >> 31) & 1 ? "": "UN");
3121 print_power_limit_msr(cpu, msr, "Cores Limit");
3122 }
3123 }
3124 if (do_rapl & RAPL_GFX) {

--- 22 unchanged lines hidden (view full) ---

3147 */
3148
3149int has_snb_msrs(unsigned int family, unsigned int model)
3150{
3151 if (!genuine_intel)
3152 return 0;
3153
3154 switch (model) {
2930 case 0x2A:
2931 case 0x2D:
2932 case 0x3A: /* IVB */
2933 case 0x3E: /* IVB Xeon */
2934 case 0x3C: /* HSW */
2935 case 0x3F: /* HSW */
2936 case 0x45: /* HSW */
2937 case 0x46: /* HSW */
2938 case 0x3D: /* BDW */
2939 case 0x47: /* BDW */
2940 case 0x4F: /* BDX */
2941 case 0x56: /* BDX-DE */
2942 case 0x4E: /* SKL */
2943 case 0x5E: /* SKL */
2944 case 0x8E: /* KBL */
2945 case 0x9E: /* KBL */
2946 case 0x55: /* SKX */
2947 case 0x5C: /* BXT */
3155 case INTEL_FAM6_SANDYBRIDGE:
3156 case INTEL_FAM6_SANDYBRIDGE_X:
3157 case INTEL_FAM6_IVYBRIDGE: /* IVB */
3158 case INTEL_FAM6_IVYBRIDGE_X: /* IVB Xeon */
3159 case INTEL_FAM6_HASWELL_CORE: /* HSW */
3160 case INTEL_FAM6_HASWELL_X: /* HSW */
3161 case INTEL_FAM6_HASWELL_ULT: /* HSW */
3162 case INTEL_FAM6_HASWELL_GT3E: /* HSW */
3163 case INTEL_FAM6_BROADWELL_CORE: /* BDW */
3164 case INTEL_FAM6_BROADWELL_GT3E: /* BDW */
3165 case INTEL_FAM6_BROADWELL_X: /* BDX */
3166 case INTEL_FAM6_BROADWELL_XEON_D: /* BDX-DE */
3167 case INTEL_FAM6_SKYLAKE_MOBILE: /* SKL */
3168 case INTEL_FAM6_SKYLAKE_DESKTOP: /* SKL */
3169 case INTEL_FAM6_KABYLAKE_MOBILE: /* KBL */
3170 case INTEL_FAM6_KABYLAKE_DESKTOP: /* KBL */
3171 case INTEL_FAM6_SKYLAKE_X: /* SKX */
3172 case INTEL_FAM6_ATOM_GOLDMONT: /* BXT */
3173 case INTEL_FAM6_ATOM_DENVERTON: /* DNV */
2948 return 1;
2949 }
2950 return 0;
2951}
2952
2953/*
2954 * HSW adds support for additional MSRs:
2955 *

--- 7 unchanged lines hidden (view full) ---

2963 *
2964 */
2965int has_hsw_msrs(unsigned int family, unsigned int model)
2966{
2967 if (!genuine_intel)
2968 return 0;
2969
2970 switch (model) {
3174 return 1;
3175 }
3176 return 0;
3177}
3178
3179/*
3180 * HSW adds support for additional MSRs:
3181 *

--- 7 unchanged lines hidden (view full) ---

3189 *
3190 */
3191int has_hsw_msrs(unsigned int family, unsigned int model)
3192{
3193 if (!genuine_intel)
3194 return 0;
3195
3196 switch (model) {
2971 case 0x45: /* HSW */
2972 case 0x3D: /* BDW */
2973 case 0x4E: /* SKL */
2974 case 0x5E: /* SKL */
2975 case 0x8E: /* KBL */
2976 case 0x9E: /* KBL */
2977 case 0x5C: /* BXT */
3197 case INTEL_FAM6_HASWELL_ULT: /* HSW */
3198 case INTEL_FAM6_BROADWELL_CORE: /* BDW */
3199 case INTEL_FAM6_SKYLAKE_MOBILE: /* SKL */
3200 case INTEL_FAM6_SKYLAKE_DESKTOP: /* SKL */
3201 case INTEL_FAM6_KABYLAKE_MOBILE: /* KBL */
3202 case INTEL_FAM6_KABYLAKE_DESKTOP: /* KBL */
3203 case INTEL_FAM6_ATOM_GOLDMONT: /* BXT */
2978 return 1;
2979 }
2980 return 0;
2981}
2982
2983/*
2984 * SKL adds support for additional MSRS:
2985 *
2986 * MSR_PKG_WEIGHTED_CORE_C0_RES 0x00000658
2987 * MSR_PKG_ANY_CORE_C0_RES 0x00000659
2988 * MSR_PKG_ANY_GFXE_C0_RES 0x0000065A
2989 * MSR_PKG_BOTH_CORE_GFXE_C0_RES 0x0000065B
2990 */
2991int has_skl_msrs(unsigned int family, unsigned int model)
2992{
2993 if (!genuine_intel)
2994 return 0;
2995
2996 switch (model) {
3204 return 1;
3205 }
3206 return 0;
3207}
3208
3209/*
3210 * SKL adds support for additional MSRS:
3211 *
3212 * MSR_PKG_WEIGHTED_CORE_C0_RES 0x00000658
3213 * MSR_PKG_ANY_CORE_C0_RES 0x00000659
3214 * MSR_PKG_ANY_GFXE_C0_RES 0x0000065A
3215 * MSR_PKG_BOTH_CORE_GFXE_C0_RES 0x0000065B
3216 */
3217int has_skl_msrs(unsigned int family, unsigned int model)
3218{
3219 if (!genuine_intel)
3220 return 0;
3221
3222 switch (model) {
2997 case 0x4E: /* SKL */
2998 case 0x5E: /* SKL */
2999 case 0x8E: /* KBL */
3000 case 0x9E: /* KBL */
3223 case INTEL_FAM6_SKYLAKE_MOBILE: /* SKL */
3224 case INTEL_FAM6_SKYLAKE_DESKTOP: /* SKL */
3225 case INTEL_FAM6_KABYLAKE_MOBILE: /* KBL */
3226 case INTEL_FAM6_KABYLAKE_DESKTOP: /* KBL */
3001 return 1;
3002 }
3003 return 0;
3004}
3005
3006
3007
3008int is_slm(unsigned int family, unsigned int model)
3009{
3010 if (!genuine_intel)
3011 return 0;
3012 switch (model) {
3227 return 1;
3228 }
3229 return 0;
3230}
3231
3232
3233
3234int is_slm(unsigned int family, unsigned int model)
3235{
3236 if (!genuine_intel)
3237 return 0;
3238 switch (model) {
3013 case 0x37: /* BYT */
3014 case 0x4D: /* AVN */
3239 case INTEL_FAM6_ATOM_SILVERMONT1: /* BYT */
3240 case INTEL_FAM6_ATOM_SILVERMONT2: /* AVN */
3015 return 1;
3016 }
3017 return 0;
3018}
3019
3020int is_knl(unsigned int family, unsigned int model)
3021{
3022 if (!genuine_intel)
3023 return 0;
3024 switch (model) {
3241 return 1;
3242 }
3243 return 0;
3244}
3245
3246int is_knl(unsigned int family, unsigned int model)
3247{
3248 if (!genuine_intel)
3249 return 0;
3250 switch (model) {
3025 case 0x57: /* KNL */
3251 case INTEL_FAM6_XEON_PHI_KNL: /* KNL */
3252 case INTEL_FAM6_XEON_PHI_KNM:
3026 return 1;
3027 }
3028 return 0;
3029}
3030
3031unsigned int get_aperf_mperf_multiplier(unsigned int family, unsigned int model)
3032{
3033 if (is_knl(family, model))

--- 11 unchanged lines hidden (view full) ---

3045 double freq;
3046
3047 if (get_msr(base_cpu, MSR_FSB_FREQ, &msr))
3048 fprintf(outf, "SLM BCLK: unknown\n");
3049
3050 i = msr & 0xf;
3051 if (i >= SLM_BCLK_FREQS) {
3052 fprintf(outf, "SLM BCLK[%d] invalid\n", i);
3253 return 1;
3254 }
3255 return 0;
3256}
3257
3258unsigned int get_aperf_mperf_multiplier(unsigned int family, unsigned int model)
3259{
3260 if (is_knl(family, model))

--- 11 unchanged lines hidden (view full) ---

3272 double freq;
3273
3274 if (get_msr(base_cpu, MSR_FSB_FREQ, &msr))
3275 fprintf(outf, "SLM BCLK: unknown\n");
3276
3277 i = msr & 0xf;
3278 if (i >= SLM_BCLK_FREQS) {
3279 fprintf(outf, "SLM BCLK[%d] invalid\n", i);
3053 msr = 3;
3280 i = 3;
3054 }
3055 freq = slm_freq_table[i];
3056
3057 fprintf(outf, "SLM BCLK: %.1f Mhz\n", freq);
3058
3059 return freq;
3060}
3061

--- 107 unchanged lines hidden (view full) ---

3169void decode_misc_pwr_mgmt_msr(void)
3170{
3171 unsigned long long msr;
3172
3173 if (!do_nhm_platform_info)
3174 return;
3175
3176 if (!get_msr(base_cpu, MSR_MISC_PWR_MGMT, &msr))
3281 }
3282 freq = slm_freq_table[i];
3283
3284 fprintf(outf, "SLM BCLK: %.1f Mhz\n", freq);
3285
3286 return freq;
3287}
3288

--- 107 unchanged lines hidden (view full) ---

3396void decode_misc_pwr_mgmt_msr(void)
3397{
3398 unsigned long long msr;
3399
3400 if (!do_nhm_platform_info)
3401 return;
3402
3403 if (!get_msr(base_cpu, MSR_MISC_PWR_MGMT, &msr))
3177 fprintf(outf, "cpu%d: MSR_MISC_PWR_MGMT: 0x%08llx (%sable-EIST_Coordination %sable-EPB)\n",
3404 fprintf(outf, "cpu%d: MSR_MISC_PWR_MGMT: 0x%08llx (%sable-EIST_Coordination %sable-EPB %sable-OOB)\n",
3178 base_cpu, msr,
3179 msr & (1 << 0) ? "DIS" : "EN",
3405 base_cpu, msr,
3406 msr & (1 << 0) ? "DIS" : "EN",
3180 msr & (1 << 1) ? "EN" : "DIS");
3407 msr & (1 << 1) ? "EN" : "DIS",
3408 msr & (1 << 8) ? "EN" : "DIS");
3181}
3182
3183void process_cpuid()
3184{
3185 unsigned int eax, ebx, ecx, edx, max_level, max_extended_level;
3186 unsigned int fms, family, model, stepping;
3187
3188 eax = ebx = ecx = edx = 0;

--- 109 unchanged lines hidden (view full) ---

3298 if (ebx_tsc != 0) {
3299
3300 if (debug && (ebx != 0))
3301 fprintf(outf, "CPUID(0x15): eax_crystal: %d ebx_tsc: %d ecx_crystal_hz: %d\n",
3302 eax_crystal, ebx_tsc, crystal_hz);
3303
3304 if (crystal_hz == 0)
3305 switch(model) {
3409}
3410
3411void process_cpuid()
3412{
3413 unsigned int eax, ebx, ecx, edx, max_level, max_extended_level;
3414 unsigned int fms, family, model, stepping;
3415
3416 eax = ebx = ecx = edx = 0;

--- 109 unchanged lines hidden (view full) ---

3526 if (ebx_tsc != 0) {
3527
3528 if (debug && (ebx != 0))
3529 fprintf(outf, "CPUID(0x15): eax_crystal: %d ebx_tsc: %d ecx_crystal_hz: %d\n",
3530 eax_crystal, ebx_tsc, crystal_hz);
3531
3532 if (crystal_hz == 0)
3533 switch(model) {
3306 case 0x4E: /* SKL */
3307 case 0x5E: /* SKL */
3308 case 0x8E: /* KBL */
3309 case 0x9E: /* KBL */
3534 case INTEL_FAM6_SKYLAKE_MOBILE: /* SKL */
3535 case INTEL_FAM6_SKYLAKE_DESKTOP: /* SKL */
3536 case INTEL_FAM6_KABYLAKE_MOBILE: /* KBL */
3537 case INTEL_FAM6_KABYLAKE_DESKTOP: /* KBL */
3310 crystal_hz = 24000000; /* 24.0 MHz */
3311 break;
3538 crystal_hz = 24000000; /* 24.0 MHz */
3539 break;
3312 case 0x55: /* SKX */
3540 case INTEL_FAM6_SKYLAKE_X: /* SKX */
3541 case INTEL_FAM6_ATOM_DENVERTON: /* DNV */
3313 crystal_hz = 25000000; /* 25.0 MHz */
3314 break;
3542 crystal_hz = 25000000; /* 25.0 MHz */
3543 break;
3315 case 0x5C: /* BXT */
3544 case INTEL_FAM6_ATOM_GOLDMONT: /* BXT */
3316 crystal_hz = 19200000; /* 19.2 MHz */
3317 break;
3318 default:
3319 crystal_hz = 0;
3320 }
3321
3322 if (crystal_hz) {
3323 tsc_hz = (unsigned long long) crystal_hz * ebx_tsc / eax_crystal;

--- 56 unchanged lines hidden (view full) ---

3380{
3381 fprintf(outf,
3382 "Usage: turbostat [OPTIONS][(--interval seconds) | COMMAND ...]\n"
3383 "\n"
3384 "Turbostat forks the specified COMMAND and prints statistics\n"
3385 "when COMMAND completes.\n"
3386 "If no COMMAND is specified, turbostat wakes every 5-seconds\n"
3387 "to print statistics, until interrupted.\n"
3545 crystal_hz = 19200000; /* 19.2 MHz */
3546 break;
3547 default:
3548 crystal_hz = 0;
3549 }
3550
3551 if (crystal_hz) {
3552 tsc_hz = (unsigned long long) crystal_hz * ebx_tsc / eax_crystal;

--- 56 unchanged lines hidden (view full) ---

3609{
3610 fprintf(outf,
3611 "Usage: turbostat [OPTIONS][(--interval seconds) | COMMAND ...]\n"
3612 "\n"
3613 "Turbostat forks the specified COMMAND and prints statistics\n"
3614 "when COMMAND completes.\n"
3615 "If no COMMAND is specified, turbostat wakes every 5-seconds\n"
3616 "to print statistics, until interrupted.\n"
3617 "--add add a counter\n"
3618 " eg. --add msr0x10,u64,cpu,delta,MY_TSC\n"
3388 "--debug run in \"debug\" mode\n"
3389 "--interval sec Override default 5-second measurement interval\n"
3390 "--help print this help message\n"
3391 "--counter msr print 32-bit counter at address \"msr\"\n"
3392 "--Counter msr print 64-bit Counter at address \"msr\"\n"
3393 "--out file create or truncate \"file\" for all output\n"
3394 "--msr msr print 32-bit value at address \"msr\"\n"
3395 "--MSR msr print 64-bit Value at address \"msr\"\n"

--- 114 unchanged lines hidden (view full) ---

3510}
3511
3512void
3513allocate_counters(struct thread_data **t, struct core_data **c, struct pkg_data **p)
3514{
3515 int i;
3516
3517 *t = calloc(topo.num_threads_per_core * topo.num_cores_per_pkg *
3619 "--debug run in \"debug\" mode\n"
3620 "--interval sec Override default 5-second measurement interval\n"
3621 "--help print this help message\n"
3622 "--counter msr print 32-bit counter at address \"msr\"\n"
3623 "--Counter msr print 64-bit Counter at address \"msr\"\n"
3624 "--out file create or truncate \"file\" for all output\n"
3625 "--msr msr print 32-bit value at address \"msr\"\n"
3626 "--MSR msr print 64-bit Value at address \"msr\"\n"

--- 114 unchanged lines hidden (view full) ---

3741}
3742
3743void
3744allocate_counters(struct thread_data **t, struct core_data **c, struct pkg_data **p)
3745{
3746 int i;
3747
3748 *t = calloc(topo.num_threads_per_core * topo.num_cores_per_pkg *
3518 topo.num_packages, sizeof(struct thread_data));
3749 topo.num_packages, sizeof(struct thread_data) + sys.thread_counter_bytes);
3519 if (*t == NULL)
3520 goto error;
3521
3522 for (i = 0; i < topo.num_threads_per_core *
3523 topo.num_cores_per_pkg * topo.num_packages; i++)
3524 (*t)[i].cpu_id = -1;
3525
3526 *c = calloc(topo.num_cores_per_pkg * topo.num_packages,
3750 if (*t == NULL)
3751 goto error;
3752
3753 for (i = 0; i < topo.num_threads_per_core *
3754 topo.num_cores_per_pkg * topo.num_packages; i++)
3755 (*t)[i].cpu_id = -1;
3756
3757 *c = calloc(topo.num_cores_per_pkg * topo.num_packages,
3527 sizeof(struct core_data));
3758 sizeof(struct core_data) + sys.core_counter_bytes);
3528 if (*c == NULL)
3529 goto error;
3530
3531 for (i = 0; i < topo.num_cores_per_pkg * topo.num_packages; i++)
3532 (*c)[i].core_id = -1;
3533
3759 if (*c == NULL)
3760 goto error;
3761
3762 for (i = 0; i < topo.num_cores_per_pkg * topo.num_packages; i++)
3763 (*c)[i].core_id = -1;
3764
3534 *p = calloc(topo.num_packages, sizeof(struct pkg_data));
3765 *p = calloc(topo.num_packages, sizeof(struct pkg_data) + sys.package_counter_bytes);
3535 if (*p == NULL)
3536 goto error;
3537
3538 for (i = 0; i < topo.num_packages; i++)
3539 (*p)[i].package_id = i;
3540
3541 return;
3542error:

--- 50 unchanged lines hidden (view full) ---

3593{
3594 output_buffer = calloc(1, (1 + topo.num_cpus) * 1024);
3595 outp = output_buffer;
3596 if (outp == NULL)
3597 err(-1, "calloc output buffer");
3598}
3599void allocate_fd_percpu(void)
3600{
3766 if (*p == NULL)
3767 goto error;
3768
3769 for (i = 0; i < topo.num_packages; i++)
3770 (*p)[i].package_id = i;
3771
3772 return;
3773error:

--- 50 unchanged lines hidden (view full) ---

3824{
3825 output_buffer = calloc(1, (1 + topo.num_cpus) * 1024);
3826 outp = output_buffer;
3827 if (outp == NULL)
3828 err(-1, "calloc output buffer");
3829}
3830void allocate_fd_percpu(void)
3831{
3601 fd_percpu = calloc(topo.max_cpu_num, sizeof(int));
3832 fd_percpu = calloc(topo.max_cpu_num + 1, sizeof(int));
3602 if (fd_percpu == NULL)
3603 err(-1, "calloc fd_percpu");
3604}
3605void allocate_irq_buffers(void)
3606{
3607 irq_column_2_cpu = calloc(topo.num_cpus, sizeof(int));
3608 if (irq_column_2_cpu == NULL)
3609 err(-1, "calloc %d", topo.num_cpus);
3610
3833 if (fd_percpu == NULL)
3834 err(-1, "calloc fd_percpu");
3835}
3836void allocate_irq_buffers(void)
3837{
3838 irq_column_2_cpu = calloc(topo.num_cpus, sizeof(int));
3839 if (irq_column_2_cpu == NULL)
3840 err(-1, "calloc %d", topo.num_cpus);
3841
3611 irqs_per_cpu = calloc(topo.max_cpu_num, sizeof(int));
3842 irqs_per_cpu = calloc(topo.max_cpu_num + 1, sizeof(int));
3612 if (irqs_per_cpu == NULL)
3843 if (irqs_per_cpu == NULL)
3613 err(-1, "calloc %d", topo.max_cpu_num);
3844 err(-1, "calloc %d", topo.max_cpu_num + 1);
3614}
3615void setup_all_buffers(void)
3616{
3617 topology_probe();
3618 allocate_irq_buffers();
3619 allocate_fd_percpu();
3620 allocate_counters(&thread_even, &core_even, &package_even);
3621 allocate_counters(&thread_odd, &core_odd, &package_odd);

--- 70 unchanged lines hidden (view full) ---

3692 }
3693 /*
3694 * n.b. fork_it() does not check for errors from for_all_cpus()
3695 * because re-starting is problematic when forking
3696 */
3697 for_all_cpus(get_counters, ODD_COUNTERS);
3698 gettimeofday(&tv_odd, (struct timezone *)NULL);
3699 timersub(&tv_odd, &tv_even, &tv_delta);
3845}
3846void setup_all_buffers(void)
3847{
3848 topology_probe();
3849 allocate_irq_buffers();
3850 allocate_fd_percpu();
3851 allocate_counters(&thread_even, &core_even, &package_even);
3852 allocate_counters(&thread_odd, &core_odd, &package_odd);

--- 70 unchanged lines hidden (view full) ---

3923 }
3924 /*
3925 * n.b. fork_it() does not check for errors from for_all_cpus()
3926 * because re-starting is problematic when forking
3927 */
3928 for_all_cpus(get_counters, ODD_COUNTERS);
3929 gettimeofday(&tv_odd, (struct timezone *)NULL);
3930 timersub(&tv_odd, &tv_even, &tv_delta);
3700 for_all_cpus_2(delta_cpu, ODD_COUNTERS, EVEN_COUNTERS);
3701 compute_average(EVEN_COUNTERS);
3702 format_all_counters(EVEN_COUNTERS);
3931 if (for_all_cpus_2(delta_cpu, ODD_COUNTERS, EVEN_COUNTERS))
3932 fprintf(outf, "%s: Counter reset detected\n", progname);
3933 else {
3934 compute_average(EVEN_COUNTERS);
3935 format_all_counters(EVEN_COUNTERS);
3936 }
3703
3704 fprintf(outf, "%.6f sec\n", tv_delta.tv_sec + tv_delta.tv_usec/1000000.0);
3705
3706 flush_output_stderr();
3707
3708 return status;
3709}
3710

--- 10 unchanged lines hidden (view full) ---

3721 return status;
3722
3723 flush_output_stdout();
3724
3725 return status;
3726}
3727
3728void print_version() {
3937
3938 fprintf(outf, "%.6f sec\n", tv_delta.tv_sec + tv_delta.tv_usec/1000000.0);
3939
3940 flush_output_stderr();
3941
3942 return status;
3943}
3944

--- 10 unchanged lines hidden (view full) ---

3955 return status;
3956
3957 flush_output_stdout();
3958
3959 return status;
3960}
3961
3962void print_version() {
3729 fprintf(outf, "turbostat version 4.12 5 Apr 2016"
3963 fprintf(outf, "turbostat version 4.15 21 Dec 2016"
3730 " - Len Brown <lenb@kernel.org>\n");
3731}
3732
3964 " - Len Brown <lenb@kernel.org>\n");
3965}
3966
3967int add_counter(unsigned int msr_num, char *name, unsigned int width,
3968 enum counter_scope scope, enum counter_type type,
3969 enum counter_format format)
3970{
3971 struct msr_counter *msrp;
3972
3973 msrp = calloc(1, sizeof(struct msr_counter));
3974 if (msrp == NULL) {
3975 perror("calloc");
3976 exit(1);
3977 }
3978
3979 msrp->msr_num = msr_num;
3980 strncpy(msrp->name, name, NAME_BYTES);
3981 msrp->width = width;
3982 msrp->type = type;
3983 msrp->format = format;
3984
3985 switch (scope) {
3986
3987 case SCOPE_CPU:
3988 sys.thread_counter_bytes += 64;
3989 msrp->next = sys.tp;
3990 sys.tp = msrp;
3991 sys.thread_counter_bytes += sizeof(unsigned long long);
3992 break;
3993
3994 case SCOPE_CORE:
3995 sys.core_counter_bytes += 64;
3996 msrp->next = sys.cp;
3997 sys.cp = msrp;
3998 sys.core_counter_bytes += sizeof(unsigned long long);
3999 break;
4000
4001 case SCOPE_PACKAGE:
4002 sys.package_counter_bytes += 64;
4003 msrp->next = sys.pp;
4004 sys.pp = msrp;
4005 sys.package_counter_bytes += sizeof(unsigned long long);
4006 break;
4007 }
4008
4009 return 0;
4010}
4011
4012void parse_add_command(char *add_command)
4013{
4014 int msr_num = 0;
4015 char name_buffer[NAME_BYTES];
4016 int width = 64;
4017 int fail = 0;
4018 enum counter_scope scope = SCOPE_CPU;
4019 enum counter_type type = COUNTER_CYCLES;
4020 enum counter_format format = FORMAT_DELTA;
4021
4022 while (add_command) {
4023
4024 if (sscanf(add_command, "msr0x%x", &msr_num) == 1)
4025 goto next;
4026
4027 if (sscanf(add_command, "msr%d", &msr_num) == 1)
4028 goto next;
4029
4030 if (sscanf(add_command, "u%d", &width) == 1) {
4031 if ((width == 32) || (width == 64))
4032 goto next;
4033 width = 64;
4034 }
4035 if (!strncmp(add_command, "cpu", strlen("cpu"))) {
4036 scope = SCOPE_CPU;
4037 goto next;
4038 }
4039 if (!strncmp(add_command, "core", strlen("core"))) {
4040 scope = SCOPE_CORE;
4041 goto next;
4042 }
4043 if (!strncmp(add_command, "package", strlen("package"))) {
4044 scope = SCOPE_PACKAGE;
4045 goto next;
4046 }
4047 if (!strncmp(add_command, "cycles", strlen("cycles"))) {
4048 type = COUNTER_CYCLES;
4049 goto next;
4050 }
4051 if (!strncmp(add_command, "seconds", strlen("seconds"))) {
4052 type = COUNTER_SECONDS;
4053 goto next;
4054 }
4055 if (!strncmp(add_command, "raw", strlen("raw"))) {
4056 format = FORMAT_RAW;
4057 goto next;
4058 }
4059 if (!strncmp(add_command, "delta", strlen("delta"))) {
4060 format = FORMAT_DELTA;
4061 goto next;
4062 }
4063 if (!strncmp(add_command, "percent", strlen("percent"))) {
4064 format = FORMAT_PERCENT;
4065 goto next;
4066 }
4067
4068 if (sscanf(add_command, "%18s,%*s", name_buffer) == 1) { /* 18 < NAME_BYTES */
4069 char *eos;
4070
4071 eos = strchr(name_buffer, ',');
4072 if (eos)
4073 *eos = '\0';
4074 goto next;
4075 }
4076
4077next:
4078 add_command = strchr(add_command, ',');
4079 if (add_command)
4080 add_command++;
4081
4082 }
4083 if (msr_num == 0) {
4084 fprintf(stderr, "--add: (msrDDD | msr0xXXX) required\n");
4085 fail++;
4086 }
4087
4088 /* generate default column header */
4089 if (*name_buffer == '\0') {
4090 if (format == FORMAT_RAW) {
4091 if (width == 32)
4092 sprintf(name_buffer, "msr%d", msr_num);
4093 else
4094 sprintf(name_buffer, "MSR%d", msr_num);
4095 } else if (format == FORMAT_DELTA) {
4096 if (width == 32)
4097 sprintf(name_buffer, "cnt%d", msr_num);
4098 else
4099 sprintf(name_buffer, "CNT%d", msr_num);
4100 } else if (format == FORMAT_PERCENT) {
4101 if (width == 32)
4102 sprintf(name_buffer, "msr%d%%", msr_num);
4103 else
4104 sprintf(name_buffer, "MSR%d%%", msr_num);
4105 }
4106 }
4107
4108 if (add_counter(msr_num, name_buffer, width, scope, type, format))
4109 fail++;
4110
4111 if (fail) {
4112 help();
4113 exit(1);
4114 }
4115}
3733void cmdline(int argc, char **argv)
3734{
3735 int opt;
3736 int option_index = 0;
3737 static struct option long_options[] = {
4116void cmdline(int argc, char **argv)
4117{
4118 int opt;
4119 int option_index = 0;
4120 static struct option long_options[] = {
4121 {"add", required_argument, 0, 'a'},
3738 {"Counter", required_argument, 0, 'C'},
3739 {"counter", required_argument, 0, 'c'},
3740 {"Dump", no_argument, 0, 'D'},
3741 {"debug", no_argument, 0, 'd'},
3742 {"interval", required_argument, 0, 'i'},
3743 {"help", no_argument, 0, 'h'},
3744 {"Joules", no_argument, 0, 'J'},
3745 {"MSR", required_argument, 0, 'M'},

--- 7 unchanged lines hidden (view full) ---

3753 {0, 0, 0, 0 }
3754 };
3755
3756 progname = argv[0];
3757
3758 while ((opt = getopt_long_only(argc, argv, "+C:c:Ddhi:JM:m:o:PpST:v",
3759 long_options, &option_index)) != -1) {
3760 switch (opt) {
4122 {"Counter", required_argument, 0, 'C'},
4123 {"counter", required_argument, 0, 'c'},
4124 {"Dump", no_argument, 0, 'D'},
4125 {"debug", no_argument, 0, 'd'},
4126 {"interval", required_argument, 0, 'i'},
4127 {"help", no_argument, 0, 'h'},
4128 {"Joules", no_argument, 0, 'J'},
4129 {"MSR", required_argument, 0, 'M'},

--- 7 unchanged lines hidden (view full) ---

4137 {0, 0, 0, 0 }
4138 };
4139
4140 progname = argv[0];
4141
4142 while ((opt = getopt_long_only(argc, argv, "+C:c:Ddhi:JM:m:o:PpST:v",
4143 long_options, &option_index)) != -1) {
4144 switch (opt) {
4145 case 'a':
4146 parse_add_command(optarg);
4147 break;
3761 case 'C':
3762 sscanf(optarg, "%x", &extra_delta_offset64);
3763 break;
3764 case 'c':
3765 sscanf(optarg, "%x", &extra_delta_offset32);
3766 break;
3767 case 'D':
3768 dump_only++;

--- 79 unchanged lines hidden --- 		4148 case 'C':
4149 sscanf(optarg, "%x", &extra_delta_offset64);
4150 break;
4151 case 'c':
4152 sscanf(optarg, "%x", &extra_delta_offset32);
4153 break;
4154 case 'D':
4155 dump_only++;

--- 79 unchanged lines hidden ---