turbostat.c (f2642888476d7faefa9695bbebb2abbaeb3685d8) turbostat.c (1df2e55abce64e2f3117fac3968a9ac382fbc9c3)
1/*
2 * turbostat -- show CPU frequency and C-state residency
3 * on modern Intel turbo-capable processors.
4 *
5 * Copyright (c) 2013 Intel Corporation.
6 * Len Brown <len.brown@intel.com>
7 *
8 * This program is free software; you can redistribute it and/or modify it

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1756 ratio[i], bclk, ratio[i] * bclk, cores[i]);
1757}
1758
1759static void
1760dump_nhm_cst_cfg(void)
1761{
1762 unsigned long long msr;
1763
1/*
2 * turbostat -- show CPU frequency and C-state residency
3 * on modern Intel turbo-capable processors.
4 *
5 * Copyright (c) 2013 Intel Corporation.
6 * Len Brown <len.brown@intel.com>
7 *
8 * This program is free software; you can redistribute it and/or modify it

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1756 ratio[i], bclk, ratio[i] * bclk, cores[i]);
1757}
1758
1759static void
1760dump_nhm_cst_cfg(void)
1761{
1762 unsigned long long msr;
1763
1764 get_msr(base_cpu, MSR_NHM_SNB_PKG_CST_CFG_CTL, &msr);
1764 get_msr(base_cpu, MSR_PKG_CST_CONFIG_CONTROL, &msr);
1765
1766#define SNB_C1_AUTO_UNDEMOTE (1UL << 27)
1767#define SNB_C3_AUTO_UNDEMOTE (1UL << 28)
1768
1765
1766#define SNB_C1_AUTO_UNDEMOTE (1UL << 27)
1767#define SNB_C3_AUTO_UNDEMOTE (1UL << 28)
1768
1769 fprintf(outf, "cpu%d: MSR_NHM_SNB_PKG_CST_CFG_CTL: 0x%08llx", base_cpu, msr);
1769 fprintf(outf, "cpu%d: MSR_PKG_CST_CONFIG_CONTROL: 0x%08llx", base_cpu, msr);
1770
1771 fprintf(outf, " (%s%s%s%s%slocked: pkg-cstate-limit=%d: %s)\n",
1772 (msr & SNB_C3_AUTO_UNDEMOTE) ? "UNdemote-C3, " : "",
1773 (msr & SNB_C1_AUTO_UNDEMOTE) ? "UNdemote-C1, " : "",
1774 (msr & NHM_C3_AUTO_DEMOTE) ? "demote-C3, " : "",
1775 (msr & NHM_C1_AUTO_DEMOTE) ? "demote-C1, " : "",
1776 (msr & (1 << 15)) ? "" : "UN",
1777 (unsigned int)msr & 0xF,

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2378}
2379
2380/*
2381 * NHM adds support for additional MSRs:
2382 *
2383 * MSR_SMI_COUNT 0x00000034
2384 *
2385 * MSR_PLATFORM_INFO 0x000000ce
1770
1771 fprintf(outf, " (%s%s%s%s%slocked: pkg-cstate-limit=%d: %s)\n",
1772 (msr & SNB_C3_AUTO_UNDEMOTE) ? "UNdemote-C3, " : "",
1773 (msr & SNB_C1_AUTO_UNDEMOTE) ? "UNdemote-C1, " : "",
1774 (msr & NHM_C3_AUTO_DEMOTE) ? "demote-C3, " : "",
1775 (msr & NHM_C1_AUTO_DEMOTE) ? "demote-C1, " : "",
1776 (msr & (1 << 15)) ? "" : "UN",
1777 (unsigned int)msr & 0xF,

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2378}
2379
2380/*
2381 * NHM adds support for additional MSRs:
2382 *
2383 * MSR_SMI_COUNT 0x00000034
2384 *
2385 * MSR_PLATFORM_INFO 0x000000ce
2386 * MSR_NHM_SNB_PKG_CST_CFG_CTL 0x000000e2
2386 * MSR_PKG_CST_CONFIG_CONTROL 0x000000e2
2387 *
2388 * MSR_MISC_PWR_MGMT 0x000001aa
2389 *
2390 * MSR_PKG_C3_RESIDENCY 0x000003f8
2391 * MSR_PKG_C6_RESIDENCY 0x000003f9
2392 * MSR_CORE_C3_RESIDENCY 0x000003fc
2393 * MSR_CORE_C6_RESIDENCY 0x000003fd
2394 *
2395 * Side effect:
2387 *
2388 * MSR_MISC_PWR_MGMT 0x000001aa
2389 *
2390 * MSR_PKG_C3_RESIDENCY 0x000003f8
2391 * MSR_PKG_C6_RESIDENCY 0x000003f9
2392 * MSR_CORE_C3_RESIDENCY 0x000003fc
2393 * MSR_CORE_C6_RESIDENCY 0x000003fd
2394 *
2395 * Side effect:
2396 * sets global pkg_cstate_limit to decode MSR_NHM_SNB_PKG_CST_CFG_CTL
2396 * sets global pkg_cstate_limit to decode MSR_PKG_CST_CONFIG_CONTROL
2397 */
2398int probe_nhm_msrs(unsigned int family, unsigned int model)
2399{
2400 unsigned long long msr;
2401 unsigned int base_ratio;
2402 int *pkg_cstate_limits;
2403
2404 if (!genuine_intel)

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2457 break;
2458 case INTEL_FAM6_ATOM_GOLDMONT: /* BXT */
2459 case INTEL_FAM6_ATOM_DENVERTON: /* DNV */
2460 pkg_cstate_limits = bxt_pkg_cstate_limits;
2461 break;
2462 default:
2463 return 0;
2464 }
2397 */
2398int probe_nhm_msrs(unsigned int family, unsigned int model)
2399{
2400 unsigned long long msr;
2401 unsigned int base_ratio;
2402 int *pkg_cstate_limits;
2403
2404 if (!genuine_intel)

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2457 break;
2458 case INTEL_FAM6_ATOM_GOLDMONT: /* BXT */
2459 case INTEL_FAM6_ATOM_DENVERTON: /* DNV */
2460 pkg_cstate_limits = bxt_pkg_cstate_limits;
2461 break;
2462 default:
2463 return 0;
2464 }
2465 get_msr(base_cpu, MSR_NHM_SNB_PKG_CST_CFG_CTL, &msr);
2465 get_msr(base_cpu, MSR_PKG_CST_CONFIG_CONTROL, &msr);
2466 pkg_cstate_limit = pkg_cstate_limits[msr & 0xF];
2467
2468 get_msr(base_cpu, MSR_PLATFORM_INFO, &msr);
2469 base_ratio = (msr >> 8) & 0xFF;
2470
2471 base_hz = base_ratio * bclk * 1000000;
2472 has_base_hz = 1;
2473 return 1;

--- 1951 unchanged lines hidden --- 		2466 pkg_cstate_limit = pkg_cstate_limits[msr & 0xF];
2467
2468 get_msr(base_cpu, MSR_PLATFORM_INFO, &msr);
2469 base_ratio = (msr >> 8) & 0xFF;
2470
2471 base_hz = base_ratio * bclk * 1000000;
2472 has_base_hz = 1;
2473 return 1;

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