turbostat.c (d93ea567fc4eec2d3581015e23d2c555f8b393ba) turbostat.c (c026c23629b825100fd4b8223227d9a395f9a56b)
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * turbostat -- show CPU frequency and C-state residency
4 * on modern Intel and AMD processors.
5 *
6 * Copyright (c) 2013 Intel Corporation.
7 * Len Brown <len.brown@intel.com>
8 */

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95unsigned int has_hwp; /* IA32_PM_ENABLE, IA32_HWP_CAPABILITIES */
96 /* IA32_HWP_REQUEST, IA32_HWP_STATUS */
97unsigned int has_hwp_notify; /* IA32_HWP_INTERRUPT */
98unsigned int has_hwp_activity_window; /* IA32_HWP_REQUEST[bits 41:32] */
99unsigned int has_hwp_epp; /* IA32_HWP_REQUEST[bits 31:24] */
100unsigned int has_hwp_pkg; /* IA32_HWP_REQUEST_PKG */
101unsigned int has_misc_feature_control;
102unsigned int first_counter_read = 1;
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * turbostat -- show CPU frequency and C-state residency
4 * on modern Intel and AMD processors.
5 *
6 * Copyright (c) 2013 Intel Corporation.
7 * Len Brown <len.brown@intel.com>
8 */

--- 86 unchanged lines hidden (view full) ---

95unsigned int has_hwp; /* IA32_PM_ENABLE, IA32_HWP_CAPABILITIES */
96 /* IA32_HWP_REQUEST, IA32_HWP_STATUS */
97unsigned int has_hwp_notify; /* IA32_HWP_INTERRUPT */
98unsigned int has_hwp_activity_window; /* IA32_HWP_REQUEST[bits 41:32] */
99unsigned int has_hwp_epp; /* IA32_HWP_REQUEST[bits 31:24] */
100unsigned int has_hwp_pkg; /* IA32_HWP_REQUEST_PKG */
101unsigned int has_misc_feature_control;
102unsigned int first_counter_read = 1;
103int ignore_stdin;
103
104#define RAPL_PKG (1 << 0)
105 /* 0x610 MSR_PKG_POWER_LIMIT */
106 /* 0x611 MSR_PKG_ENERGY_STATUS */
107#define RAPL_PKG_PERF_STATUS (1 << 1)
108 /* 0x613 MSR_PKG_PERF_STATUS */
109#define RAPL_PKG_POWER_INFO (1 << 2)
110 /* 0x614 MSR_PKG_POWER_INFO */

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3008 if (sigaction(SIGINT, &sa, NULL) < 0)
3009 err(1, "sigaction SIGINT");
3010 if (sigaction(SIGUSR1, &sa, NULL) < 0)
3011 err(1, "sigaction SIGUSR1");
3012}
3013
3014void do_sleep(void)
3015{
104
105#define RAPL_PKG (1 << 0)
106 /* 0x610 MSR_PKG_POWER_LIMIT */
107 /* 0x611 MSR_PKG_ENERGY_STATUS */
108#define RAPL_PKG_PERF_STATUS (1 << 1)
109 /* 0x613 MSR_PKG_PERF_STATUS */
110#define RAPL_PKG_POWER_INFO (1 << 2)
111 /* 0x614 MSR_PKG_POWER_INFO */

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3009 if (sigaction(SIGINT, &sa, NULL) < 0)
3010 err(1, "sigaction SIGINT");
3011 if (sigaction(SIGUSR1, &sa, NULL) < 0)
3012 err(1, "sigaction SIGUSR1");
3013}
3014
3015void do_sleep(void)
3016{
3016 struct timeval select_timeout;
3017 struct timeval tout;
3018 struct timespec rest;
3017 fd_set readfds;
3018 int retval;
3019
3020 FD_ZERO(&readfds);
3021 FD_SET(0, &readfds);
3022
3019 fd_set readfds;
3020 int retval;
3021
3022 FD_ZERO(&readfds);
3023 FD_SET(0, &readfds);
3024
3023 if (!isatty(fileno(stdin))) {
3025 if (ignore_stdin) {
3024 nanosleep(&interval_ts, NULL);
3025 return;
3026 }
3027
3026 nanosleep(&interval_ts, NULL);
3027 return;
3028 }
3029
3028 select_timeout = interval_tv;
3029 retval = select(1, &readfds, NULL, NULL, &select_timeout);
3030 tout = interval_tv;
3031 retval = select(1, &readfds, NULL, NULL, &tout);
3030
3031 if (retval == 1) {
3032 switch (getc(stdin)) {
3033 case 'q':
3034 exit_requested = 1;
3035 break;
3032
3033 if (retval == 1) {
3034 switch (getc(stdin)) {
3035 case 'q':
3036 exit_requested = 1;
3037 break;
3038 case EOF:
3039 /*
3040 * 'stdin' is a pipe closed on the other end. There
3041 * won't be any further input.
3042 */
3043 ignore_stdin = 1;
3044 /* Sleep the rest of the time */
3045 rest.tv_sec = (tout.tv_sec + tout.tv_usec / 1000000);
3046 rest.tv_nsec = (tout.tv_usec % 1000000) * 1000;
3047 nanosleep(&rest, NULL);
3036 }
3037 /* make sure this manually-invoked interval is at least 1ms long */
3038 nanosleep(&one_msec, NULL);
3039 }
3040}
3041
3042
3043void turbostat_loop()

--- 2730 unchanged lines hidden --- 		3048 }
3049 /* make sure this manually-invoked interval is at least 1ms long */
3050 nanosleep(&one_msec, NULL);
3051 }
3052}
3053
3054
3055void turbostat_loop()

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