turbostat.c (6397b6418935773a34b533b3348b03f4ce3d7050) turbostat.c (164d7a965b3e31b1ea109d2bf5dd68e1b41e020f)
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * turbostat -- show CPU frequency and C-state residency
4 * on modern Intel and AMD processors.
5 *
6 * Copyright (c) 2021 Intel Corporation.
7 * Len Brown <len.brown@intel.com>
8 */

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32#include <cpuid.h>
33#include <sys/capability.h>
34#include <errno.h>
35#include <math.h>
36#include <linux/perf_event.h>
37#include <asm/unistd.h>
38#include <stdbool.h>
39
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * turbostat -- show CPU frequency and C-state residency
4 * on modern Intel and AMD processors.
5 *
6 * Copyright (c) 2021 Intel Corporation.
7 * Len Brown <len.brown@intel.com>
8 */

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32#include <cpuid.h>
33#include <sys/capability.h>
34#include <errno.h>
35#include <math.h>
36#include <linux/perf_event.h>
37#include <asm/unistd.h>
38#include <stdbool.h>
39
40/*
41 * This list matches the column headers, except
42 * 1. built-in only, the sysfs counters are not here -- we learn of those at run-time
43 * 2. Core and CPU are moved to the end, we can't have strings that contain them
44 * matching on them for --show and --hide.
45 */
46
47/*
48 * buffer size used by sscanf() for added column names
49 * Usually truncated to 7 characters, but also handles 18 columns for raw 64-bit counters
50 */
51#define NAME_BYTES 20
52#define PATH_BYTES 128
53
54enum counter_scope { SCOPE_CPU, SCOPE_CORE, SCOPE_PACKAGE };
55enum counter_type { COUNTER_ITEMS, COUNTER_CYCLES, COUNTER_SECONDS, COUNTER_USEC };
56enum counter_format { FORMAT_RAW, FORMAT_DELTA, FORMAT_PERCENT };
57
58struct msr_counter {
59 unsigned int msr_num;
60 char name[NAME_BYTES];
61 char path[PATH_BYTES];
62 unsigned int width;
63 enum counter_type type;
64 enum counter_format format;
65 struct msr_counter *next;
66 unsigned int flags;
67#define FLAGS_HIDE (1 << 0)
68#define FLAGS_SHOW (1 << 1)
69#define SYSFS_PERCPU (1 << 1)
70};
71
72struct msr_counter bic[] = {
73 { 0x0, "usec" },
74 { 0x0, "Time_Of_Day_Seconds" },
75 { 0x0, "Package" },
76 { 0x0, "Node" },
77 { 0x0, "Avg_MHz" },
78 { 0x0, "Busy%" },
79 { 0x0, "Bzy_MHz" },
80 { 0x0, "TSC_MHz" },
81 { 0x0, "IRQ" },
82 { 0x0, "SMI", "", 32, 0, FORMAT_DELTA, NULL },
83 { 0x0, "sysfs" },
84 { 0x0, "CPU%c1" },
85 { 0x0, "CPU%c3" },
86 { 0x0, "CPU%c6" },
87 { 0x0, "CPU%c7" },
88 { 0x0, "ThreadC" },
89 { 0x0, "CoreTmp" },
90 { 0x0, "CoreCnt" },
91 { 0x0, "PkgTmp" },
92 { 0x0, "GFX%rc6" },
93 { 0x0, "GFXMHz" },
94 { 0x0, "Pkg%pc2" },
95 { 0x0, "Pkg%pc3" },
96 { 0x0, "Pkg%pc6" },
97 { 0x0, "Pkg%pc7" },
98 { 0x0, "Pkg%pc8" },
99 { 0x0, "Pkg%pc9" },
100 { 0x0, "Pk%pc10" },
101 { 0x0, "CPU%LPI" },
102 { 0x0, "SYS%LPI" },
103 { 0x0, "PkgWatt" },
104 { 0x0, "CorWatt" },
105 { 0x0, "GFXWatt" },
106 { 0x0, "PkgCnt" },
107 { 0x0, "RAMWatt" },
108 { 0x0, "PKG_%" },
109 { 0x0, "RAM_%" },
110 { 0x0, "Pkg_J" },
111 { 0x0, "Cor_J" },
112 { 0x0, "GFX_J" },
113 { 0x0, "RAM_J" },
114 { 0x0, "Mod%c6" },
115 { 0x0, "Totl%C0" },
116 { 0x0, "Any%C0" },
117 { 0x0, "GFX%C0" },
118 { 0x0, "CPUGFX%" },
119 { 0x0, "Core" },
120 { 0x0, "CPU" },
121 { 0x0, "APIC" },
122 { 0x0, "X2APIC" },
123 { 0x0, "Die" },
124 { 0x0, "GFXAMHz" },
125 { 0x0, "IPC" },
126 { 0x0, "CoreThr" },
127};
128
129#define MAX_BIC (sizeof(bic) / sizeof(struct msr_counter))
130#define BIC_USEC (1ULL << 0)
131#define BIC_TOD (1ULL << 1)
132#define BIC_Package (1ULL << 2)
133#define BIC_Node (1ULL << 3)
134#define BIC_Avg_MHz (1ULL << 4)
135#define BIC_Busy (1ULL << 5)
136#define BIC_Bzy_MHz (1ULL << 6)
137#define BIC_TSC_MHz (1ULL << 7)
138#define BIC_IRQ (1ULL << 8)
139#define BIC_SMI (1ULL << 9)
140#define BIC_sysfs (1ULL << 10)
141#define BIC_CPU_c1 (1ULL << 11)
142#define BIC_CPU_c3 (1ULL << 12)
143#define BIC_CPU_c6 (1ULL << 13)
144#define BIC_CPU_c7 (1ULL << 14)
145#define BIC_ThreadC (1ULL << 15)
146#define BIC_CoreTmp (1ULL << 16)
147#define BIC_CoreCnt (1ULL << 17)
148#define BIC_PkgTmp (1ULL << 18)
149#define BIC_GFX_rc6 (1ULL << 19)
150#define BIC_GFXMHz (1ULL << 20)
151#define BIC_Pkgpc2 (1ULL << 21)
152#define BIC_Pkgpc3 (1ULL << 22)
153#define BIC_Pkgpc6 (1ULL << 23)
154#define BIC_Pkgpc7 (1ULL << 24)
155#define BIC_Pkgpc8 (1ULL << 25)
156#define BIC_Pkgpc9 (1ULL << 26)
157#define BIC_Pkgpc10 (1ULL << 27)
158#define BIC_CPU_LPI (1ULL << 28)
159#define BIC_SYS_LPI (1ULL << 29)
160#define BIC_PkgWatt (1ULL << 30)
161#define BIC_CorWatt (1ULL << 31)
162#define BIC_GFXWatt (1ULL << 32)
163#define BIC_PkgCnt (1ULL << 33)
164#define BIC_RAMWatt (1ULL << 34)
165#define BIC_PKG__ (1ULL << 35)
166#define BIC_RAM__ (1ULL << 36)
167#define BIC_Pkg_J (1ULL << 37)
168#define BIC_Cor_J (1ULL << 38)
169#define BIC_GFX_J (1ULL << 39)
170#define BIC_RAM_J (1ULL << 40)
171#define BIC_Mod_c6 (1ULL << 41)
172#define BIC_Totl_c0 (1ULL << 42)
173#define BIC_Any_c0 (1ULL << 43)
174#define BIC_GFX_c0 (1ULL << 44)
175#define BIC_CPUGFX (1ULL << 45)
176#define BIC_Core (1ULL << 46)
177#define BIC_CPU (1ULL << 47)
178#define BIC_APIC (1ULL << 48)
179#define BIC_X2APIC (1ULL << 49)
180#define BIC_Die (1ULL << 50)
181#define BIC_GFXACTMHz (1ULL << 51)
182#define BIC_IPC (1ULL << 52)
183#define BIC_CORE_THROT_CNT (1ULL << 53)
184
185#define BIC_TOPOLOGY (BIC_Package | BIC_Node | BIC_CoreCnt | BIC_PkgCnt | BIC_Core | BIC_CPU | BIC_Die )
186#define BIC_THERMAL_PWR ( BIC_CoreTmp | BIC_PkgTmp | BIC_PkgWatt | BIC_CorWatt | BIC_GFXWatt | BIC_RAMWatt | BIC_PKG__ | BIC_RAM__)
187#define BIC_FREQUENCY ( BIC_Avg_MHz | BIC_Busy | BIC_Bzy_MHz | BIC_TSC_MHz | BIC_GFXMHz | BIC_GFXACTMHz )
188#define BIC_IDLE ( BIC_sysfs | BIC_CPU_c1 | BIC_CPU_c3 | BIC_CPU_c6 | BIC_CPU_c7 | BIC_GFX_rc6 | BIC_Pkgpc2 | BIC_Pkgpc3 | BIC_Pkgpc6 | BIC_Pkgpc7 | BIC_Pkgpc8 | BIC_Pkgpc9 | BIC_Pkgpc10 | BIC_CPU_LPI | BIC_SYS_LPI | BIC_Mod_c6 | BIC_Totl_c0 | BIC_Any_c0 | BIC_GFX_c0 | BIC_CPUGFX)
189#define BIC_OTHER ( BIC_IRQ | BIC_SMI | BIC_ThreadC | BIC_CoreTmp | BIC_IPC)
190
191#define BIC_DISABLED_BY_DEFAULT (BIC_USEC | BIC_TOD | BIC_APIC | BIC_X2APIC)
192
193unsigned long long bic_enabled = (0xFFFFFFFFFFFFFFFFULL & ~BIC_DISABLED_BY_DEFAULT);
194unsigned long long bic_present = BIC_USEC | BIC_TOD | BIC_sysfs | BIC_APIC | BIC_X2APIC;
195
196#define DO_BIC(COUNTER_NAME) (bic_enabled & bic_present & COUNTER_NAME)
197#define DO_BIC_READ(COUNTER_NAME) (bic_present & COUNTER_NAME)
198#define ENABLE_BIC(COUNTER_NAME) (bic_enabled |= COUNTER_NAME)
199#define BIC_PRESENT(COUNTER_BIT) (bic_present |= COUNTER_BIT)
200#define BIC_NOT_PRESENT(COUNTER_BIT) (bic_present &= ~COUNTER_BIT)
201#define BIC_IS_ENABLED(COUNTER_BIT) (bic_enabled & COUNTER_BIT)
202
40char *proc_stat = "/proc/stat";
41FILE *outf;
42int *fd_percpu;
43int *fd_instr_count_percpu;
44struct timeval interval_tv = { 5, 0 };
45struct timespec interval_ts = { 5, 0 };
46
47/* Save original CPU model */

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155
156/* MSRs that are not yet in the kernel-provided header. */
157#define MSR_RAPL_PWR_UNIT 0xc0010299
158#define MSR_CORE_ENERGY_STAT 0xc001029a
159#define MSR_PKG_ENERGY_STAT 0xc001029b
160
161#define MAX(a, b) ((a) > (b) ? (a) : (b))
162
203char *proc_stat = "/proc/stat";
204FILE *outf;
205int *fd_percpu;
206int *fd_instr_count_percpu;
207struct timeval interval_tv = { 5, 0 };
208struct timespec interval_ts = { 5, 0 };
209
210/* Save original CPU model */

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318
319/* MSRs that are not yet in the kernel-provided header. */
320#define MSR_RAPL_PWR_UNIT 0xc0010299
321#define MSR_CORE_ENERGY_STAT 0xc001029a
322#define MSR_PKG_ENERGY_STAT 0xc001029b
323
324#define MAX(a, b) ((a) > (b) ? (a) : (b))
325
163/*
164 * buffer size used by sscanf() for added column names
165 * Usually truncated to 7 characters, but also handles 18 columns for raw 64-bit counters
166 */
167#define NAME_BYTES 20
168#define PATH_BYTES 128
169
170int backwards_count;
171char *progname;
172
173#define CPU_SUBSET_MAXCPUS 1024 /* need to use before probe... */
174cpu_set_t *cpu_present_set, *cpu_affinity_set, *cpu_subset;
175size_t cpu_present_setsize, cpu_affinity_setsize, cpu_subset_size;
176#define MAX_ADDED_COUNTERS 8
177#define MAX_ADDED_THREAD_COUNTERS 24

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252#define GET_CORE(core_base, core_no, node_no, pkg_no) \
253 ((core_base) + \
254 ((pkg_no) * topo.nodes_per_pkg * topo.cores_per_node) + \
255 ((node_no) * topo.cores_per_node) + \
256 (core_no))
257
258#define GET_PKG(pkg_base, pkg_no) (pkg_base + pkg_no)
259
326int backwards_count;
327char *progname;
328
329#define CPU_SUBSET_MAXCPUS 1024 /* need to use before probe... */
330cpu_set_t *cpu_present_set, *cpu_affinity_set, *cpu_subset;
331size_t cpu_present_setsize, cpu_affinity_setsize, cpu_subset_size;
332#define MAX_ADDED_COUNTERS 8
333#define MAX_ADDED_THREAD_COUNTERS 24

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408#define GET_CORE(core_base, core_no, node_no, pkg_no) \
409 ((core_base) + \
410 ((pkg_no) * topo.nodes_per_pkg * topo.cores_per_node) + \
411 ((node_no) * topo.cores_per_node) + \
412 (core_no))
413
414#define GET_PKG(pkg_base, pkg_no) (pkg_base + pkg_no)
415
260enum counter_scope { SCOPE_CPU, SCOPE_CORE, SCOPE_PACKAGE };
261enum counter_type { COUNTER_ITEMS, COUNTER_CYCLES, COUNTER_SECONDS, COUNTER_USEC };
262enum counter_format { FORMAT_RAW, FORMAT_DELTA, FORMAT_PERCENT };
263
264struct msr_counter {
265 unsigned int msr_num;
266 char name[NAME_BYTES];
267 char path[PATH_BYTES];
268 unsigned int width;
269 enum counter_type type;
270 enum counter_format format;
271 struct msr_counter *next;
272 unsigned int flags;
273#define FLAGS_HIDE (1 << 0)
274#define FLAGS_SHOW (1 << 1)
275#define SYSFS_PERCPU (1 << 1)
276};
277
278/*
279 * The accumulated sum of MSR is defined as a monotonic
280 * increasing MSR, it will be accumulated periodically,
281 * despite its register's bit width.
282 */
283enum {
284 IDX_PKG_ENERGY,
285 IDX_DRAM_ENERGY,

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519
520 memset(&pea, 0, sizeof(struct perf_event_attr));
521 pea.type = PERF_TYPE_HARDWARE;
522 pea.size = sizeof(struct perf_event_attr);
523 pea.config = PERF_COUNT_HW_INSTRUCTIONS;
524
525 /* counter for cpu_num, including user + kernel and all processes */
526 fd = perf_event_open(&pea, -1, cpu_num, -1, 0);
416/*
417 * The accumulated sum of MSR is defined as a monotonic
418 * increasing MSR, it will be accumulated periodically,
419 * despite its register's bit width.
420 */
421enum {
422 IDX_PKG_ENERGY,
423 IDX_DRAM_ENERGY,

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657
658 memset(&pea, 0, sizeof(struct perf_event_attr));
659 pea.type = PERF_TYPE_HARDWARE;
660 pea.size = sizeof(struct perf_event_attr);
661 pea.config = PERF_COUNT_HW_INSTRUCTIONS;
662
663 /* counter for cpu_num, including user + kernel and all processes */
664 fd = perf_event_open(&pea, -1, cpu_num, -1, 0);
527 if (fd == -1)
528 err(-1, "cpu%d: perf instruction counter\n", cpu_num);
665 if (fd == -1) {
666 warn("cpu%d: perf instruction counter", cpu_num);
667 BIC_NOT_PRESENT(BIC_IPC);
668 }
529
530 return fd;
531}
532
533int get_instr_count_fd(int cpu)
534{
535 if (fd_instr_count_percpu[cpu])
536 return fd_instr_count_percpu[cpu];

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547 retval = pread(get_msr_fd(cpu), msr, sizeof(*msr), offset);
548
549 if (retval != sizeof *msr)
550 err(-1, "cpu%d: msr offset 0x%llx read failed", cpu, (unsigned long long)offset);
551
552 return 0;
553}
554
669
670 return fd;
671}
672
673int get_instr_count_fd(int cpu)
674{
675 if (fd_instr_count_percpu[cpu])
676 return fd_instr_count_percpu[cpu];

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687 retval = pread(get_msr_fd(cpu), msr, sizeof(*msr), offset);
688
689 if (retval != sizeof *msr)
690 err(-1, "cpu%d: msr offset 0x%llx read failed", cpu, (unsigned long long)offset);
691
692 return 0;
693}
694
555/*
556 * This list matches the column headers, except
557 * 1. built-in only, the sysfs counters are not here -- we learn of those at run-time
558 * 2. Core and CPU are moved to the end, we can't have strings that contain them
559 * matching on them for --show and --hide.
560 */
561struct msr_counter bic[] = {
562 { 0x0, "usec" },
563 { 0x0, "Time_Of_Day_Seconds" },
564 { 0x0, "Package" },
565 { 0x0, "Node" },
566 { 0x0, "Avg_MHz" },
567 { 0x0, "Busy%" },
568 { 0x0, "Bzy_MHz" },
569 { 0x0, "TSC_MHz" },
570 { 0x0, "IRQ" },
571 { 0x0, "SMI", "", 32, 0, FORMAT_DELTA, NULL },
572 { 0x0, "sysfs" },
573 { 0x0, "CPU%c1" },
574 { 0x0, "CPU%c3" },
575 { 0x0, "CPU%c6" },
576 { 0x0, "CPU%c7" },
577 { 0x0, "ThreadC" },
578 { 0x0, "CoreTmp" },
579 { 0x0, "CoreCnt" },
580 { 0x0, "PkgTmp" },
581 { 0x0, "GFX%rc6" },
582 { 0x0, "GFXMHz" },
583 { 0x0, "Pkg%pc2" },
584 { 0x0, "Pkg%pc3" },
585 { 0x0, "Pkg%pc6" },
586 { 0x0, "Pkg%pc7" },
587 { 0x0, "Pkg%pc8" },
588 { 0x0, "Pkg%pc9" },
589 { 0x0, "Pk%pc10" },
590 { 0x0, "CPU%LPI" },
591 { 0x0, "SYS%LPI" },
592 { 0x0, "PkgWatt" },
593 { 0x0, "CorWatt" },
594 { 0x0, "GFXWatt" },
595 { 0x0, "PkgCnt" },
596 { 0x0, "RAMWatt" },
597 { 0x0, "PKG_%" },
598 { 0x0, "RAM_%" },
599 { 0x0, "Pkg_J" },
600 { 0x0, "Cor_J" },
601 { 0x0, "GFX_J" },
602 { 0x0, "RAM_J" },
603 { 0x0, "Mod%c6" },
604 { 0x0, "Totl%C0" },
605 { 0x0, "Any%C0" },
606 { 0x0, "GFX%C0" },
607 { 0x0, "CPUGFX%" },
608 { 0x0, "Core" },
609 { 0x0, "CPU" },
610 { 0x0, "APIC" },
611 { 0x0, "X2APIC" },
612 { 0x0, "Die" },
613 { 0x0, "GFXAMHz" },
614 { 0x0, "IPC" },
615 { 0x0, "CoreThr" },
616};
617
618#define MAX_BIC (sizeof(bic) / sizeof(struct msr_counter))
619#define BIC_USEC (1ULL << 0)
620#define BIC_TOD (1ULL << 1)
621#define BIC_Package (1ULL << 2)
622#define BIC_Node (1ULL << 3)
623#define BIC_Avg_MHz (1ULL << 4)
624#define BIC_Busy (1ULL << 5)
625#define BIC_Bzy_MHz (1ULL << 6)
626#define BIC_TSC_MHz (1ULL << 7)
627#define BIC_IRQ (1ULL << 8)
628#define BIC_SMI (1ULL << 9)
629#define BIC_sysfs (1ULL << 10)
630#define BIC_CPU_c1 (1ULL << 11)
631#define BIC_CPU_c3 (1ULL << 12)
632#define BIC_CPU_c6 (1ULL << 13)
633#define BIC_CPU_c7 (1ULL << 14)
634#define BIC_ThreadC (1ULL << 15)
635#define BIC_CoreTmp (1ULL << 16)
636#define BIC_CoreCnt (1ULL << 17)
637#define BIC_PkgTmp (1ULL << 18)
638#define BIC_GFX_rc6 (1ULL << 19)
639#define BIC_GFXMHz (1ULL << 20)
640#define BIC_Pkgpc2 (1ULL << 21)
641#define BIC_Pkgpc3 (1ULL << 22)
642#define BIC_Pkgpc6 (1ULL << 23)
643#define BIC_Pkgpc7 (1ULL << 24)
644#define BIC_Pkgpc8 (1ULL << 25)
645#define BIC_Pkgpc9 (1ULL << 26)
646#define BIC_Pkgpc10 (1ULL << 27)
647#define BIC_CPU_LPI (1ULL << 28)
648#define BIC_SYS_LPI (1ULL << 29)
649#define BIC_PkgWatt (1ULL << 30)
650#define BIC_CorWatt (1ULL << 31)
651#define BIC_GFXWatt (1ULL << 32)
652#define BIC_PkgCnt (1ULL << 33)
653#define BIC_RAMWatt (1ULL << 34)
654#define BIC_PKG__ (1ULL << 35)
655#define BIC_RAM__ (1ULL << 36)
656#define BIC_Pkg_J (1ULL << 37)
657#define BIC_Cor_J (1ULL << 38)
658#define BIC_GFX_J (1ULL << 39)
659#define BIC_RAM_J (1ULL << 40)
660#define BIC_Mod_c6 (1ULL << 41)
661#define BIC_Totl_c0 (1ULL << 42)
662#define BIC_Any_c0 (1ULL << 43)
663#define BIC_GFX_c0 (1ULL << 44)
664#define BIC_CPUGFX (1ULL << 45)
665#define BIC_Core (1ULL << 46)
666#define BIC_CPU (1ULL << 47)
667#define BIC_APIC (1ULL << 48)
668#define BIC_X2APIC (1ULL << 49)
669#define BIC_Die (1ULL << 50)
670#define BIC_GFXACTMHz (1ULL << 51)
671#define BIC_IPC (1ULL << 52)
672#define BIC_CORE_THROT_CNT (1ULL << 53)
673
674#define BIC_TOPOLOGY (BIC_Package | BIC_Node | BIC_CoreCnt | BIC_PkgCnt | BIC_Core | BIC_CPU | BIC_Die )
675#define BIC_THERMAL_PWR ( BIC_CoreTmp | BIC_PkgTmp | BIC_PkgWatt | BIC_CorWatt | BIC_GFXWatt | BIC_RAMWatt | BIC_PKG__ | BIC_RAM__)
676#define BIC_FREQUENCY ( BIC_Avg_MHz | BIC_Busy | BIC_Bzy_MHz | BIC_TSC_MHz | BIC_GFXMHz | BIC_GFXACTMHz )
677#define BIC_IDLE ( BIC_sysfs | BIC_CPU_c1 | BIC_CPU_c3 | BIC_CPU_c6 | BIC_CPU_c7 | BIC_GFX_rc6 | BIC_Pkgpc2 | BIC_Pkgpc3 | BIC_Pkgpc6 | BIC_Pkgpc7 | BIC_Pkgpc8 | BIC_Pkgpc9 | BIC_Pkgpc10 | BIC_CPU_LPI | BIC_SYS_LPI | BIC_Mod_c6 | BIC_Totl_c0 | BIC_Any_c0 | BIC_GFX_c0 | BIC_CPUGFX)
678#define BIC_OTHER ( BIC_IRQ | BIC_SMI | BIC_ThreadC | BIC_CoreTmp | BIC_IPC)
679
680#define BIC_DISABLED_BY_DEFAULT (BIC_USEC | BIC_TOD | BIC_APIC | BIC_X2APIC)
681
682unsigned long long bic_enabled = (0xFFFFFFFFFFFFFFFFULL & ~BIC_DISABLED_BY_DEFAULT);
683unsigned long long bic_present = BIC_USEC | BIC_TOD | BIC_sysfs | BIC_APIC | BIC_X2APIC;
684
685#define DO_BIC(COUNTER_NAME) (bic_enabled & bic_present & COUNTER_NAME)
686#define DO_BIC_READ(COUNTER_NAME) (bic_present & COUNTER_NAME)
687#define ENABLE_BIC(COUNTER_NAME) (bic_enabled |= COUNTER_NAME)
688#define BIC_PRESENT(COUNTER_BIT) (bic_present |= COUNTER_BIT)
689#define BIC_NOT_PRESENT(COUNTER_BIT) (bic_present &= ~COUNTER_BIT)
690#define BIC_IS_ENABLED(COUNTER_BIT) (bic_enabled & COUNTER_BIT)
691
692#define MAX_DEFERRED 16
693char *deferred_add_names[MAX_DEFERRED];
694char *deferred_skip_names[MAX_DEFERRED];
695int deferred_add_index;
696int deferred_skip_index;
697
698/*
699 * HIDE_LIST - hide this list of counters, show the rest [default]

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786 }
787
788 }
789 if (i == MAX_BIC) {
790 if (mode == SHOW_LIST) {
791 deferred_add_names[deferred_add_index++] = name_list;
792 if (deferred_add_index >= MAX_DEFERRED) {
793 fprintf(stderr, "More than max %d un-recognized --add options '%s'\n",
695#define MAX_DEFERRED 16
696char *deferred_add_names[MAX_DEFERRED];
697char *deferred_skip_names[MAX_DEFERRED];
698int deferred_add_index;
699int deferred_skip_index;
700
701/*
702 * HIDE_LIST - hide this list of counters, show the rest [default]

--- 86 unchanged lines hidden (view full) ---

789 }
790
791 }
792 if (i == MAX_BIC) {
793 if (mode == SHOW_LIST) {
794 deferred_add_names[deferred_add_index++] = name_list;
795 if (deferred_add_index >= MAX_DEFERRED) {
796 fprintf(stderr, "More than max %d un-recognized --add options '%s'\n",
794 MAX_DEFERRED, name_list);
797 MAX_DEFERRED, name_list);
795 help();
796 exit(1);
797 }
798 } else {
799 deferred_skip_names[deferred_skip_index++] = name_list;
800 if (debug)
801 fprintf(stderr, "deferred \"%s\"\n", name_list);
802 if (deferred_skip_index >= MAX_DEFERRED) {
803 fprintf(stderr, "More than max %d un-recognized --skip options '%s'\n",
798 help();
799 exit(1);
800 }
801 } else {
802 deferred_skip_names[deferred_skip_index++] = name_list;
803 if (debug)
804 fprintf(stderr, "deferred \"%s\"\n", name_list);
805 if (deferred_skip_index >= MAX_DEFERRED) {
806 fprintf(stderr, "More than max %d un-recognized --skip options '%s'\n",
804 MAX_DEFERRED, name_list);
807 MAX_DEFERRED, name_list);
805 help();
806 exit(1);
807 }
808 }
809 }
810
811 name_list = comma;
812 if (name_list)

--- 2675 unchanged lines hidden (view full) ---

3488 timer_delete(timerid);
3489release_msr:
3490 free(per_cpu_msr_sum);
3491}
3492
3493/*
3494 * set_my_sched_priority(pri)
3495 * return previous
808 help();
809 exit(1);
810 }
811 }
812 }
813
814 name_list = comma;
815 if (name_list)

--- 2675 unchanged lines hidden (view full) ---

3491 timer_delete(timerid);
3492release_msr:
3493 free(per_cpu_msr_sum);
3494}
3495
3496/*
3497 * set_my_sched_priority(pri)
3498 * return previous
3499 *
3500 * if non-root, do this:
3501 * # /sbin/setcap cap_sys_rawio,cap_sys_nice=+ep /usr/bin/turbostat
3496 */
3497int set_my_sched_priority(int priority)
3498{
3499 int retval;
3500 int original_priority;
3501
3502 errno = 0;
3503 original_priority = getpriority(PRIO_PROCESS, 0);
3504 if (errno && (original_priority == -1))
3505 err(errno, "getpriority");
3506
3507 retval = setpriority(PRIO_PROCESS, 0, priority);
3508 if (retval)
3509 err(retval, "setpriority(%d)", priority);
3510
3511 errno = 0;
3512 retval = getpriority(PRIO_PROCESS, 0);
3513 if (retval != priority)
3502 */
3503int set_my_sched_priority(int priority)
3504{
3505 int retval;
3506 int original_priority;
3507
3508 errno = 0;
3509 original_priority = getpriority(PRIO_PROCESS, 0);
3510 if (errno && (original_priority == -1))
3511 err(errno, "getpriority");
3512
3513 retval = setpriority(PRIO_PROCESS, 0, priority);
3514 if (retval)
3515 err(retval, "setpriority(%d)", priority);
3516
3517 errno = 0;
3518 retval = getpriority(PRIO_PROCESS, 0);
3519 if (retval != priority)
3514 err(-1, "getpriority(%d) != setpriority(%d)", retval, priority);
3520 err(retval, "getpriority(%d) != setpriority(%d)", retval, priority);
3515
3516 return original_priority;
3517}
3518
3519void turbostat_loop()
3520{
3521 int retval;
3522 int restarted = 0;

--- 1301 unchanged lines hidden (view full) ---

4824 (1.0 + (((msr >> 54) & 0x3) / 4.0)) * (1 << ((msr >> 49) & 0x1F)) * rapl_time_units,
4825 ((msr >> 48) & 1) ? "EN" : "DIS");
4826
4827 if (get_msr(cpu, MSR_VR_CURRENT_CONFIG, &msr))
4828 return -9;
4829
4830 fprintf(outf, "cpu%d: MSR_VR_CURRENT_CONFIG: 0x%08llx\n", cpu, msr);
4831 fprintf(outf, "cpu%d: PKG Limit #4: %f Watts (%slocked)\n",
3521
3522 return original_priority;
3523}
3524
3525void turbostat_loop()
3526{
3527 int retval;
3528 int restarted = 0;

--- 1301 unchanged lines hidden (view full) ---

4830 (1.0 + (((msr >> 54) & 0x3) / 4.0)) * (1 << ((msr >> 49) & 0x1F)) * rapl_time_units,
4831 ((msr >> 48) & 1) ? "EN" : "DIS");
4832
4833 if (get_msr(cpu, MSR_VR_CURRENT_CONFIG, &msr))
4834 return -9;
4835
4836 fprintf(outf, "cpu%d: MSR_VR_CURRENT_CONFIG: 0x%08llx\n", cpu, msr);
4837 fprintf(outf, "cpu%d: PKG Limit #4: %f Watts (%slocked)\n",
4832 cpu,
4833 ((msr >> 0) & 0x1FFF) * rapl_power_units,
4834 (msr >> 31) & 1 ? "" : "UN");
4838 cpu, ((msr >> 0) & 0x1FFF) * rapl_power_units, (msr >> 31) & 1 ? "" : "UN");
4835 }
4836
4837 if (do_rapl & RAPL_DRAM_POWER_INFO) {
4838 if (get_msr(cpu, MSR_DRAM_POWER_INFO, &msr))
4839 return -6;
4840
4841 fprintf(outf, "cpu%d: MSR_DRAM_POWER_INFO,: 0x%08llx (%.0f W TDP, RAPL %.0f - %.0f W, %f sec.)\n",
4842 cpu, msr,

--- 1117 unchanged lines hidden (view full) ---

5960 for_all_cpus(get_cpu_type, ODD_COUNTERS);
5961 for_all_cpus(get_cpu_type, EVEN_COUNTERS);
5962
5963 if (!quiet)
5964 for_all_cpus(print_thermal, ODD_COUNTERS);
5965
5966 if (!quiet && do_irtl_snb)
5967 print_irtl();
4839 }
4840
4841 if (do_rapl & RAPL_DRAM_POWER_INFO) {
4842 if (get_msr(cpu, MSR_DRAM_POWER_INFO, &msr))
4843 return -6;
4844
4845 fprintf(outf, "cpu%d: MSR_DRAM_POWER_INFO,: 0x%08llx (%.0f W TDP, RAPL %.0f - %.0f W, %f sec.)\n",
4846 cpu, msr,

--- 1117 unchanged lines hidden (view full) ---

5964 for_all_cpus(get_cpu_type, ODD_COUNTERS);
5965 for_all_cpus(get_cpu_type, EVEN_COUNTERS);
5966
5967 if (!quiet)
5968 for_all_cpus(print_thermal, ODD_COUNTERS);
5969
5970 if (!quiet && do_irtl_snb)
5971 print_irtl();
5972
5973 if (DO_BIC(BIC_IPC))
5974 (void)get_instr_count_fd(base_cpu);
5968}
5969
5970int fork_it(char **argv)
5971{
5972 pid_t child_pid;
5973 int status;
5974
5975 snapshot_proc_sysfs_files();

--- 500 unchanged lines hidden (view full) ---

6476 fprintf(outf, "iterations %d should be positive number\n", num_iterations);
6477 exit(2);
6478 }
6479 break;
6480 case 'N':
6481 header_iterations = strtod(optarg, NULL);
6482
6483 if (header_iterations <= 0) {
5975}
5976
5977int fork_it(char **argv)
5978{
5979 pid_t child_pid;
5980 int status;
5981
5982 snapshot_proc_sysfs_files();

--- 500 unchanged lines hidden (view full) ---

6483 fprintf(outf, "iterations %d should be positive number\n", num_iterations);
6484 exit(2);
6485 }
6486 break;
6487 case 'N':
6488 header_iterations = strtod(optarg, NULL);
6489
6490 if (header_iterations <= 0) {
6484 fprintf(outf, "iterations %d should be positive number\n",
6485 header_iterations);
6491 fprintf(outf, "iterations %d should be positive number\n", header_iterations);
6486 exit(2);
6487 }
6488 break;
6489 case 's':
6490 /*
6491 * --show: show only those specified
6492 * The 1st invocation will clear and replace the enabled mask
6493 * subsequent invocations can add to it.

--- 56 unchanged lines hidden --- 		6492 exit(2);
6493 }
6494 break;
6495 case 's':
6496 /*
6497 * --show: show only those specified
6498 * The 1st invocation will clear and replace the enabled mask
6499 * subsequent invocations can add to it.

--- 56 unchanged lines hidden ---