turbostat.c (5bbac26eae35065a9b2a5279118daad14f88eae9) turbostat.c (ddadb8adea76e6168c55850f2066e441880fb3d5)
1/*
2 * turbostat -- show CPU frequency and C-state residency
3 * on modern Intel turbo-capable processors.
4 *
5 * Copyright (c) 2013 Intel Corporation.
6 * Len Brown <len.brown@intel.com>
7 *
8 * This program is free software; you can redistribute it and/or modify it

--- 3154 unchanged lines hidden (view full) ---

3163void decode_misc_pwr_mgmt_msr(void)
3164{
3165 unsigned long long msr;
3166
3167 if (!do_nhm_platform_info)
3168 return;
3169
3170 if (!get_msr(base_cpu, MSR_MISC_PWR_MGMT, &msr))
1/*
2 * turbostat -- show CPU frequency and C-state residency
3 * on modern Intel turbo-capable processors.
4 *
5 * Copyright (c) 2013 Intel Corporation.
6 * Len Brown <len.brown@intel.com>
7 *
8 * This program is free software; you can redistribute it and/or modify it

--- 3154 unchanged lines hidden (view full) ---

3163void decode_misc_pwr_mgmt_msr(void)
3164{
3165 unsigned long long msr;
3166
3167 if (!do_nhm_platform_info)
3168 return;
3169
3170 if (!get_msr(base_cpu, MSR_MISC_PWR_MGMT, &msr))
3171 fprintf(outf, "cpu%d: MSR_MISC_PWR_MGMT: 0x%08llx (%sable-EIST_Coordination %sable-EPB)\n",
3171 fprintf(outf, "cpu%d: MSR_MISC_PWR_MGMT: 0x%08llx (%sable-EIST_Coordination %sable-EPB %sable-OOB)\n",
3172 base_cpu, msr,
3173 msr & (1 << 0) ? "DIS" : "EN",
3172 base_cpu, msr,
3173 msr & (1 << 0) ? "DIS" : "EN",
3174 msr & (1 << 1) ? "EN" : "DIS");
3174 msr & (1 << 1) ? "EN" : "DIS",
3175 msr & (1 << 8) ? "EN" : "DIS");
3175}
3176
3177void process_cpuid()
3178{
3179 unsigned int eax, ebx, ecx, edx, max_level, max_extended_level;
3180 unsigned int fms, family, model, stepping;
3181
3182 eax = ebx = ecx = edx = 0;

--- 663 unchanged lines hidden --- 		3176}
3177
3178void process_cpuid()
3179{
3180 unsigned int eax, ebx, ecx, edx, max_level, max_extended_level;
3181 unsigned int fms, family, model, stepping;
3182
3183 eax = ebx = ecx = edx = 0;

--- 663 unchanged lines hidden ---