turbostat.c (445640a563493f28d15f47e151e671281101e7dc) | turbostat.c (f5a4c76ad7de96d47baef3d8810a88b10d60ec82) |
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1/* 2 * turbostat -- show CPU frequency and C-state residency 3 * on modern Intel and AMD processors. 4 * 5 * Copyright (c) 2013 Intel Corporation. 6 * Len Brown <len.brown@intel.com> 7 * 8 * This program is free software; you can redistribute it and/or modify it --- 3123 unchanged lines hidden (view full) --- 3132 return 0; 3133 3134 if (family != 6) 3135 return 0; 3136 3137 bclk = discover_bclk(family, model); 3138 3139 switch (model) { | 1/* 2 * turbostat -- show CPU frequency and C-state residency 3 * on modern Intel and AMD processors. 4 * 5 * Copyright (c) 2013 Intel Corporation. 6 * Len Brown <len.brown@intel.com> 7 * 8 * This program is free software; you can redistribute it and/or modify it --- 3123 unchanged lines hidden (view full) --- 3132 return 0; 3133 3134 if (family != 6) 3135 return 0; 3136 3137 bclk = discover_bclk(family, model); 3138 3139 switch (model) { |
3140 case INTEL_FAM6_NEHALEM_EP: /* Core i7, Xeon 5500 series - Bloomfield, Gainstown NHM-EP */ | |
3141 case INTEL_FAM6_NEHALEM: /* Core i7 and i5 Processor - Clarksfield, Lynnfield, Jasper Forest */ | 3140 case INTEL_FAM6_NEHALEM: /* Core i7 and i5 Processor - Clarksfield, Lynnfield, Jasper Forest */ |
3142 case 0x1F: /* Core i7 and i5 Processor - Nehalem */ 3143 case INTEL_FAM6_WESTMERE: /* Westmere Client - Clarkdale, Arrandale */ 3144 case INTEL_FAM6_WESTMERE_EP: /* Westmere EP - Gulftown */ | |
3145 case INTEL_FAM6_NEHALEM_EX: /* Nehalem-EX Xeon - Beckton */ | 3141 case INTEL_FAM6_NEHALEM_EX: /* Nehalem-EX Xeon - Beckton */ |
3146 case INTEL_FAM6_WESTMERE_EX: /* Westmere-EX Xeon - Eagleton */ | |
3147 pkg_cstate_limits = nhm_pkg_cstate_limits; 3148 break; 3149 case INTEL_FAM6_SANDYBRIDGE: /* SNB */ 3150 case INTEL_FAM6_SANDYBRIDGE_X: /* SNB Xeon */ 3151 case INTEL_FAM6_IVYBRIDGE: /* IVB */ 3152 case INTEL_FAM6_IVYBRIDGE_X: /* IVB Xeon */ 3153 pkg_cstate_limits = snb_pkg_cstate_limits; 3154 has_misc_feature_control = 1; 3155 break; 3156 case INTEL_FAM6_HASWELL_CORE: /* HSW */ 3157 case INTEL_FAM6_HASWELL_X: /* HSX */ | 3142 pkg_cstate_limits = nhm_pkg_cstate_limits; 3143 break; 3144 case INTEL_FAM6_SANDYBRIDGE: /* SNB */ 3145 case INTEL_FAM6_SANDYBRIDGE_X: /* SNB Xeon */ 3146 case INTEL_FAM6_IVYBRIDGE: /* IVB */ 3147 case INTEL_FAM6_IVYBRIDGE_X: /* IVB Xeon */ 3148 pkg_cstate_limits = snb_pkg_cstate_limits; 3149 has_misc_feature_control = 1; 3150 break; 3151 case INTEL_FAM6_HASWELL_CORE: /* HSW */ 3152 case INTEL_FAM6_HASWELL_X: /* HSX */ |
3158 case INTEL_FAM6_HASWELL_ULT: /* HSW */ | |
3159 case INTEL_FAM6_HASWELL_GT3E: /* HSW */ 3160 case INTEL_FAM6_BROADWELL_CORE: /* BDW */ 3161 case INTEL_FAM6_BROADWELL_GT3E: /* BDW */ 3162 case INTEL_FAM6_BROADWELL_X: /* BDX */ | 3153 case INTEL_FAM6_HASWELL_GT3E: /* HSW */ 3154 case INTEL_FAM6_BROADWELL_CORE: /* BDW */ 3155 case INTEL_FAM6_BROADWELL_GT3E: /* BDW */ 3156 case INTEL_FAM6_BROADWELL_X: /* BDX */ |
3163 case INTEL_FAM6_BROADWELL_XEON_D: /* BDX-DE */ | |
3164 case INTEL_FAM6_SKYLAKE_MOBILE: /* SKL */ | 3157 case INTEL_FAM6_SKYLAKE_MOBILE: /* SKL */ |
3165 case INTEL_FAM6_SKYLAKE_DESKTOP: /* SKL */ 3166 case INTEL_FAM6_KABYLAKE_MOBILE: /* KBL */ 3167 case INTEL_FAM6_KABYLAKE_DESKTOP: /* KBL */ | |
3168 case INTEL_FAM6_CANNONLAKE_MOBILE: /* CNL */ 3169 pkg_cstate_limits = hsw_pkg_cstate_limits; 3170 has_misc_feature_control = 1; 3171 break; 3172 case INTEL_FAM6_SKYLAKE_X: /* SKX */ 3173 pkg_cstate_limits = skx_pkg_cstate_limits; 3174 has_misc_feature_control = 1; 3175 break; 3176 case INTEL_FAM6_ATOM_SILVERMONT: /* BYT */ 3177 no_MSR_MISC_PWR_MGMT = 1; 3178 case INTEL_FAM6_ATOM_SILVERMONT_X: /* AVN */ 3179 pkg_cstate_limits = slv_pkg_cstate_limits; 3180 break; 3181 case INTEL_FAM6_ATOM_AIRMONT: /* AMT */ 3182 pkg_cstate_limits = amt_pkg_cstate_limits; 3183 no_MSR_MISC_PWR_MGMT = 1; 3184 break; 3185 case INTEL_FAM6_XEON_PHI_KNL: /* PHI */ | 3158 case INTEL_FAM6_CANNONLAKE_MOBILE: /* CNL */ 3159 pkg_cstate_limits = hsw_pkg_cstate_limits; 3160 has_misc_feature_control = 1; 3161 break; 3162 case INTEL_FAM6_SKYLAKE_X: /* SKX */ 3163 pkg_cstate_limits = skx_pkg_cstate_limits; 3164 has_misc_feature_control = 1; 3165 break; 3166 case INTEL_FAM6_ATOM_SILVERMONT: /* BYT */ 3167 no_MSR_MISC_PWR_MGMT = 1; 3168 case INTEL_FAM6_ATOM_SILVERMONT_X: /* AVN */ 3169 pkg_cstate_limits = slv_pkg_cstate_limits; 3170 break; 3171 case INTEL_FAM6_ATOM_AIRMONT: /* AMT */ 3172 pkg_cstate_limits = amt_pkg_cstate_limits; 3173 no_MSR_MISC_PWR_MGMT = 1; 3174 break; 3175 case INTEL_FAM6_XEON_PHI_KNL: /* PHI */ |
3186 case INTEL_FAM6_XEON_PHI_KNM: | |
3187 pkg_cstate_limits = phi_pkg_cstate_limits; 3188 break; 3189 case INTEL_FAM6_ATOM_GOLDMONT: /* BXT */ 3190 case INTEL_FAM6_ATOM_GOLDMONT_PLUS: 3191 case INTEL_FAM6_ATOM_GOLDMONT_X: /* DNV */ 3192 pkg_cstate_limits = glm_pkg_cstate_limits; 3193 break; 3194 default: --- 44 unchanged lines hidden (view full) --- 3239int is_bdx(unsigned int family, unsigned int model) 3240{ 3241 3242 if (!genuine_intel) 3243 return 0; 3244 3245 switch (model) { 3246 case INTEL_FAM6_BROADWELL_X: | 3176 pkg_cstate_limits = phi_pkg_cstate_limits; 3177 break; 3178 case INTEL_FAM6_ATOM_GOLDMONT: /* BXT */ 3179 case INTEL_FAM6_ATOM_GOLDMONT_PLUS: 3180 case INTEL_FAM6_ATOM_GOLDMONT_X: /* DNV */ 3181 pkg_cstate_limits = glm_pkg_cstate_limits; 3182 break; 3183 default: --- 44 unchanged lines hidden (view full) --- 3228int is_bdx(unsigned int family, unsigned int model) 3229{ 3230 3231 if (!genuine_intel) 3232 return 0; 3233 3234 switch (model) { 3235 case INTEL_FAM6_BROADWELL_X: |
3247 case INTEL_FAM6_BROADWELL_XEON_D: | |
3248 return 1; 3249 } 3250 return 0; 3251} 3252int is_skx(unsigned int family, unsigned int model) 3253{ 3254 3255 if (!genuine_intel) --- 9 unchanged lines hidden (view full) --- 3265int has_turbo_ratio_limit(unsigned int family, unsigned int model) 3266{ 3267 if (has_slv_msrs(family, model)) 3268 return 0; 3269 3270 switch (model) { 3271 /* Nehalem compatible, but do not include turbo-ratio limit support */ 3272 case INTEL_FAM6_NEHALEM_EX: /* Nehalem-EX Xeon - Beckton */ | 3236 return 1; 3237 } 3238 return 0; 3239} 3240int is_skx(unsigned int family, unsigned int model) 3241{ 3242 3243 if (!genuine_intel) --- 9 unchanged lines hidden (view full) --- 3253int has_turbo_ratio_limit(unsigned int family, unsigned int model) 3254{ 3255 if (has_slv_msrs(family, model)) 3256 return 0; 3257 3258 switch (model) { 3259 /* Nehalem compatible, but do not include turbo-ratio limit support */ 3260 case INTEL_FAM6_NEHALEM_EX: /* Nehalem-EX Xeon - Beckton */ |
3273 case INTEL_FAM6_WESTMERE_EX: /* Westmere-EX Xeon - Eagleton */ | |
3274 case INTEL_FAM6_XEON_PHI_KNL: /* PHI - Knights Landing (different MSR definition) */ | 3261 case INTEL_FAM6_XEON_PHI_KNL: /* PHI - Knights Landing (different MSR definition) */ |
3275 case INTEL_FAM6_XEON_PHI_KNM: | |
3276 return 0; 3277 default: 3278 return 1; 3279 } 3280} 3281int has_atom_turbo_ratio_limit(unsigned int family, unsigned int model) 3282{ 3283 if (has_slv_msrs(family, model)) --- 38 unchanged lines hidden (view full) --- 3322 if (!genuine_intel) 3323 return 0; 3324 3325 if (family != 6) 3326 return 0; 3327 3328 switch (model) { 3329 case INTEL_FAM6_XEON_PHI_KNL: /* Knights Landing */ | 3262 return 0; 3263 default: 3264 return 1; 3265 } 3266} 3267int has_atom_turbo_ratio_limit(unsigned int family, unsigned int model) 3268{ 3269 if (has_slv_msrs(family, model)) --- 38 unchanged lines hidden (view full) --- 3308 if (!genuine_intel) 3309 return 0; 3310 3311 if (family != 6) 3312 return 0; 3313 3314 switch (model) { 3315 case INTEL_FAM6_XEON_PHI_KNL: /* Knights Landing */ |
3330 case INTEL_FAM6_XEON_PHI_KNM: | |
3331 return 1; 3332 default: 3333 return 0; 3334 } 3335} 3336int has_glm_turbo_ratio_limit(unsigned int family, unsigned int model) 3337{ 3338 if (!genuine_intel) --- 17 unchanged lines hidden (view full) --- 3356 3357 if (family != 6) 3358 return 0; 3359 3360 switch (model) { 3361 case INTEL_FAM6_IVYBRIDGE: /* IVB */ 3362 case INTEL_FAM6_HASWELL_CORE: /* HSW */ 3363 case INTEL_FAM6_HASWELL_X: /* HSX */ | 3316 return 1; 3317 default: 3318 return 0; 3319 } 3320} 3321int has_glm_turbo_ratio_limit(unsigned int family, unsigned int model) 3322{ 3323 if (!genuine_intel) --- 17 unchanged lines hidden (view full) --- 3341 3342 if (family != 6) 3343 return 0; 3344 3345 switch (model) { 3346 case INTEL_FAM6_IVYBRIDGE: /* IVB */ 3347 case INTEL_FAM6_HASWELL_CORE: /* HSW */ 3348 case INTEL_FAM6_HASWELL_X: /* HSX */ |
3364 case INTEL_FAM6_HASWELL_ULT: /* HSW */ | |
3365 case INTEL_FAM6_HASWELL_GT3E: /* HSW */ 3366 case INTEL_FAM6_BROADWELL_CORE: /* BDW */ 3367 case INTEL_FAM6_BROADWELL_GT3E: /* BDW */ 3368 case INTEL_FAM6_BROADWELL_X: /* BDX */ | 3349 case INTEL_FAM6_HASWELL_GT3E: /* HSW */ 3350 case INTEL_FAM6_BROADWELL_CORE: /* BDW */ 3351 case INTEL_FAM6_BROADWELL_GT3E: /* BDW */ 3352 case INTEL_FAM6_BROADWELL_X: /* BDX */ |
3369 case INTEL_FAM6_BROADWELL_XEON_D: /* BDX-DE */ | |
3370 case INTEL_FAM6_SKYLAKE_MOBILE: /* SKL */ | 3353 case INTEL_FAM6_SKYLAKE_MOBILE: /* SKL */ |
3371 case INTEL_FAM6_SKYLAKE_DESKTOP: /* SKL */ 3372 case INTEL_FAM6_KABYLAKE_MOBILE: /* KBL */ 3373 case INTEL_FAM6_KABYLAKE_DESKTOP: /* KBL */ | |
3374 case INTEL_FAM6_CANNONLAKE_MOBILE: /* CNL */ 3375 case INTEL_FAM6_SKYLAKE_X: /* SKX */ 3376 3377 case INTEL_FAM6_XEON_PHI_KNL: /* Knights Landing */ | 3354 case INTEL_FAM6_CANNONLAKE_MOBILE: /* CNL */ 3355 case INTEL_FAM6_SKYLAKE_X: /* SKX */ 3356 3357 case INTEL_FAM6_XEON_PHI_KNL: /* Knights Landing */ |
3378 case INTEL_FAM6_XEON_PHI_KNM: | |
3379 return 1; 3380 default: 3381 return 0; 3382 } 3383} 3384 3385static void 3386dump_cstate_pstate_config_info(unsigned int family, unsigned int model) --- 376 unchanged lines hidden (view full) --- 3763static double 3764rapl_dram_energy_units_probe(int model, double rapl_energy_units) 3765{ 3766 /* only called for genuine_intel, family 6 */ 3767 3768 switch (model) { 3769 case INTEL_FAM6_HASWELL_X: /* HSX */ 3770 case INTEL_FAM6_BROADWELL_X: /* BDX */ | 3358 return 1; 3359 default: 3360 return 0; 3361 } 3362} 3363 3364static void 3365dump_cstate_pstate_config_info(unsigned int family, unsigned int model) --- 376 unchanged lines hidden (view full) --- 3742static double 3743rapl_dram_energy_units_probe(int model, double rapl_energy_units) 3744{ 3745 /* only called for genuine_intel, family 6 */ 3746 3747 switch (model) { 3748 case INTEL_FAM6_HASWELL_X: /* HSX */ 3749 case INTEL_FAM6_BROADWELL_X: /* BDX */ |
3771 case INTEL_FAM6_BROADWELL_XEON_D: /* BDX-DE */ | |
3772 case INTEL_FAM6_XEON_PHI_KNL: /* KNL */ | 3750 case INTEL_FAM6_XEON_PHI_KNL: /* KNL */ |
3773 case INTEL_FAM6_XEON_PHI_KNM: | |
3774 return (rapl_dram_energy_units = 15.3 / 1000000); 3775 default: 3776 return (rapl_energy_units); 3777 } 3778} 3779 3780 3781/* --- 12 unchanged lines hidden (view full) --- 3794 3795 if (family != 6) 3796 return; 3797 3798 switch (model) { 3799 case INTEL_FAM6_SANDYBRIDGE: 3800 case INTEL_FAM6_IVYBRIDGE: 3801 case INTEL_FAM6_HASWELL_CORE: /* HSW */ | 3751 return (rapl_dram_energy_units = 15.3 / 1000000); 3752 default: 3753 return (rapl_energy_units); 3754 } 3755} 3756 3757 3758/* --- 12 unchanged lines hidden (view full) --- 3771 3772 if (family != 6) 3773 return; 3774 3775 switch (model) { 3776 case INTEL_FAM6_SANDYBRIDGE: 3777 case INTEL_FAM6_IVYBRIDGE: 3778 case INTEL_FAM6_HASWELL_CORE: /* HSW */ |
3802 case INTEL_FAM6_HASWELL_ULT: /* HSW */ | |
3803 case INTEL_FAM6_HASWELL_GT3E: /* HSW */ 3804 case INTEL_FAM6_BROADWELL_CORE: /* BDW */ 3805 case INTEL_FAM6_BROADWELL_GT3E: /* BDW */ 3806 do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_GFX | RAPL_PKG_POWER_INFO; 3807 if (rapl_joules) { 3808 BIC_PRESENT(BIC_Pkg_J); 3809 BIC_PRESENT(BIC_Cor_J); 3810 BIC_PRESENT(BIC_GFX_J); --- 7 unchanged lines hidden (view full) --- 3818 case INTEL_FAM6_ATOM_GOLDMONT_PLUS: 3819 do_rapl = RAPL_PKG | RAPL_PKG_POWER_INFO; 3820 if (rapl_joules) 3821 BIC_PRESENT(BIC_Pkg_J); 3822 else 3823 BIC_PRESENT(BIC_PkgWatt); 3824 break; 3825 case INTEL_FAM6_SKYLAKE_MOBILE: /* SKL */ | 3779 case INTEL_FAM6_HASWELL_GT3E: /* HSW */ 3780 case INTEL_FAM6_BROADWELL_CORE: /* BDW */ 3781 case INTEL_FAM6_BROADWELL_GT3E: /* BDW */ 3782 do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_GFX | RAPL_PKG_POWER_INFO; 3783 if (rapl_joules) { 3784 BIC_PRESENT(BIC_Pkg_J); 3785 BIC_PRESENT(BIC_Cor_J); 3786 BIC_PRESENT(BIC_GFX_J); --- 7 unchanged lines hidden (view full) --- 3794 case INTEL_FAM6_ATOM_GOLDMONT_PLUS: 3795 do_rapl = RAPL_PKG | RAPL_PKG_POWER_INFO; 3796 if (rapl_joules) 3797 BIC_PRESENT(BIC_Pkg_J); 3798 else 3799 BIC_PRESENT(BIC_PkgWatt); 3800 break; 3801 case INTEL_FAM6_SKYLAKE_MOBILE: /* SKL */ |
3826 case INTEL_FAM6_SKYLAKE_DESKTOP: /* SKL */ 3827 case INTEL_FAM6_KABYLAKE_MOBILE: /* KBL */ 3828 case INTEL_FAM6_KABYLAKE_DESKTOP: /* KBL */ | |
3829 case INTEL_FAM6_CANNONLAKE_MOBILE: /* CNL */ 3830 do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_DRAM | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_GFX | RAPL_PKG_POWER_INFO; 3831 BIC_PRESENT(BIC_PKG__); 3832 BIC_PRESENT(BIC_RAM__); 3833 if (rapl_joules) { 3834 BIC_PRESENT(BIC_Pkg_J); 3835 BIC_PRESENT(BIC_Cor_J); 3836 BIC_PRESENT(BIC_RAM_J); 3837 BIC_PRESENT(BIC_GFX_J); 3838 } else { 3839 BIC_PRESENT(BIC_PkgWatt); 3840 BIC_PRESENT(BIC_CorWatt); 3841 BIC_PRESENT(BIC_RAMWatt); 3842 BIC_PRESENT(BIC_GFXWatt); 3843 } 3844 break; 3845 case INTEL_FAM6_HASWELL_X: /* HSX */ 3846 case INTEL_FAM6_BROADWELL_X: /* BDX */ | 3802 case INTEL_FAM6_CANNONLAKE_MOBILE: /* CNL */ 3803 do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_DRAM | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_GFX | RAPL_PKG_POWER_INFO; 3804 BIC_PRESENT(BIC_PKG__); 3805 BIC_PRESENT(BIC_RAM__); 3806 if (rapl_joules) { 3807 BIC_PRESENT(BIC_Pkg_J); 3808 BIC_PRESENT(BIC_Cor_J); 3809 BIC_PRESENT(BIC_RAM_J); 3810 BIC_PRESENT(BIC_GFX_J); 3811 } else { 3812 BIC_PRESENT(BIC_PkgWatt); 3813 BIC_PRESENT(BIC_CorWatt); 3814 BIC_PRESENT(BIC_RAMWatt); 3815 BIC_PRESENT(BIC_GFXWatt); 3816 } 3817 break; 3818 case INTEL_FAM6_HASWELL_X: /* HSX */ 3819 case INTEL_FAM6_BROADWELL_X: /* BDX */ |
3847 case INTEL_FAM6_BROADWELL_XEON_D: /* BDX-DE */ | |
3848 case INTEL_FAM6_SKYLAKE_X: /* SKX */ 3849 case INTEL_FAM6_XEON_PHI_KNL: /* KNL */ | 3820 case INTEL_FAM6_SKYLAKE_X: /* SKX */ 3821 case INTEL_FAM6_XEON_PHI_KNL: /* KNL */ |
3850 case INTEL_FAM6_XEON_PHI_KNM: | |
3851 do_rapl = RAPL_PKG | RAPL_DRAM | RAPL_DRAM_POWER_INFO | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_PKG_POWER_INFO; 3852 BIC_PRESENT(BIC_PKG__); 3853 BIC_PRESENT(BIC_RAM__); 3854 if (rapl_joules) { 3855 BIC_PRESENT(BIC_Pkg_J); 3856 BIC_PRESENT(BIC_RAM_J); 3857 } else { 3858 BIC_PRESENT(BIC_PkgWatt); --- 76 unchanged lines hidden (view full) --- 3935 if (!genuine_intel) 3936 return; 3937 3938 if (family != 6) 3939 return; 3940 3941 switch (model) { 3942 case INTEL_FAM6_HASWELL_CORE: /* HSW */ | 3822 do_rapl = RAPL_PKG | RAPL_DRAM | RAPL_DRAM_POWER_INFO | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_PKG_POWER_INFO; 3823 BIC_PRESENT(BIC_PKG__); 3824 BIC_PRESENT(BIC_RAM__); 3825 if (rapl_joules) { 3826 BIC_PRESENT(BIC_Pkg_J); 3827 BIC_PRESENT(BIC_RAM_J); 3828 } else { 3829 BIC_PRESENT(BIC_PkgWatt); --- 76 unchanged lines hidden (view full) --- 3906 if (!genuine_intel) 3907 return; 3908 3909 if (family != 6) 3910 return; 3911 3912 switch (model) { 3913 case INTEL_FAM6_HASWELL_CORE: /* HSW */ |
3943 case INTEL_FAM6_HASWELL_ULT: /* HSW */ | |
3944 case INTEL_FAM6_HASWELL_GT3E: /* HSW */ 3945 do_gfx_perf_limit_reasons = 1; 3946 case INTEL_FAM6_HASWELL_X: /* HSX */ 3947 do_core_perf_limit_reasons = 1; 3948 do_ring_perf_limit_reasons = 1; 3949 default: 3950 return; 3951 } --- 195 unchanged lines hidden (view full) --- 4147 4148 switch (model) { 4149 case INTEL_FAM6_SANDYBRIDGE: 4150 case INTEL_FAM6_SANDYBRIDGE_X: 4151 case INTEL_FAM6_IVYBRIDGE: /* IVB */ 4152 case INTEL_FAM6_IVYBRIDGE_X: /* IVB Xeon */ 4153 case INTEL_FAM6_HASWELL_CORE: /* HSW */ 4154 case INTEL_FAM6_HASWELL_X: /* HSW */ | 3914 case INTEL_FAM6_HASWELL_GT3E: /* HSW */ 3915 do_gfx_perf_limit_reasons = 1; 3916 case INTEL_FAM6_HASWELL_X: /* HSX */ 3917 do_core_perf_limit_reasons = 1; 3918 do_ring_perf_limit_reasons = 1; 3919 default: 3920 return; 3921 } --- 195 unchanged lines hidden (view full) --- 4117 4118 switch (model) { 4119 case INTEL_FAM6_SANDYBRIDGE: 4120 case INTEL_FAM6_SANDYBRIDGE_X: 4121 case INTEL_FAM6_IVYBRIDGE: /* IVB */ 4122 case INTEL_FAM6_IVYBRIDGE_X: /* IVB Xeon */ 4123 case INTEL_FAM6_HASWELL_CORE: /* HSW */ 4124 case INTEL_FAM6_HASWELL_X: /* HSW */ |
4155 case INTEL_FAM6_HASWELL_ULT: /* HSW */ | |
4156 case INTEL_FAM6_HASWELL_GT3E: /* HSW */ 4157 case INTEL_FAM6_BROADWELL_CORE: /* BDW */ 4158 case INTEL_FAM6_BROADWELL_GT3E: /* BDW */ 4159 case INTEL_FAM6_BROADWELL_X: /* BDX */ | 4125 case INTEL_FAM6_HASWELL_GT3E: /* HSW */ 4126 case INTEL_FAM6_BROADWELL_CORE: /* BDW */ 4127 case INTEL_FAM6_BROADWELL_GT3E: /* BDW */ 4128 case INTEL_FAM6_BROADWELL_X: /* BDX */ |
4160 case INTEL_FAM6_BROADWELL_XEON_D: /* BDX-DE */ | |
4161 case INTEL_FAM6_SKYLAKE_MOBILE: /* SKL */ | 4129 case INTEL_FAM6_SKYLAKE_MOBILE: /* SKL */ |
4162 case INTEL_FAM6_SKYLAKE_DESKTOP: /* SKL */ 4163 case INTEL_FAM6_KABYLAKE_MOBILE: /* KBL */ 4164 case INTEL_FAM6_KABYLAKE_DESKTOP: /* KBL */ | |
4165 case INTEL_FAM6_CANNONLAKE_MOBILE: /* CNL */ 4166 case INTEL_FAM6_SKYLAKE_X: /* SKX */ 4167 case INTEL_FAM6_ATOM_GOLDMONT: /* BXT */ 4168 case INTEL_FAM6_ATOM_GOLDMONT_PLUS: 4169 case INTEL_FAM6_ATOM_GOLDMONT_X: /* DNV */ 4170 return 1; 4171 } 4172 return 0; --- 12 unchanged lines hidden (view full) --- 4185 * 4186 */ 4187int has_hsw_msrs(unsigned int family, unsigned int model) 4188{ 4189 if (!genuine_intel) 4190 return 0; 4191 4192 switch (model) { | 4130 case INTEL_FAM6_CANNONLAKE_MOBILE: /* CNL */ 4131 case INTEL_FAM6_SKYLAKE_X: /* SKX */ 4132 case INTEL_FAM6_ATOM_GOLDMONT: /* BXT */ 4133 case INTEL_FAM6_ATOM_GOLDMONT_PLUS: 4134 case INTEL_FAM6_ATOM_GOLDMONT_X: /* DNV */ 4135 return 1; 4136 } 4137 return 0; --- 12 unchanged lines hidden (view full) --- 4150 * 4151 */ 4152int has_hsw_msrs(unsigned int family, unsigned int model) 4153{ 4154 if (!genuine_intel) 4155 return 0; 4156 4157 switch (model) { |
4193 case INTEL_FAM6_HASWELL_ULT: /* HSW */ | 4158 case INTEL_FAM6_HASWELL_CORE: |
4194 case INTEL_FAM6_BROADWELL_CORE: /* BDW */ 4195 case INTEL_FAM6_SKYLAKE_MOBILE: /* SKL */ | 4159 case INTEL_FAM6_BROADWELL_CORE: /* BDW */ 4160 case INTEL_FAM6_SKYLAKE_MOBILE: /* SKL */ |
4196 case INTEL_FAM6_SKYLAKE_DESKTOP: /* SKL */ 4197 case INTEL_FAM6_KABYLAKE_MOBILE: /* KBL */ 4198 case INTEL_FAM6_KABYLAKE_DESKTOP: /* KBL */ | |
4199 case INTEL_FAM6_CANNONLAKE_MOBILE: /* CNL */ 4200 case INTEL_FAM6_ATOM_GOLDMONT: /* BXT */ 4201 case INTEL_FAM6_ATOM_GOLDMONT_PLUS: 4202 return 1; 4203 } 4204 return 0; 4205} 4206 --- 7 unchanged lines hidden (view full) --- 4214 */ 4215int has_skl_msrs(unsigned int family, unsigned int model) 4216{ 4217 if (!genuine_intel) 4218 return 0; 4219 4220 switch (model) { 4221 case INTEL_FAM6_SKYLAKE_MOBILE: /* SKL */ | 4161 case INTEL_FAM6_CANNONLAKE_MOBILE: /* CNL */ 4162 case INTEL_FAM6_ATOM_GOLDMONT: /* BXT */ 4163 case INTEL_FAM6_ATOM_GOLDMONT_PLUS: 4164 return 1; 4165 } 4166 return 0; 4167} 4168 --- 7 unchanged lines hidden (view full) --- 4176 */ 4177int has_skl_msrs(unsigned int family, unsigned int model) 4178{ 4179 if (!genuine_intel) 4180 return 0; 4181 4182 switch (model) { 4183 case INTEL_FAM6_SKYLAKE_MOBILE: /* SKL */ |
4222 case INTEL_FAM6_SKYLAKE_DESKTOP: /* SKL */ 4223 case INTEL_FAM6_KABYLAKE_MOBILE: /* KBL */ 4224 case INTEL_FAM6_KABYLAKE_DESKTOP: /* KBL */ | |
4225 case INTEL_FAM6_CANNONLAKE_MOBILE: /* CNL */ 4226 return 1; 4227 } 4228 return 0; 4229} 4230 4231int is_slm(unsigned int family, unsigned int model) 4232{ --- 8 unchanged lines hidden (view full) --- 4241} 4242 4243int is_knl(unsigned int family, unsigned int model) 4244{ 4245 if (!genuine_intel) 4246 return 0; 4247 switch (model) { 4248 case INTEL_FAM6_XEON_PHI_KNL: /* KNL */ | 4184 case INTEL_FAM6_CANNONLAKE_MOBILE: /* CNL */ 4185 return 1; 4186 } 4187 return 0; 4188} 4189 4190int is_slm(unsigned int family, unsigned int model) 4191{ --- 8 unchanged lines hidden (view full) --- 4200} 4201 4202int is_knl(unsigned int family, unsigned int model) 4203{ 4204 if (!genuine_intel) 4205 return 0; 4206 switch (model) { 4207 case INTEL_FAM6_XEON_PHI_KNL: /* KNL */ |
4249 case INTEL_FAM6_XEON_PHI_KNM: | |
4250 return 1; 4251 } 4252 return 0; 4253} 4254 4255int is_cnl(unsigned int family, unsigned int model) 4256{ 4257 if (!genuine_intel) --- 197 unchanged lines hidden (view full) --- 4455 fprintf(outf, "cpu%d: MSR_CC6_DEMOTION_POLICY_CONFIG: 0x%08llx (%sable-CC6-Demotion)\n", 4456 base_cpu, msr, msr & (1 << 0) ? "EN" : "DIS"); 4457 4458 if (!get_msr(base_cpu, MSR_MC6_DEMOTION_POLICY_CONFIG, &msr)) 4459 fprintf(outf, "cpu%d: MSR_MC6_DEMOTION_POLICY_CONFIG: 0x%08llx (%sable-MC6-Demotion)\n", 4460 base_cpu, msr, msr & (1 << 0) ? "EN" : "DIS"); 4461} 4462 | 4208 return 1; 4209 } 4210 return 0; 4211} 4212 4213int is_cnl(unsigned int family, unsigned int model) 4214{ 4215 if (!genuine_intel) --- 197 unchanged lines hidden (view full) --- 4413 fprintf(outf, "cpu%d: MSR_CC6_DEMOTION_POLICY_CONFIG: 0x%08llx (%sable-CC6-Demotion)\n", 4414 base_cpu, msr, msr & (1 << 0) ? "EN" : "DIS"); 4415 4416 if (!get_msr(base_cpu, MSR_MC6_DEMOTION_POLICY_CONFIG, &msr)) 4417 fprintf(outf, "cpu%d: MSR_MC6_DEMOTION_POLICY_CONFIG: 0x%08llx (%sable-MC6-Demotion)\n", 4418 base_cpu, msr, msr & (1 << 0) ? "EN" : "DIS"); 4419} 4420 |
4421/* 4422 * When models are the same, for the purpose of turbostat, reuse 4423 */ 4424unsigned int intel_model_duplicates(unsigned int model) 4425{ 4426 4427 switch(model) { 4428 case INTEL_FAM6_NEHALEM_EP: /* Core i7, Xeon 5500 series - Bloomfield, Gainstown NHM-EP */ 4429 case INTEL_FAM6_NEHALEM: /* Core i7 and i5 Processor - Clarksfield, Lynnfield, Jasper Forest */ 4430 case 0x1F: /* Core i7 and i5 Processor - Nehalem */ 4431 case INTEL_FAM6_WESTMERE: /* Westmere Client - Clarkdale, Arrandale */ 4432 case INTEL_FAM6_WESTMERE_EP: /* Westmere EP - Gulftown */ 4433 return INTEL_FAM6_NEHALEM; 4434 4435 case INTEL_FAM6_NEHALEM_EX: /* Nehalem-EX Xeon - Beckton */ 4436 case INTEL_FAM6_WESTMERE_EX: /* Westmere-EX Xeon - Eagleton */ 4437 return INTEL_FAM6_NEHALEM_EX; 4438 4439 case INTEL_FAM6_XEON_PHI_KNM: 4440 return INTEL_FAM6_XEON_PHI_KNL; 4441 4442 case INTEL_FAM6_HASWELL_ULT: 4443 return INTEL_FAM6_HASWELL_CORE; 4444 4445 case INTEL_FAM6_BROADWELL_X: 4446 case INTEL_FAM6_BROADWELL_XEON_D: /* BDX-DE */ 4447 return INTEL_FAM6_BROADWELL_X; 4448 4449 case INTEL_FAM6_SKYLAKE_MOBILE: 4450 case INTEL_FAM6_SKYLAKE_DESKTOP: 4451 case INTEL_FAM6_KABYLAKE_MOBILE: 4452 case INTEL_FAM6_KABYLAKE_DESKTOP: 4453 return INTEL_FAM6_SKYLAKE_MOBILE; 4454 } 4455 return model; 4456} |
|
4463void process_cpuid() 4464{ 4465 unsigned int eax, ebx, ecx, edx; 4466 unsigned int fms, family, model, stepping, ecx_flags, edx_flags; 4467 unsigned int has_turbo; 4468 4469 eax = ebx = ecx = edx = 0; 4470 --- 37 unchanged lines hidden (view full) --- 4508 ecx_flags & (1 << 7) ? "EIST" : "-", 4509 ecx_flags & (1 << 8) ? "TM2" : "-", 4510 edx_flags & (1 << 4) ? "TSC" : "-", 4511 edx_flags & (1 << 5) ? "MSR" : "-", 4512 edx_flags & (1 << 22) ? "ACPI-TM" : "-", 4513 edx_flags & (1 << 28) ? "HT" : "-", 4514 edx_flags & (1 << 29) ? "TM" : "-"); 4515 } | 4457void process_cpuid() 4458{ 4459 unsigned int eax, ebx, ecx, edx; 4460 unsigned int fms, family, model, stepping, ecx_flags, edx_flags; 4461 unsigned int has_turbo; 4462 4463 eax = ebx = ecx = edx = 0; 4464 --- 37 unchanged lines hidden (view full) --- 4502 ecx_flags & (1 << 7) ? "EIST" : "-", 4503 ecx_flags & (1 << 8) ? "TM2" : "-", 4504 edx_flags & (1 << 4) ? "TSC" : "-", 4505 edx_flags & (1 << 5) ? "MSR" : "-", 4506 edx_flags & (1 << 22) ? "ACPI-TM" : "-", 4507 edx_flags & (1 << 28) ? "HT" : "-", 4508 edx_flags & (1 << 29) ? "TM" : "-"); 4509 } |
4510 if (genuine_intel) 4511 model = intel_model_duplicates(model); |
|
4516 4517 if (!(edx_flags & (1 << 5))) 4518 errx(1, "CPUID: no MSR"); 4519 4520 if (max_extended_level >= 0x80000007) { 4521 4522 /* 4523 * Non-Stop TSC is advertised by CPUID.EAX=0x80000007: EDX.bit8 --- 75 unchanged lines hidden (view full) --- 4599 4600 if (!quiet && (ebx != 0)) 4601 fprintf(outf, "CPUID(0x15): eax_crystal: %d ebx_tsc: %d ecx_crystal_hz: %d\n", 4602 eax_crystal, ebx_tsc, crystal_hz); 4603 4604 if (crystal_hz == 0) 4605 switch(model) { 4606 case INTEL_FAM6_SKYLAKE_MOBILE: /* SKL */ | 4512 4513 if (!(edx_flags & (1 << 5))) 4514 errx(1, "CPUID: no MSR"); 4515 4516 if (max_extended_level >= 0x80000007) { 4517 4518 /* 4519 * Non-Stop TSC is advertised by CPUID.EAX=0x80000007: EDX.bit8 --- 75 unchanged lines hidden (view full) --- 4595 4596 if (!quiet && (ebx != 0)) 4597 fprintf(outf, "CPUID(0x15): eax_crystal: %d ebx_tsc: %d ecx_crystal_hz: %d\n", 4598 eax_crystal, ebx_tsc, crystal_hz); 4599 4600 if (crystal_hz == 0) 4601 switch(model) { 4602 case INTEL_FAM6_SKYLAKE_MOBILE: /* SKL */ |
4607 case INTEL_FAM6_SKYLAKE_DESKTOP: /* SKL */ 4608 case INTEL_FAM6_KABYLAKE_MOBILE: /* KBL */ 4609 case INTEL_FAM6_KABYLAKE_DESKTOP: /* KBL */ | |
4610 crystal_hz = 24000000; /* 24.0 MHz */ 4611 break; 4612 case INTEL_FAM6_ATOM_GOLDMONT_X: /* DNV */ 4613 crystal_hz = 25000000; /* 25.0 MHz */ 4614 break; 4615 case INTEL_FAM6_ATOM_GOLDMONT: /* BXT */ 4616 case INTEL_FAM6_ATOM_GOLDMONT_PLUS: 4617 crystal_hz = 19200000; /* 19.2 MHz */ --- 997 unchanged lines hidden --- | 4603 crystal_hz = 24000000; /* 24.0 MHz */ 4604 break; 4605 case INTEL_FAM6_ATOM_GOLDMONT_X: /* DNV */ 4606 crystal_hz = 25000000; /* 25.0 MHz */ 4607 break; 4608 case INTEL_FAM6_ATOM_GOLDMONT: /* BXT */ 4609 case INTEL_FAM6_ATOM_GOLDMONT_PLUS: 4610 crystal_hz = 19200000; /* 19.2 MHz */ --- 997 unchanged lines hidden --- |