turbostat.c (0b9a0b9be991656f125b58a240065cdf72077244) turbostat.c (55279aef754c5eab170077ae4ba4ebd304dea64f)
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * turbostat -- show CPU frequency and C-state residency
4 * on modern Intel and AMD processors.
5 *
6 * Copyright (c) 2013 Intel Corporation.
7 * Len Brown <len.brown@intel.com>
8 */

--- 75 unchanged lines hidden (view full) ---

84unsigned int do_dts;
85unsigned int do_ptm;
86unsigned int do_ipc;
87unsigned long long gfx_cur_rc6_ms;
88unsigned long long cpuidle_cur_cpu_lpi_us;
89unsigned long long cpuidle_cur_sys_lpi_us;
90unsigned int gfx_cur_mhz;
91unsigned int gfx_act_mhz;
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * turbostat -- show CPU frequency and C-state residency
4 * on modern Intel and AMD processors.
5 *
6 * Copyright (c) 2013 Intel Corporation.
7 * Len Brown <len.brown@intel.com>
8 */

--- 75 unchanged lines hidden (view full) ---

84unsigned int do_dts;
85unsigned int do_ptm;
86unsigned int do_ipc;
87unsigned long long gfx_cur_rc6_ms;
88unsigned long long cpuidle_cur_cpu_lpi_us;
89unsigned long long cpuidle_cur_sys_lpi_us;
90unsigned int gfx_cur_mhz;
91unsigned int gfx_act_mhz;
92unsigned int tcc_activation_temp;
93unsigned int tcc_activation_temp_override;
92unsigned int tj_max;
93unsigned int tj_max_override;
94int tcc_offset_bits;
95double rapl_power_units, rapl_time_units;
96double rapl_dram_energy_units, rapl_energy_units;
97double rapl_joule_counter_range;
98unsigned int do_core_perf_limit_reasons;
99unsigned int has_automatic_cstate_conversion;
100unsigned int dis_cstate_prewake;
101unsigned int do_gfx_perf_limit_reasons;

--- 2011 unchanged lines hidden (view full) ---

2113
2114 if (DO_BIC(BIC_Mod_c6))
2115 if (get_msr(cpu, MSR_MODULE_C6_RES_MS, &c->mc6_us))
2116 return -8;
2117
2118 if (DO_BIC(BIC_CoreTmp)) {
2119 if (get_msr(cpu, MSR_IA32_THERM_STATUS, &msr))
2120 return -9;
94int tcc_offset_bits;
95double rapl_power_units, rapl_time_units;
96double rapl_dram_energy_units, rapl_energy_units;
97double rapl_joule_counter_range;
98unsigned int do_core_perf_limit_reasons;
99unsigned int has_automatic_cstate_conversion;
100unsigned int dis_cstate_prewake;
101unsigned int do_gfx_perf_limit_reasons;

--- 2011 unchanged lines hidden (view full) ---

2113
2114 if (DO_BIC(BIC_Mod_c6))
2115 if (get_msr(cpu, MSR_MODULE_C6_RES_MS, &c->mc6_us))
2116 return -8;
2117
2118 if (DO_BIC(BIC_CoreTmp)) {
2119 if (get_msr(cpu, MSR_IA32_THERM_STATUS, &msr))
2120 return -9;
2121 c->core_temp_c = tcc_activation_temp - ((msr >> 16) & 0x7F);
2121 c->core_temp_c = tj_max - ((msr >> 16) & 0x7F);
2122 }
2123
2124 if (do_rapl & RAPL_AMD_F17H) {
2125 if (get_msr(cpu, MSR_CORE_ENERGY_STAT, &msr))
2126 return -14;
2127 c->core_energy = msr & 0xFFFFFFFF;
2128 }
2129

--- 89 unchanged lines hidden (view full) ---

2219 if (do_rapl & RAPL_AMD_F17H) {
2220 if (get_msr_sum(cpu, MSR_PKG_ENERGY_STAT, &msr))
2221 return -13;
2222 p->energy_pkg = msr;
2223 }
2224 if (DO_BIC(BIC_PkgTmp)) {
2225 if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_STATUS, &msr))
2226 return -17;
2122 }
2123
2124 if (do_rapl & RAPL_AMD_F17H) {
2125 if (get_msr(cpu, MSR_CORE_ENERGY_STAT, &msr))
2126 return -14;
2127 c->core_energy = msr & 0xFFFFFFFF;
2128 }
2129

--- 89 unchanged lines hidden (view full) ---

2219 if (do_rapl & RAPL_AMD_F17H) {
2220 if (get_msr_sum(cpu, MSR_PKG_ENERGY_STAT, &msr))
2221 return -13;
2222 p->energy_pkg = msr;
2223 }
2224 if (DO_BIC(BIC_PkgTmp)) {
2225 if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_STATUS, &msr))
2226 return -17;
2227 p->pkg_temp_c = tcc_activation_temp - ((msr >> 16) & 0x7F);
2227 p->pkg_temp_c = tj_max - ((msr >> 16) & 0x7F);
2228 }
2229
2230 if (DO_BIC(BIC_GFX_rc6))
2231 p->gfx_rc6_ms = gfx_cur_rc6_ms;
2232
2233 if (DO_BIC(BIC_GFXMHz))
2234 p->gfx_mhz = gfx_cur_mhz;
2235

--- 2396 unchanged lines hidden (view full) ---

4632 }
4633
4634 if (do_ptm && (t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE)) {
4635 if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_STATUS, &msr))
4636 return 0;
4637
4638 dts = (msr >> 16) & 0x7F;
4639 fprintf(outf, "cpu%d: MSR_IA32_PACKAGE_THERM_STATUS: 0x%08llx (%d C)\n",
2228 }
2229
2230 if (DO_BIC(BIC_GFX_rc6))
2231 p->gfx_rc6_ms = gfx_cur_rc6_ms;
2232
2233 if (DO_BIC(BIC_GFXMHz))
2234 p->gfx_mhz = gfx_cur_mhz;
2235

--- 2396 unchanged lines hidden (view full) ---

4632 }
4633
4634 if (do_ptm && (t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE)) {
4635 if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_STATUS, &msr))
4636 return 0;
4637
4638 dts = (msr >> 16) & 0x7F;
4639 fprintf(outf, "cpu%d: MSR_IA32_PACKAGE_THERM_STATUS: 0x%08llx (%d C)\n",
4640 cpu, msr, tcc_activation_temp - dts);
4640 cpu, msr, tj_max - dts);
4641
4642 if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_INTERRUPT, &msr))
4643 return 0;
4644
4645 dts = (msr >> 16) & 0x7F;
4646 dts2 = (msr >> 8) & 0x7F;
4647 fprintf(outf, "cpu%d: MSR_IA32_PACKAGE_THERM_INTERRUPT: 0x%08llx (%d C, %d C)\n",
4641
4642 if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_INTERRUPT, &msr))
4643 return 0;
4644
4645 dts = (msr >> 16) & 0x7F;
4646 dts2 = (msr >> 8) & 0x7F;
4647 fprintf(outf, "cpu%d: MSR_IA32_PACKAGE_THERM_INTERRUPT: 0x%08llx (%d C, %d C)\n",
4648 cpu, msr, tcc_activation_temp - dts, tcc_activation_temp - dts2);
4648 cpu, msr, tj_max - dts, tj_max - dts2);
4649 }
4650
4651
4652 if (do_dts && debug) {
4653 unsigned int resolution;
4654
4655 if (get_msr(cpu, MSR_IA32_THERM_STATUS, &msr))
4656 return 0;
4657
4658 dts = (msr >> 16) & 0x7F;
4659 resolution = (msr >> 27) & 0xF;
4660 fprintf(outf, "cpu%d: MSR_IA32_THERM_STATUS: 0x%08llx (%d C +/- %d)\n",
4649 }
4650
4651
4652 if (do_dts && debug) {
4653 unsigned int resolution;
4654
4655 if (get_msr(cpu, MSR_IA32_THERM_STATUS, &msr))
4656 return 0;
4657
4658 dts = (msr >> 16) & 0x7F;
4659 resolution = (msr >> 27) & 0xF;
4660 fprintf(outf, "cpu%d: MSR_IA32_THERM_STATUS: 0x%08llx (%d C +/- %d)\n",
4661 cpu, msr, tcc_activation_temp - dts, resolution);
4661 cpu, msr, tj_max - dts, resolution);
4662
4663 if (get_msr(cpu, MSR_IA32_THERM_INTERRUPT, &msr))
4664 return 0;
4665
4666 dts = (msr >> 16) & 0x7F;
4667 dts2 = (msr >> 8) & 0x7F;
4668 fprintf(outf, "cpu%d: MSR_IA32_THERM_INTERRUPT: 0x%08llx (%d C, %d C)\n",
4662
4663 if (get_msr(cpu, MSR_IA32_THERM_INTERRUPT, &msr))
4664 return 0;
4665
4666 dts = (msr >> 16) & 0x7F;
4667 dts2 = (msr >> 8) & 0x7F;
4668 fprintf(outf, "cpu%d: MSR_IA32_THERM_INTERRUPT: 0x%08llx (%d C, %d C)\n",
4669 cpu, msr, tcc_activation_temp - dts, tcc_activation_temp - dts2);
4669 cpu, msr, tj_max - dts, tj_max - dts2);
4670 }
4671
4672 return 0;
4673}
4674
4675void print_power_limit_msr(int cpu, unsigned long long msr, char *label)
4676{
4677 fprintf(outf, "cpu%d: %s: %sabled (%f Watts, %f sec, clamp %sabled)\n",

--- 316 unchanged lines hidden (view full) ---

4994 *
4995 * Several MSR temperature values are in units of degrees-C
4996 * below this value, including the Digital Thermal Sensor (DTS),
4997 * Package Thermal Management Sensor (PTM), and thermal event thresholds.
4998 */
4999int set_temperature_target(struct thread_data *t, struct core_data *c, struct pkg_data *p)
5000{
5001 unsigned long long msr;
4670 }
4671
4672 return 0;
4673}
4674
4675void print_power_limit_msr(int cpu, unsigned long long msr, char *label)
4676{
4677 fprintf(outf, "cpu%d: %s: %sabled (%f Watts, %f sec, clamp %sabled)\n",

--- 316 unchanged lines hidden (view full) ---

4994 *
4995 * Several MSR temperature values are in units of degrees-C
4996 * below this value, including the Digital Thermal Sensor (DTS),
4997 * Package Thermal Management Sensor (PTM), and thermal event thresholds.
4998 */
4999int set_temperature_target(struct thread_data *t, struct core_data *c, struct pkg_data *p)
5000{
5001 unsigned long long msr;
5002 unsigned int target_c_local, tcc_offset;
5002 unsigned int tcc_default, tcc_offset;
5003 int cpu;
5004
5003 int cpu;
5004
5005 /* tcc_activation_temp is used only for dts or ptm */
5005 /* tj_max is used only for dts or ptm */
5006 if (!(do_dts || do_ptm))
5007 return 0;
5008
5009 /* this is a per-package concept */
5010 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
5011 return 0;
5012
5013 cpu = t->cpu_id;
5014 if (cpu_migrate(cpu)) {
5015 fprintf(outf, "Could not migrate to CPU %d\n", cpu);
5016 return -1;
5017 }
5018
5006 if (!(do_dts || do_ptm))
5007 return 0;
5008
5009 /* this is a per-package concept */
5010 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
5011 return 0;
5012
5013 cpu = t->cpu_id;
5014 if (cpu_migrate(cpu)) {
5015 fprintf(outf, "Could not migrate to CPU %d\n", cpu);
5016 return -1;
5017 }
5018
5019 if (tcc_activation_temp_override != 0) {
5020 tcc_activation_temp = tcc_activation_temp_override;
5019 if (tj_max_override != 0) {
5020 tj_max = tj_max_override;
5021 fprintf(outf, "cpu%d: Using cmdline TCC Target (%d C)\n",
5021 fprintf(outf, "cpu%d: Using cmdline TCC Target (%d C)\n",
5022 cpu, tcc_activation_temp);
5022 cpu, tj_max);
5023 return 0;
5024 }
5025
5026 /* Temperature Target MSR is Nehalem and newer only */
5027 if (!do_nhm_platform_info)
5028 goto guess;
5029
5030 if (get_msr(base_cpu, MSR_IA32_TEMPERATURE_TARGET, &msr))
5031 goto guess;
5032
5023 return 0;
5024 }
5025
5026 /* Temperature Target MSR is Nehalem and newer only */
5027 if (!do_nhm_platform_info)
5028 goto guess;
5029
5030 if (get_msr(base_cpu, MSR_IA32_TEMPERATURE_TARGET, &msr))
5031 goto guess;
5032
5033 target_c_local = (msr >> 16) & 0xFF;
5033 tcc_default = (msr >> 16) & 0xFF;
5034
5035 if (!quiet) {
5036 switch (tcc_offset_bits) {
5037 case 4:
5038 tcc_offset = (msr >> 24) & 0xF;
5039 fprintf(outf, "cpu%d: MSR_IA32_TEMPERATURE_TARGET: 0x%08llx (%d C) (%d default - %d offset)\n",
5034
5035 if (!quiet) {
5036 switch (tcc_offset_bits) {
5037 case 4:
5038 tcc_offset = (msr >> 24) & 0xF;
5039 fprintf(outf, "cpu%d: MSR_IA32_TEMPERATURE_TARGET: 0x%08llx (%d C) (%d default - %d offset)\n",
5040 cpu, msr, target_c_local - tcc_offset, target_c_local, tcc_offset);
5040 cpu, msr, tcc_default - tcc_offset, tcc_default, tcc_offset);
5041 break;
5042 case 6:
5043 tcc_offset = (msr >> 24) & 0x3F;
5044 fprintf(outf, "cpu%d: MSR_IA32_TEMPERATURE_TARGET: 0x%08llx (%d C) (%d default - %d offset)\n",
5041 break;
5042 case 6:
5043 tcc_offset = (msr >> 24) & 0x3F;
5044 fprintf(outf, "cpu%d: MSR_IA32_TEMPERATURE_TARGET: 0x%08llx (%d C) (%d default - %d offset)\n",
5045 cpu, msr, target_c_local - tcc_offset, target_c_local, tcc_offset);
5045 cpu, msr, tcc_default - tcc_offset, tcc_default, tcc_offset);
5046 break;
5047 default:
5048 fprintf(outf, "cpu%d: MSR_IA32_TEMPERATURE_TARGET: 0x%08llx (%d C)\n",
5046 break;
5047 default:
5048 fprintf(outf, "cpu%d: MSR_IA32_TEMPERATURE_TARGET: 0x%08llx (%d C)\n",
5049 cpu, msr, target_c_local);
5049 cpu, msr, tcc_default);
5050 break;
5051 }
5052 }
5053
5050 break;
5051 }
5052 }
5053
5054 if (!target_c_local)
5054 if (!tcc_default)
5055 goto guess;
5056
5055 goto guess;
5056
5057 tcc_activation_temp = target_c_local;
5057 tj_max = tcc_default;
5058
5059 return 0;
5060
5061guess:
5058
5059 return 0;
5060
5061guess:
5062 tcc_activation_temp = TJMAX_DEFAULT;
5062 tj_max = TJMAX_DEFAULT;
5063 fprintf(outf, "cpu%d: Guessing tjMax %d C, Please use -T to specify\n",
5063 fprintf(outf, "cpu%d: Guessing tjMax %d C, Please use -T to specify\n",
5064 cpu, tcc_activation_temp);
5064 cpu, tj_max);
5065
5066 return 0;
5067}
5068
5069void decode_feature_control_msr(void)
5070{
5071 unsigned long long msr;
5072

--- 1343 unchanged lines hidden (view full) ---

6416 else
6417 bic_enabled |= bic_lookup(optarg, SHOW_LIST);
6418 shown = 1;
6419 break;
6420 case 'S':
6421 summary_only++;
6422 break;
6423 case 'T':
5065
5066 return 0;
5067}
5068
5069void decode_feature_control_msr(void)
5070{
5071 unsigned long long msr;
5072

--- 1343 unchanged lines hidden (view full) ---

6416 else
6417 bic_enabled |= bic_lookup(optarg, SHOW_LIST);
6418 shown = 1;
6419 break;
6420 case 'S':
6421 summary_only++;
6422 break;
6423 case 'T':
6424 tcc_activation_temp_override = atoi(optarg);
6424 tj_max_override = atoi(optarg);
6425 break;
6426 case 'v':
6427 print_version();
6428 exit(0);
6429 break;
6430 }
6431 }
6432}

--- 35 unchanged lines hidden --- 		6425 break;
6426 case 'v':
6427 print_version();
6428 exit(0);
6429 break;
6430 }
6431 }
6432}

--- 35 unchanged lines hidden ---