| Kconfig (03ab8e6297acd1bc0eedaa050e2a1635c576fd11) | Kconfig (7358a803c778f28314721e78339f3fa5b787f55c) |
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| 1# SPDX-License-Identifier: GPL-2.0-only 2config SND_SOC_TEGRA 3 tristate "SoC Audio for the Tegra System-on-Chip" 4 depends on (ARCH_TEGRA && TEGRA20_APB_DMA) || COMPILE_TEST 5 depends on COMMON_CLK 6 depends on RESET_CONTROLLER 7 select REGMAP_MMIO 8 select SND_SOC_GENERIC_DMAENGINE_PCM --- 71 unchanged lines hidden (view full) --- 80 tristate "Tegra210 I2S module" 81 help 82 Config to enable the Inter-IC Sound (I2S) Controller which 83 implements full-duplex and bidirectional and single direction 84 point-to-point serial interfaces. It can interface with I2S 85 compatible devices. 86 Say Y or M if you want to add support for Tegra210 I2S module. 87 | 1# SPDX-License-Identifier: GPL-2.0-only 2config SND_SOC_TEGRA 3 tristate "SoC Audio for the Tegra System-on-Chip" 4 depends on (ARCH_TEGRA && TEGRA20_APB_DMA) || COMPILE_TEST 5 depends on COMMON_CLK 6 depends on RESET_CONTROLLER 7 select REGMAP_MMIO 8 select SND_SOC_GENERIC_DMAENGINE_PCM --- 71 unchanged lines hidden (view full) --- 80 tristate "Tegra210 I2S module" 81 help 82 Config to enable the Inter-IC Sound (I2S) Controller which 83 implements full-duplex and bidirectional and single direction 84 point-to-point serial interfaces. It can interface with I2S 85 compatible devices. 86 Say Y or M if you want to add support for Tegra210 I2S module. 87 |
| 88config SND_SOC_TEGRA210_OPE 89 tristate "Tegra210 OPE module" 90 help 91 Config to enable the Output Processing Engine (OPE) which includes 92 Parametric Equalizer (PEQ) and Multi Band Dynamic Range Compressor 93 (MBDRC) sub blocks for data processing. It can support up to 8 94 channels. 95 Say Y or M if you want to add support for Tegra210 OPE module. 96 97config SND_SOC_TEGRA186_ASRC 98 tristate "Tegra186 ASRC module" 99 help 100 Config to enable the Asynchronous Sample Rate Converter (ASRC), 101 which converts the sampling frequency of the input signal from 102 one frequency to another. It can handle over a wide range of 103 sample rate ratios (freq_in/freq_out) from 1:24 to 24:1. 104 ASRC has two modes of operation. One where ratio can be programmed 105 in SW and the other where it gets information from ratio estimator 106 module. 107 Say Y or M if you want to add support for Tegra186 ASRC module. 108 |
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| 88config SND_SOC_TEGRA186_DSPK 89 tristate "Tegra186 DSPK module" 90 help 91 Config to enable the Digital Speaker Controller (DSPK) which 92 converts the multi-bit Pulse Code Modulation (PCM) audio input to 93 oversampled 1-bit Pulse Density Modulation (PDM) output. From the 94 signal flow perspective DSPK can be viewed as a PDM transmitter 95 that up-samples the input to the desired sampling rate by --- 160 unchanged lines hidden --- | 109config SND_SOC_TEGRA186_DSPK 110 tristate "Tegra186 DSPK module" 111 help 112 Config to enable the Digital Speaker Controller (DSPK) which 113 converts the multi-bit Pulse Code Modulation (PCM) audio input to 114 oversampled 1-bit Pulse Density Modulation (PDM) output. From the 115 signal flow perspective DSPK can be viewed as a PDM transmitter 116 that up-samples the input to the desired sampling rate by --- 160 unchanged lines hidden --- |