axg-fifo.h (82ffd0454bd9bd57780966d47bfd56d579dd4fb3) axg-fifo.h (7c02509a8a9981fb2c16b75904423e7ab2f9f43a)
1/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
2/*
3 * Copyright (c) 2018 BayLibre, SAS.
4 * Author: Jerome Brunet <jbrunet@baylibre.com>
5 */
6
7#ifndef _MESON_AXG_FIFO_H
8#define _MESON_AXG_FIFO_H

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55#define CTRL1_FRDDR_DEPTH_MASK GENMASK(31, 24)
56#define CTRL1_FRDDR_DEPTH(x) ((x) << 24)
57#define FIFO_START_ADDR 0x08
58#define FIFO_FINISH_ADDR 0x0c
59#define FIFO_INT_ADDR 0x10
60#define FIFO_STATUS1 0x14
61#define STATUS1_INT_STS(x) ((x) << 0)
62#define FIFO_STATUS2 0x18
1/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
2/*
3 * Copyright (c) 2018 BayLibre, SAS.
4 * Author: Jerome Brunet <jbrunet@baylibre.com>
5 */
6
7#ifndef _MESON_AXG_FIFO_H
8#define _MESON_AXG_FIFO_H

--- 46 unchanged lines hidden (view full) ---

55#define CTRL1_FRDDR_DEPTH_MASK GENMASK(31, 24)
56#define CTRL1_FRDDR_DEPTH(x) ((x) << 24)
57#define FIFO_START_ADDR 0x08
58#define FIFO_FINISH_ADDR 0x0c
59#define FIFO_INT_ADDR 0x10
60#define FIFO_STATUS1 0x14
61#define STATUS1_INT_STS(x) ((x) << 0)
62#define FIFO_STATUS2 0x18
63#define FIFO_INIT_ADDR 0x24
63
64struct axg_fifo {
65 struct regmap *map;
66 struct clk *pclk;
67 struct reset_control *arb;
68 int irq;
69};
70
71struct axg_fifo_match_data {
72 const struct snd_soc_component_driver *component_drv;
73 struct snd_soc_dai_driver *dai_drv;
74};
75
76extern const struct snd_pcm_ops axg_fifo_pcm_ops;
64
65struct axg_fifo {
66 struct regmap *map;
67 struct clk *pclk;
68 struct reset_control *arb;
69 int irq;
70};
71
72struct axg_fifo_match_data {
73 const struct snd_soc_component_driver *component_drv;
74 struct snd_soc_dai_driver *dai_drv;
75};
76
77extern const struct snd_pcm_ops axg_fifo_pcm_ops;
78extern const struct snd_pcm_ops g12a_fifo_pcm_ops;
77
78int axg_fifo_pcm_new(struct snd_soc_pcm_runtime *rtd, unsigned int type);
79int axg_fifo_probe(struct platform_device *pdev);
80
81#endif /* _MESON_AXG_FIFO_H */
79
80int axg_fifo_pcm_new(struct snd_soc_pcm_runtime *rtd, unsigned int type);
81int axg_fifo_probe(struct platform_device *pdev);
82
83#endif /* _MESON_AXG_FIFO_H */