axg-fifo.h (1913c7f3fc2514e09262baf2267a82dfdb215c39) axg-fifo.h (bb4ba744b1701caf6148ff3b4e8656bf4f6b4758)
1/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
2/*
3 * Copyright (c) 2018 BayLibre, SAS.
4 * Author: Jerome Brunet <jbrunet@baylibre.com>
5 */
6
7#ifndef _MESON_AXG_FIFO_H
8#define _MESON_AXG_FIFO_H
9
10struct clk;
11struct platform_device;
12struct regmap;
13struct reset_control;
14
15struct snd_soc_component_driver;
16struct snd_soc_dai;
17struct snd_soc_dai_driver;
1/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
2/*
3 * Copyright (c) 2018 BayLibre, SAS.
4 * Author: Jerome Brunet <jbrunet@baylibre.com>
5 */
6
7#ifndef _MESON_AXG_FIFO_H
8#define _MESON_AXG_FIFO_H
9
10struct clk;
11struct platform_device;
12struct regmap;
13struct reset_control;
14
15struct snd_soc_component_driver;
16struct snd_soc_dai;
17struct snd_soc_dai_driver;
18struct snd_pcm_ops;
18
19struct snd_soc_pcm_runtime;
20
21#define AXG_FIFO_CH_MAX 128
22#define AXG_FIFO_RATES (SNDRV_PCM_RATE_5512 | \
23 SNDRV_PCM_RATE_8000_192000)
24#define AXG_FIFO_FORMATS (SNDRV_PCM_FMTBIT_S8 | \
25 SNDRV_PCM_FMTBIT_S16_LE | \
26 SNDRV_PCM_FMTBIT_S20_LE | \

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70 int irq;
71};
72
73struct axg_fifo_match_data {
74 const struct snd_soc_component_driver *component_drv;
75 struct snd_soc_dai_driver *dai_drv;
76};
77
19struct snd_soc_pcm_runtime;
20
21#define AXG_FIFO_CH_MAX 128
22#define AXG_FIFO_RATES (SNDRV_PCM_RATE_5512 | \
23 SNDRV_PCM_RATE_8000_192000)
24#define AXG_FIFO_FORMATS (SNDRV_PCM_FMTBIT_S8 | \
25 SNDRV_PCM_FMTBIT_S16_LE | \
26 SNDRV_PCM_FMTBIT_S20_LE | \

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70 int irq;
71};
72
73struct axg_fifo_match_data {
74 const struct snd_soc_component_driver *component_drv;
75 struct snd_soc_dai_driver *dai_drv;
76};
77
78extern const struct snd_pcm_ops axg_fifo_pcm_ops;
79extern const struct snd_pcm_ops g12a_fifo_pcm_ops;
78int axg_fifo_pcm_open(struct snd_soc_component *component,
79 struct snd_pcm_substream *ss);
80int axg_fifo_pcm_close(struct snd_soc_component *component,
81 struct snd_pcm_substream *ss);
82int axg_fifo_pcm_hw_params(struct snd_soc_component *component,
83 struct snd_pcm_substream *ss,
84 struct snd_pcm_hw_params *params);
85int g12a_fifo_pcm_hw_params(struct snd_soc_component *component,
86 struct snd_pcm_substream *ss,
87 struct snd_pcm_hw_params *params);
88int axg_fifo_pcm_hw_free(struct snd_soc_component *component,
89 struct snd_pcm_substream *ss);
90snd_pcm_uframes_t axg_fifo_pcm_pointer(struct snd_soc_component *component,
91 struct snd_pcm_substream *ss);
92int axg_fifo_pcm_trigger(struct snd_soc_component *component,
93 struct snd_pcm_substream *ss, int cmd);
80
81int axg_fifo_pcm_new(struct snd_soc_pcm_runtime *rtd, unsigned int type);
82int axg_fifo_probe(struct platform_device *pdev);
83
84#endif /* _MESON_AXG_FIFO_H */
94
95int axg_fifo_pcm_new(struct snd_soc_pcm_runtime *rtd, unsigned int type);
96int axg_fifo_probe(struct platform_device *pdev);
97
98#endif /* _MESON_AXG_FIFO_H */