skl.h (bcc2a2dc3ba8c3a7aed856f840afa6a47e3cb8e0) skl.h (f2a167ca681d21aa46f127032cc005879c328823)
1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 * skl.h - HD Audio skylake defintions.
4 *
5 * Copyright (C) 2015 Intel Corp
6 * Author: Jeeja KP <jeeja.kp@intel.com>
7 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
8 *

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37#define DMA_CLK_CONTROLS 1
38#define DMA_TRANSMITION_START 2
39#define DMA_TRANSMITION_STOP 3
40
41#define AZX_VS_EM2_DUM BIT(23)
42#define AZX_REG_VS_EM2_L1SEN BIT(13)
43
44struct skl_dsp_resource {
1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 * skl.h - HD Audio skylake defintions.
4 *
5 * Copyright (C) 2015 Intel Corp
6 * Author: Jeeja KP <jeeja.kp@intel.com>
7 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
8 *

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37#define DMA_CLK_CONTROLS 1
38#define DMA_TRANSMITION_START 2
39#define DMA_TRANSMITION_STOP 3
40
41#define AZX_VS_EM2_DUM BIT(23)
42#define AZX_REG_VS_EM2_L1SEN BIT(13)
43
44struct skl_dsp_resource {
45 u32 max_mcps;
46 u32 max_mem;
45 u32 max_mem;
47 u32 mcps;
48 u32 mem;
49};
50
51struct skl_debug;
52
53struct skl_astate_param {
54 u32 kcps;
55 u32 clk_src;

--- 169 unchanged lines hidden --- 		46 u32 mem;
47};
48
49struct skl_debug;
50
51struct skl_astate_param {
52 u32 kcps;
53 u32 clk_src;

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