uda1380.c (5f2a9384a9291d898b4bf85c4fbf497eef582977) uda1380.c (6335d05548eece40092000aa91b64a50310d69d5)
1/*
2 * uda1380.c - Philips UDA1380 ALSA SoC audio driver
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 *
8 * Copyright (c) 2007 Philipp Zabel <philipp.zabel@gmail.com>

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20#include <linux/init.h>
21#include <linux/types.h>
22#include <linux/string.h>
23#include <linux/slab.h>
24#include <linux/errno.h>
25#include <linux/ioctl.h>
26#include <linux/delay.h>
27#include <linux/i2c.h>
1/*
2 * uda1380.c - Philips UDA1380 ALSA SoC audio driver
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 *
8 * Copyright (c) 2007 Philipp Zabel <philipp.zabel@gmail.com>

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20#include <linux/init.h>
21#include <linux/types.h>
22#include <linux/string.h>
23#include <linux/slab.h>
24#include <linux/errno.h>
25#include <linux/ioctl.h>
26#include <linux/delay.h>
27#include <linux/i2c.h>
28#include <linux/workqueue.h>
29#include <sound/core.h>
30#include <sound/control.h>
31#include <sound/initval.h>
32#include <sound/info.h>
33#include <sound/soc.h>
34#include <sound/soc-dapm.h>
35#include <sound/tlv.h>
36
37#include "uda1380.h"
38
28#include <sound/core.h>
29#include <sound/control.h>
30#include <sound/initval.h>
31#include <sound/info.h>
32#include <sound/soc.h>
33#include <sound/soc-dapm.h>
34#include <sound/tlv.h>
35
36#include "uda1380.h"
37
39static struct work_struct uda1380_work;
40static struct snd_soc_codec *uda1380_codec;
38#define UDA1380_VERSION "0.6"
41
42/*
43 * uda1380 register cache
44 */
45static const u16 uda1380_reg[UDA1380_CACHEREGNUM] = {
46 0x0502, 0x0000, 0x0000, 0x3f3f,
47 0x0202, 0x0000, 0x0000, 0x0000,
48 0x0000, 0x0000, 0x0000, 0x0000,
49 0x0000, 0x0000, 0x0000, 0x0000,
50 0x0000, 0xff00, 0x0000, 0x4800,
51 0x0000, 0x0000, 0x0000, 0x0000,
52 0x0000, 0x0000, 0x0000, 0x0000,
53 0x0000, 0x0000, 0x0000, 0x0000,
54 0x0000, 0x8000, 0x0002, 0x0000,
55};
56
39
40/*
41 * uda1380 register cache
42 */
43static const u16 uda1380_reg[UDA1380_CACHEREGNUM] = {
44 0x0502, 0x0000, 0x0000, 0x3f3f,
45 0x0202, 0x0000, 0x0000, 0x0000,
46 0x0000, 0x0000, 0x0000, 0x0000,
47 0x0000, 0x0000, 0x0000, 0x0000,
48 0x0000, 0xff00, 0x0000, 0x4800,
49 0x0000, 0x0000, 0x0000, 0x0000,
50 0x0000, 0x0000, 0x0000, 0x0000,
51 0x0000, 0x0000, 0x0000, 0x0000,
52 0x0000, 0x8000, 0x0002, 0x0000,
53};
54
57static unsigned long uda1380_cache_dirty;
58
59/*
60 * read uda1380 register cache
61 */
62static inline unsigned int uda1380_read_reg_cache(struct snd_soc_codec *codec,
63 unsigned int reg)
64{
65 u16 *cache = codec->reg_cache;
66 if (reg == UDA1380_RESET)

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72
73/*
74 * write uda1380 register cache
75 */
76static inline void uda1380_write_reg_cache(struct snd_soc_codec *codec,
77 u16 reg, unsigned int value)
78{
79 u16 *cache = codec->reg_cache;
55/*
56 * read uda1380 register cache
57 */
58static inline unsigned int uda1380_read_reg_cache(struct snd_soc_codec *codec,
59 unsigned int reg)
60{
61 u16 *cache = codec->reg_cache;
62 if (reg == UDA1380_RESET)

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68
69/*
70 * write uda1380 register cache
71 */
72static inline void uda1380_write_reg_cache(struct snd_soc_codec *codec,
73 u16 reg, unsigned int value)
74{
75 u16 *cache = codec->reg_cache;
80
81 if (reg >= UDA1380_CACHEREGNUM)
82 return;
76 if (reg >= UDA1380_CACHEREGNUM)
77 return;
83 if ((reg >= 0x10) && (cache[reg] != value))
84 set_bit(reg - 0x10, &uda1380_cache_dirty);
85 cache[reg] = value;
86}
87
88/*
89 * write to the UDA1380 register space
90 */
91static int uda1380_write(struct snd_soc_codec *codec, unsigned int reg,
92 unsigned int value)

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115 i2c_master_send(codec->control_data, data, 1);
116 i2c_master_recv(codec->control_data, data, 2);
117 val = (data[0]<<8) | data[1];
118 if (val != value) {
119 pr_debug("uda1380: READ BACK VAL %x\n",
120 (data[0]<<8) | data[1]);
121 return -EIO;
122 }
78 cache[reg] = value;
79}
80
81/*
82 * write to the UDA1380 register space
83 */
84static int uda1380_write(struct snd_soc_codec *codec, unsigned int reg,
85 unsigned int value)

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108 i2c_master_send(codec->control_data, data, 1);
109 i2c_master_recv(codec->control_data, data, 2);
110 val = (data[0]<<8) | data[1];
111 if (val != value) {
112 pr_debug("uda1380: READ BACK VAL %x\n",
113 (data[0]<<8) | data[1]);
114 return -EIO;
115 }
123 if (reg >= 0x10)
124 clear_bit(reg - 0x10, &uda1380_cache_dirty);
125 return 0;
126 } else
127 return -EIO;
128}
129
130#define uda1380_reset(c) uda1380_write(c, UDA1380_RESET, 0)
131
116 return 0;
117 } else
118 return -EIO;
119}
120
121#define uda1380_reset(c) uda1380_write(c, UDA1380_RESET, 0)
122
132static void uda1380_flush_work(struct work_struct *work)
133{
134 int bit, reg;
135
136 for_each_bit(bit, &uda1380_cache_dirty, UDA1380_CACHEREGNUM - 0x10) {
137 reg = 0x10 + bit;
138 pr_debug("uda1380: flush reg %x val %x:\n", reg,
139 uda1380_read_reg_cache(uda1380_codec, reg));
140 uda1380_write(uda1380_codec, reg,
141 uda1380_read_reg_cache(uda1380_codec, reg));
142 clear_bit(bit, &uda1380_cache_dirty);
143 }
144}
145
146/* declarations of ALSA reg_elem_REAL controls */
147static const char *uda1380_deemp[] = {
148 "None",
149 "32kHz",
150 "44.1kHz",
151 "48kHz",
152 "96kHz",
153};

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272/**/ SOC_SINGLE("Master Playback Switch", UDA1380_DEEMP, 14, 1, 1), /* MTM */
273 SOC_SINGLE("ADC Playback Switch", UDA1380_DEEMP, 11, 1, 1), /* MT2 from decimation filter */
274 SOC_ENUM("ADC Playback De-emphasis", uda1380_deemp_enum[0]), /* DE2 */
275 SOC_SINGLE("PCM Playback Switch", UDA1380_DEEMP, 3, 1, 1), /* MT1, from digital data input */
276 SOC_ENUM("PCM Playback De-emphasis", uda1380_deemp_enum[1]), /* DE1 */
277 SOC_SINGLE("DAC Polarity inverting Switch", UDA1380_MIXER, 15, 1, 0), /* DA_POL_INV */
278 SOC_ENUM("Noise Shaper", uda1380_sel_ns_enum), /* SEL_NS */
279 SOC_ENUM("Digital Mixer Signal Control", uda1380_mix_enum), /* MIX_POS, MIX */
123/* declarations of ALSA reg_elem_REAL controls */
124static const char *uda1380_deemp[] = {
125 "None",
126 "32kHz",
127 "44.1kHz",
128 "48kHz",
129 "96kHz",
130};

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249/**/ SOC_SINGLE("Master Playback Switch", UDA1380_DEEMP, 14, 1, 1), /* MTM */
250 SOC_SINGLE("ADC Playback Switch", UDA1380_DEEMP, 11, 1, 1), /* MT2 from decimation filter */
251 SOC_ENUM("ADC Playback De-emphasis", uda1380_deemp_enum[0]), /* DE2 */
252 SOC_SINGLE("PCM Playback Switch", UDA1380_DEEMP, 3, 1, 1), /* MT1, from digital data input */
253 SOC_ENUM("PCM Playback De-emphasis", uda1380_deemp_enum[1]), /* DE1 */
254 SOC_SINGLE("DAC Polarity inverting Switch", UDA1380_MIXER, 15, 1, 0), /* DA_POL_INV */
255 SOC_ENUM("Noise Shaper", uda1380_sel_ns_enum), /* SEL_NS */
256 SOC_ENUM("Digital Mixer Signal Control", uda1380_mix_enum), /* MIX_POS, MIX */
257 SOC_SINGLE("Silence Switch", UDA1380_MIXER, 7, 1, 0), /* SILENCE, force DAC output to silence */
280 SOC_SINGLE("Silence Detector Switch", UDA1380_MIXER, 6, 1, 0), /* SDET_ON */
281 SOC_ENUM("Silence Detector Setting", uda1380_sdet_enum), /* SD_VALUE */
282 SOC_ENUM("Oversampling Input", uda1380_os_enum), /* OS */
283 SOC_DOUBLE_S8_TLV("ADC Capture Volume", UDA1380_DEC, -128, 48, dec_tlv), /* ML_DEC, MR_DEC */
284/**/ SOC_SINGLE("ADC Capture Switch", UDA1380_PGA, 15, 1, 1), /* MT_ADC */
285 SOC_DOUBLE_TLV("Line Capture Volume", UDA1380_PGA, 0, 8, 8, 0, pga_tlv), /* PGA_GAINCTRLL, PGA_GAINCTRLR */
286 SOC_SINGLE("ADC Polarity inverting Switch", UDA1380_ADC, 12, 1, 0), /* ADCPOL_INV */
287 SOC_SINGLE_TLV("Mic Capture Volume", UDA1380_ADC, 8, 15, 0, vga_tlv), /* VGA_CTRL */

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394 break;
395 case SND_SOC_DAIFMT_LSB:
396 iface |= R01_SFORI_LSB16 | R01_SFORO_LSB16;
397 break;
398 case SND_SOC_DAIFMT_MSB:
399 iface |= R01_SFORI_MSB | R01_SFORO_MSB;
400 }
401
258 SOC_SINGLE("Silence Detector Switch", UDA1380_MIXER, 6, 1, 0), /* SDET_ON */
259 SOC_ENUM("Silence Detector Setting", uda1380_sdet_enum), /* SD_VALUE */
260 SOC_ENUM("Oversampling Input", uda1380_os_enum), /* OS */
261 SOC_DOUBLE_S8_TLV("ADC Capture Volume", UDA1380_DEC, -128, 48, dec_tlv), /* ML_DEC, MR_DEC */
262/**/ SOC_SINGLE("ADC Capture Switch", UDA1380_PGA, 15, 1, 1), /* MT_ADC */
263 SOC_DOUBLE_TLV("Line Capture Volume", UDA1380_PGA, 0, 8, 8, 0, pga_tlv), /* PGA_GAINCTRLL, PGA_GAINCTRLR */
264 SOC_SINGLE("ADC Polarity inverting Switch", UDA1380_ADC, 12, 1, 0), /* ADCPOL_INV */
265 SOC_SINGLE_TLV("Mic Capture Volume", UDA1380_ADC, 8, 15, 0, vga_tlv), /* VGA_CTRL */

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372 break;
373 case SND_SOC_DAIFMT_LSB:
374 iface |= R01_SFORI_LSB16 | R01_SFORO_LSB16;
375 break;
376 case SND_SOC_DAIFMT_MSB:
377 iface |= R01_SFORI_MSB | R01_SFORO_MSB;
378 }
379
402 /* DATAI is slave only, so in single-link mode, this has to be slave */
403 if ((fmt & SND_SOC_DAIFMT_MASTER_MASK) != SND_SOC_DAIFMT_CBS_CFS)
404 return -EINVAL;
380 if ((fmt & SND_SOC_DAIFMT_MASTER_MASK) == SND_SOC_DAIFMT_CBM_CFM)
381 iface |= R01_SIM;
405
406 uda1380_write(codec, UDA1380_IFACE, iface);
407
408 return 0;
409}
410
411static int uda1380_set_dai_fmt_playback(struct snd_soc_dai *codec_dai,
412 unsigned int fmt)

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424 break;
425 case SND_SOC_DAIFMT_LSB:
426 iface |= R01_SFORI_LSB16;
427 break;
428 case SND_SOC_DAIFMT_MSB:
429 iface |= R01_SFORI_MSB;
430 }
431
382
383 uda1380_write(codec, UDA1380_IFACE, iface);
384
385 return 0;
386}
387
388static int uda1380_set_dai_fmt_playback(struct snd_soc_dai *codec_dai,
389 unsigned int fmt)

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401 break;
402 case SND_SOC_DAIFMT_LSB:
403 iface |= R01_SFORI_LSB16;
404 break;
405 case SND_SOC_DAIFMT_MSB:
406 iface |= R01_SFORI_MSB;
407 }
408
432 /* DATAI is slave only, so this has to be slave */
433 if ((fmt & SND_SOC_DAIFMT_MASTER_MASK) != SND_SOC_DAIFMT_CBS_CFS)
434 return -EINVAL;
435
436 uda1380_write(codec, UDA1380_IFACE, iface);
437
438 return 0;
439}
440
441static int uda1380_set_dai_fmt_capture(struct snd_soc_dai *codec_dai,
442 unsigned int fmt)
443{

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462 if ((fmt & SND_SOC_DAIFMT_MASTER_MASK) == SND_SOC_DAIFMT_CBM_CFM)
463 iface |= R01_SIM;
464
465 uda1380_write(codec, UDA1380_IFACE, iface);
466
467 return 0;
468}
469
409 uda1380_write(codec, UDA1380_IFACE, iface);
410
411 return 0;
412}
413
414static int uda1380_set_dai_fmt_capture(struct snd_soc_dai *codec_dai,
415 unsigned int fmt)
416{

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435 if ((fmt & SND_SOC_DAIFMT_MASTER_MASK) == SND_SOC_DAIFMT_CBM_CFM)
436 iface |= R01_SIM;
437
438 uda1380_write(codec, UDA1380_IFACE, iface);
439
440 return 0;
441}
442
470static int uda1380_trigger(struct snd_pcm_substream *substream, int cmd,
471 struct snd_soc_dai *dai)
443/*
444 * Flush reg cache
445 * We can only write the interpolator and decimator registers
446 * when the DAI is being clocked by the CPU DAI. It's up to the
447 * machine and cpu DAI driver to do this before we are called.
448 */
449static int uda1380_pcm_prepare(struct snd_pcm_substream *substream,
450 struct snd_soc_dai *dai)
472{
473 struct snd_soc_pcm_runtime *rtd = substream->private_data;
474 struct snd_soc_device *socdev = rtd->socdev;
475 struct snd_soc_codec *codec = socdev->card->codec;
451{
452 struct snd_soc_pcm_runtime *rtd = substream->private_data;
453 struct snd_soc_device *socdev = rtd->socdev;
454 struct snd_soc_codec *codec = socdev->card->codec;
476 int mixer = uda1380_read_reg_cache(codec, UDA1380_MIXER);
455 int reg, reg_start, reg_end, clk;
477
456
478 switch (cmd) {
479 case SNDRV_PCM_TRIGGER_START:
480 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
481 uda1380_write_reg_cache(codec, UDA1380_MIXER,
482 mixer & ~R14_SILENCE);
483 schedule_work(&uda1380_work);
484 break;
485 case SNDRV_PCM_TRIGGER_STOP:
486 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
487 uda1380_write_reg_cache(codec, UDA1380_MIXER,
488 mixer | R14_SILENCE);
489 schedule_work(&uda1380_work);
490 break;
457 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
458 reg_start = UDA1380_MVOL;
459 reg_end = UDA1380_MIXER;
460 } else {
461 reg_start = UDA1380_DEC;
462 reg_end = UDA1380_AGC;
491 }
463 }
464
465 /* FIXME disable DAC_CLK */
466 clk = uda1380_read_reg_cache(codec, UDA1380_CLK);
467 uda1380_write(codec, UDA1380_CLK, clk & ~R00_DAC_CLK);
468
469 for (reg = reg_start; reg <= reg_end; reg++) {
470 pr_debug("uda1380: flush reg %x val %x:", reg,
471 uda1380_read_reg_cache(codec, reg));
472 uda1380_write(codec, reg, uda1380_read_reg_cache(codec, reg));
473 }
474
475 /* FIXME restore DAC_CLK */
476 uda1380_write(codec, UDA1380_CLK, clk);
477
492 return 0;
493}
494
495static int uda1380_pcm_hw_params(struct snd_pcm_substream *substream,
496 struct snd_pcm_hw_params *params,
497 struct snd_soc_dai *dai)
498{
499 struct snd_soc_pcm_runtime *rtd = substream->private_data;

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549 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
550 clk &= ~(R00_EN_DAC | R00_EN_INT);
551 else
552 clk &= ~(R00_EN_ADC | R00_EN_DEC);
553
554 uda1380_write(codec, UDA1380_CLK, clk);
555}
556
478 return 0;
479}
480
481static int uda1380_pcm_hw_params(struct snd_pcm_substream *substream,
482 struct snd_pcm_hw_params *params,
483 struct snd_soc_dai *dai)
484{
485 struct snd_soc_pcm_runtime *rtd = substream->private_data;

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535 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
536 clk &= ~(R00_EN_DAC | R00_EN_INT);
537 else
538 clk &= ~(R00_EN_ADC | R00_EN_DEC);
539
540 uda1380_write(codec, UDA1380_CLK, clk);
541}
542
543static int uda1380_mute(struct snd_soc_dai *codec_dai, int mute)
544{
545 struct snd_soc_codec *codec = codec_dai->codec;
546 u16 mute_reg = uda1380_read_reg_cache(codec, UDA1380_DEEMP) & ~R13_MTM;
547
548 /* FIXME: mute(codec,0) is called when the magician clock is already
549 * set to WSPLL, but for some unknown reason writing to interpolator
550 * registers works only when clocked by SYSCLK */
551 u16 clk = uda1380_read_reg_cache(codec, UDA1380_CLK);
552 uda1380_write(codec, UDA1380_CLK, ~R00_DAC_CLK & clk);
553 if (mute)
554 uda1380_write(codec, UDA1380_DEEMP, mute_reg | R13_MTM);
555 else
556 uda1380_write(codec, UDA1380_DEEMP, mute_reg);
557 uda1380_write(codec, UDA1380_CLK, clk);
558 return 0;
559}
560
557static int uda1380_set_bias_level(struct snd_soc_codec *codec,
558 enum snd_soc_bias_level level)
559{
560 int pm = uda1380_read_reg_cache(codec, UDA1380_PM);
561
562 switch (level) {
563 case SND_SOC_BIAS_ON:
564 case SND_SOC_BIAS_PREPARE:

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574 codec->bias_level = level;
575 return 0;
576}
577
578#define UDA1380_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\
579 SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 |\
580 SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000)
581
561static int uda1380_set_bias_level(struct snd_soc_codec *codec,
562 enum snd_soc_bias_level level)
563{
564 int pm = uda1380_read_reg_cache(codec, UDA1380_PM);
565
566 switch (level) {
567 case SND_SOC_BIAS_ON:
568 case SND_SOC_BIAS_PREPARE:

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578 codec->bias_level = level;
579 return 0;
580}
581
582#define UDA1380_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\
583 SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 |\
584 SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000)
585
586static struct snd_soc_dai_ops uda1380_dai_ops = {
587 .hw_params = uda1380_pcm_hw_params,
588 .shutdown = uda1380_pcm_shutdown,
589 .prepare = uda1380_pcm_prepare,
590 .digital_mute = uda1380_mute,
591 .set_fmt = uda1380_set_dai_fmt_both,
592};
593
594static struct snd_soc_dai_ops uda1380_dai_ops_playback = {
595 .hw_params = uda1380_pcm_hw_params,
596 .shutdown = uda1380_pcm_shutdown,
597 .prepare = uda1380_pcm_prepare,
598 .digital_mute = uda1380_mute,
599 .set_fmt = uda1380_set_dai_fmt_playback,
600};
601
602static struct snd_soc_dai_ops uda1380_dai_ops_capture = {
603 .hw_params = uda1380_pcm_hw_params,
604 .shutdown = uda1380_pcm_shutdown,
605 .prepare = uda1380_pcm_prepare,
606 .set_fmt = uda1380_set_dai_fmt_capture,
607};
608
582struct snd_soc_dai uda1380_dai[] = {
583{
584 .name = "UDA1380",
585 .playback = {
586 .stream_name = "Playback",
587 .channels_min = 1,
588 .channels_max = 2,
589 .rates = UDA1380_RATES,
590 .formats = SNDRV_PCM_FMTBIT_S16_LE,},
591 .capture = {
592 .stream_name = "Capture",
593 .channels_min = 1,
594 .channels_max = 2,
595 .rates = UDA1380_RATES,
596 .formats = SNDRV_PCM_FMTBIT_S16_LE,},
609struct snd_soc_dai uda1380_dai[] = {
610{
611 .name = "UDA1380",
612 .playback = {
613 .stream_name = "Playback",
614 .channels_min = 1,
615 .channels_max = 2,
616 .rates = UDA1380_RATES,
617 .formats = SNDRV_PCM_FMTBIT_S16_LE,},
618 .capture = {
619 .stream_name = "Capture",
620 .channels_min = 1,
621 .channels_max = 2,
622 .rates = UDA1380_RATES,
623 .formats = SNDRV_PCM_FMTBIT_S16_LE,},
597 .ops = {
598 .trigger = uda1380_trigger,
599 .hw_params = uda1380_pcm_hw_params,
600 .shutdown = uda1380_pcm_shutdown,
601 .set_fmt = uda1380_set_dai_fmt_both,
602 },
624 .ops = &uda1380_dai_ops,
603},
604{ /* playback only - dual interface */
605 .name = "UDA1380",
606 .playback = {
607 .stream_name = "Playback",
608 .channels_min = 1,
609 .channels_max = 2,
610 .rates = UDA1380_RATES,
611 .formats = SNDRV_PCM_FMTBIT_S16_LE,
612 },
625},
626{ /* playback only - dual interface */
627 .name = "UDA1380",
628 .playback = {
629 .stream_name = "Playback",
630 .channels_min = 1,
631 .channels_max = 2,
632 .rates = UDA1380_RATES,
633 .formats = SNDRV_PCM_FMTBIT_S16_LE,
634 },
613 .ops = {
614 .trigger = uda1380_trigger,
615 .hw_params = uda1380_pcm_hw_params,
616 .shutdown = uda1380_pcm_shutdown,
617 .set_fmt = uda1380_set_dai_fmt_playback,
618 },
635 .ops = &uda1380_dai_ops_playback,
619},
620{ /* capture only - dual interface*/
621 .name = "UDA1380",
622 .capture = {
623 .stream_name = "Capture",
624 .channels_min = 1,
625 .channels_max = 2,
626 .rates = UDA1380_RATES,
627 .formats = SNDRV_PCM_FMTBIT_S16_LE,
628 },
636},
637{ /* capture only - dual interface*/
638 .name = "UDA1380",
639 .capture = {
640 .stream_name = "Capture",
641 .channels_min = 1,
642 .channels_max = 2,
643 .rates = UDA1380_RATES,
644 .formats = SNDRV_PCM_FMTBIT_S16_LE,
645 },
629 .ops = {
630 .trigger = uda1380_trigger,
631 .hw_params = uda1380_pcm_hw_params,
632 .shutdown = uda1380_pcm_shutdown,
633 .set_fmt = uda1380_set_dai_fmt_capture,
634 },
646 .ops = &uda1380_dai_ops_capture,
635},
636};
637EXPORT_SYMBOL_GPL(uda1380_dai);
638
639static int uda1380_suspend(struct platform_device *pdev, pm_message_t state)
640{
641 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
642 struct snd_soc_codec *codec = socdev->card->codec;

--- 40 unchanged lines hidden (view full) ---

683 codec->reg_cache = kmemdup(uda1380_reg, sizeof(uda1380_reg),
684 GFP_KERNEL);
685 if (codec->reg_cache == NULL)
686 return -ENOMEM;
687 codec->reg_cache_size = ARRAY_SIZE(uda1380_reg);
688 codec->reg_cache_step = 1;
689 uda1380_reset(codec);
690
647},
648};
649EXPORT_SYMBOL_GPL(uda1380_dai);
650
651static int uda1380_suspend(struct platform_device *pdev, pm_message_t state)
652{
653 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
654 struct snd_soc_codec *codec = socdev->card->codec;

--- 40 unchanged lines hidden (view full) ---

695 codec->reg_cache = kmemdup(uda1380_reg, sizeof(uda1380_reg),
696 GFP_KERNEL);
697 if (codec->reg_cache == NULL)
698 return -ENOMEM;
699 codec->reg_cache_size = ARRAY_SIZE(uda1380_reg);
700 codec->reg_cache_step = 1;
701 uda1380_reset(codec);
702
691 uda1380_codec = codec;
692 INIT_WORK(&uda1380_work, uda1380_flush_work);
693
694 /* register pcms */
695 ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1);
696 if (ret < 0) {
697 pr_err("uda1380: failed to create pcms\n");
698 goto pcm_err;
699 }
700
701 /* power on device */

--- 116 unchanged lines hidden (view full) ---

818
819static int uda1380_probe(struct platform_device *pdev)
820{
821 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
822 struct uda1380_setup_data *setup;
823 struct snd_soc_codec *codec;
824 int ret;
825
703 /* register pcms */
704 ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1);
705 if (ret < 0) {
706 pr_err("uda1380: failed to create pcms\n");
707 goto pcm_err;
708 }
709
710 /* power on device */

--- 116 unchanged lines hidden (view full) ---

827
828static int uda1380_probe(struct platform_device *pdev)
829{
830 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
831 struct uda1380_setup_data *setup;
832 struct snd_soc_codec *codec;
833 int ret;
834
835 pr_info("UDA1380 Audio Codec %s", UDA1380_VERSION);
836
826 setup = socdev->codec_data;
827 codec = kzalloc(sizeof(struct snd_soc_codec), GFP_KERNEL);
828 if (codec == NULL)
829 return -ENOMEM;
830
831 socdev->card->codec = codec;
832 mutex_init(&codec->mutex);
833 INIT_LIST_HEAD(&codec->dapm_widgets);

--- 60 unchanged lines hidden --- 		837 setup = socdev->codec_data;
838 codec = kzalloc(sizeof(struct snd_soc_codec), GFP_KERNEL);
839 if (codec == NULL)
840 return -ENOMEM;
841
842 socdev->card->codec = codec;
843 mutex_init(&codec->mutex);
844 INIT_LIST_HEAD(&codec->dapm_widgets);

--- 60 unchanged lines hidden ---