| rt5645.h (44cc6c08da0b6c8321c6740bbb6a0c6feb45b2c2) | rt5645.h (e29fd55d8d23ea7afcadd15a87700583e7da5035) |
|---|---|
| 1/* 2 * rt5645.h -- RT5645 ALSA SoC audio driver 3 * 4 * Copyright 2013 Realtek Microelectronics 5 * Author: Bard Liao <bardliao@realtek.com> 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License version 2 as --- 654 unchanged lines hidden (view full) --- 663#define RT5645_M_BST3_SPM_L_SFT 11 664#define RT5645_M_DAC_R1_SPM_R (0x1 << 2) 665#define RT5645_M_DAC_R1_SPM_R_SFT 2 666#define RT5645_M_BST3_SPM_R (0x1 << 1) 667#define RT5645_M_BST3_SPM_R_SFT 1 668#define RT5645_M_SV_R_SPM_R (0x1 << 0) 669#define RT5645_M_SV_R_SPM_R_SFT 0 670 | 1/* 2 * rt5645.h -- RT5645 ALSA SoC audio driver 3 * 4 * Copyright 2013 Realtek Microelectronics 5 * Author: Bard Liao <bardliao@realtek.com> 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License version 2 as --- 654 unchanged lines hidden (view full) --- 663#define RT5645_M_BST3_SPM_L_SFT 11 664#define RT5645_M_DAC_R1_SPM_R (0x1 << 2) 665#define RT5645_M_DAC_R1_SPM_R_SFT 2 666#define RT5645_M_BST3_SPM_R (0x1 << 1) 667#define RT5645_M_BST3_SPM_R_SFT 1 668#define RT5645_M_SV_R_SPM_R (0x1 << 0) 669#define RT5645_M_SV_R_SPM_R_SFT 0 670 |
| 671/* SPOMIX Ratio Control (0x4a) */ 672#define RT5645_SPK_G_CLSD_MASK (0x7 << 0) 673#define RT5645_SPK_G_CLSD_SFT 0 674 |
|
| 671/* Mono Output Mixer Control (0x4c) */ 672#define RT5645_M_OV_L_MM (0x1 << 9) 673#define RT5645_M_OV_L_MM_SFT 9 674#define RT5645_M_DAC_L2_MA (0x1 << 8) 675#define RT5645_M_DAC_L2_MA_SFT 8 676#define RT5645_G_MONOMIX_MASK (0x1 << 10) 677#define RT5645_G_MONOMIX_SFT 10 678#define RT5645_M_BST2_MM (0x1 << 4) --- 93 unchanged lines hidden (view full) --- 772#define RT5645_PWR_DAC_L1 (0x1 << 12) 773#define RT5645_PWR_DAC_L1_BIT 12 774#define RT5645_PWR_DAC_R1 (0x1 << 11) 775#define RT5645_PWR_DAC_R1_BIT 11 776#define RT5645_PWR_CLS_D_R (0x1 << 9) 777#define RT5645_PWR_CLS_D_R_BIT 9 778#define RT5645_PWR_CLS_D_L (0x1 << 8) 779#define RT5645_PWR_CLS_D_L_BIT 8 | 675/* Mono Output Mixer Control (0x4c) */ 676#define RT5645_M_OV_L_MM (0x1 << 9) 677#define RT5645_M_OV_L_MM_SFT 9 678#define RT5645_M_DAC_L2_MA (0x1 << 8) 679#define RT5645_M_DAC_L2_MA_SFT 8 680#define RT5645_G_MONOMIX_MASK (0x1 << 10) 681#define RT5645_G_MONOMIX_SFT 10 682#define RT5645_M_BST2_MM (0x1 << 4) --- 93 unchanged lines hidden (view full) --- 776#define RT5645_PWR_DAC_L1 (0x1 << 12) 777#define RT5645_PWR_DAC_L1_BIT 12 778#define RT5645_PWR_DAC_R1 (0x1 << 11) 779#define RT5645_PWR_DAC_R1_BIT 11 780#define RT5645_PWR_CLS_D_R (0x1 << 9) 781#define RT5645_PWR_CLS_D_R_BIT 9 782#define RT5645_PWR_CLS_D_L (0x1 << 8) 783#define RT5645_PWR_CLS_D_L_BIT 8 |
| 780#define RT5645_PWR_ADC_R (0x1 << 1) 781#define RT5645_PWR_ADC_R_BIT 1 | |
| 782#define RT5645_PWR_DAC_L2 (0x1 << 7) 783#define RT5645_PWR_DAC_L2_BIT 7 784#define RT5645_PWR_DAC_R2 (0x1 << 6) 785#define RT5645_PWR_DAC_R2_BIT 6 786#define RT5645_PWR_ADC_L (0x1 << 2) 787#define RT5645_PWR_ADC_L_BIT 2 788#define RT5645_PWR_ADC_R (0x1 << 1) 789#define RT5645_PWR_ADC_R_BIT 1 --- 831 unchanged lines hidden (view full) --- 1621#define RT5645_JD_P_SFT 11 1622#define RT5645_JD_P_NOR (0x0 << 11) 1623#define RT5645_JD_P_INV (0x1 << 11) 1624#define RT5645_OT_P_MASK (0x1 << 10) 1625#define RT5645_OT_P_SFT 10 1626#define RT5645_OT_P_NOR (0x0 << 10) 1627#define RT5645_OT_P_INV (0x1 << 10) 1628#define RT5645_IRQ_JD_1_1_EN (0x1 << 9) | 784#define RT5645_PWR_DAC_L2 (0x1 << 7) 785#define RT5645_PWR_DAC_L2_BIT 7 786#define RT5645_PWR_DAC_R2 (0x1 << 6) 787#define RT5645_PWR_DAC_R2_BIT 6 788#define RT5645_PWR_ADC_L (0x1 << 2) 789#define RT5645_PWR_ADC_L_BIT 2 790#define RT5645_PWR_ADC_R (0x1 << 1) 791#define RT5645_PWR_ADC_R_BIT 1 --- 831 unchanged lines hidden (view full) --- 1623#define RT5645_JD_P_SFT 11 1624#define RT5645_JD_P_NOR (0x0 << 11) 1625#define RT5645_JD_P_INV (0x1 << 11) 1626#define RT5645_OT_P_MASK (0x1 << 10) 1627#define RT5645_OT_P_SFT 10 1628#define RT5645_OT_P_NOR (0x0 << 10) 1629#define RT5645_OT_P_INV (0x1 << 10) 1630#define RT5645_IRQ_JD_1_1_EN (0x1 << 9) |
| 1631#define RT5645_JD_1_1_MASK (0x1 << 7) 1632#define RT5645_JD_1_1_SFT 7 1633#define RT5645_JD_1_1_NOR (0x0 << 7) 1634#define RT5645_JD_1_1_INV (0x1 << 7) |
|
| 1629 1630/* IRQ Control 2 (0xbe) */ 1631#define RT5645_IRQ_MB1_OC_MASK (0x1 << 15) 1632#define RT5645_IRQ_MB1_OC_SFT 15 1633#define RT5645_IRQ_MB1_OC_BP (0x0 << 15) 1634#define RT5645_IRQ_MB1_OC_NOR (0x1 << 15) 1635#define RT5645_IRQ_MB2_OC_MASK (0x1 << 14) 1636#define RT5645_IRQ_MB2_OC_SFT 14 --- 552 unchanged lines hidden --- | 1635 1636/* IRQ Control 2 (0xbe) */ 1637#define RT5645_IRQ_MB1_OC_MASK (0x1 << 15) 1638#define RT5645_IRQ_MB1_OC_SFT 15 1639#define RT5645_IRQ_MB1_OC_BP (0x0 << 15) 1640#define RT5645_IRQ_MB1_OC_NOR (0x1 << 15) 1641#define RT5645_IRQ_MB2_OC_MASK (0x1 << 14) 1642#define RT5645_IRQ_MB2_OC_SFT 14 --- 552 unchanged lines hidden --- |