| rt5645.h (1b62f19c3c0722d9b3ac20f41225f582f2277d81) | rt5645.h (bb656add19764c7a3cf28b2b330ec0a189fe4f48) |
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| 1/* 2 * rt5645.h -- RT5645 ALSA SoC audio driver 3 * 4 * Copyright 2013 Realtek Microelectronics 5 * Author: Bard Liao <bardliao@realtek.com> 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License version 2 as --- 1334 unchanged lines hidden (view full) --- 1343#define RT5645_PWR_MB_MASK (0x1 << 5) 1344#define RT5645_PWR_MB_SFT 5 1345#define RT5645_PWR_MB_PD (0x0 << 5) 1346#define RT5645_PWR_MB_PU (0x1 << 5) 1347#define RT5645_PWR_CLK25M_MASK (0x1 << 4) 1348#define RT5645_PWR_CLK25M_SFT 4 1349#define RT5645_PWR_CLK25M_PD (0x0 << 4) 1350#define RT5645_PWR_CLK25M_PU (0x1 << 4) | 1/* 2 * rt5645.h -- RT5645 ALSA SoC audio driver 3 * 4 * Copyright 2013 Realtek Microelectronics 5 * Author: Bard Liao <bardliao@realtek.com> 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License version 2 as --- 1334 unchanged lines hidden (view full) --- 1343#define RT5645_PWR_MB_MASK (0x1 << 5) 1344#define RT5645_PWR_MB_SFT 5 1345#define RT5645_PWR_MB_PD (0x0 << 5) 1346#define RT5645_PWR_MB_PU (0x1 << 5) 1347#define RT5645_PWR_CLK25M_MASK (0x1 << 4) 1348#define RT5645_PWR_CLK25M_SFT 4 1349#define RT5645_PWR_CLK25M_PD (0x0 << 4) 1350#define RT5645_PWR_CLK25M_PU (0x1 << 4) |
| 1351#define RT5645_IRQ_CLK_MCLK (0x0 << 3) 1352#define RT5645_IRQ_CLK_INT (0x1 << 3) |
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| 1351 1352/* VAD Control 4 (0x9d) */ 1353#define RT5645_VAD_SEL_MASK (0x3 << 8) 1354#define RT5645_VAD_SEL_SFT 8 1355 1356/* EQ Control 1 (0xb0) */ 1357#define RT5645_EQ_SRC_MASK (0x1 << 15) 1358#define RT5645_EQ_SRC_SFT 15 --- 752 unchanged lines hidden (view full) --- 2111#define RT5645_RXDC_SRC_STO (0x0 << 7) 2112#define RT5645_RXDC_SRC_MONO (0x1 << 7) 2113#define RT5645_RXDC_SRC_SFT (7) 2114#define RT5645_RXDP2_SEL_MASK (0x1 << 3) 2115#define RT5645_RXDP2_SEL_IF2 (0x0 << 3) 2116#define RT5645_RXDP2_SEL_ADC (0x1 << 3) 2117#define RT5645_RXDP2_SEL_SFT (3) 2118 | 1353 1354/* VAD Control 4 (0x9d) */ 1355#define RT5645_VAD_SEL_MASK (0x3 << 8) 1356#define RT5645_VAD_SEL_SFT 8 1357 1358/* EQ Control 1 (0xb0) */ 1359#define RT5645_EQ_SRC_MASK (0x1 << 15) 1360#define RT5645_EQ_SRC_SFT 15 --- 752 unchanged lines hidden (view full) --- 2113#define RT5645_RXDC_SRC_STO (0x0 << 7) 2114#define RT5645_RXDC_SRC_MONO (0x1 << 7) 2115#define RT5645_RXDC_SRC_SFT (7) 2116#define RT5645_RXDP2_SEL_MASK (0x1 << 3) 2117#define RT5645_RXDP2_SEL_IF2 (0x0 << 3) 2118#define RT5645_RXDP2_SEL_ADC (0x1 << 3) 2119#define RT5645_RXDP2_SEL_SFT (3) 2120 |
| 2121/* General Control3 (0xfc) */ 2122#define RT5645_IRQ_CLK_GATE_CTRL (0x1 << 11) 2123#define RT5645_MICINDET_MANU (0x1 << 7) |
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| 2119 2120/* Vendor ID (0xfd) */ 2121#define RT5645_VER_C 0x2 2122#define RT5645_VER_D 0x3 2123 2124 2125/* Volume Rescale */ 2126#define RT5645_VOL_RSCL_MAX 0x27 --- 36 unchanged lines hidden (view full) --- 2163}; 2164 2165struct rt5645_priv { 2166 struct snd_soc_codec *codec; 2167 struct rt5645_platform_data pdata; 2168 struct regmap *regmap; 2169 struct i2c_client *i2c; 2170 struct snd_soc_jack *jack; | 2124 2125/* Vendor ID (0xfd) */ 2126#define RT5645_VER_C 0x2 2127#define RT5645_VER_D 0x3 2128 2129 2130/* Volume Rescale */ 2131#define RT5645_VOL_RSCL_MAX 0x27 --- 36 unchanged lines hidden (view full) --- 2168}; 2169 2170struct rt5645_priv { 2171 struct snd_soc_codec *codec; 2172 struct rt5645_platform_data pdata; 2173 struct regmap *regmap; 2174 struct i2c_client *i2c; 2175 struct snd_soc_jack *jack; |
| 2176 struct delayed_work jack_detect_work; |
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| 2171 2172 int sysclk; 2173 int sysclk_src; 2174 int lrck[RT5645_AIFS]; 2175 int bclk[RT5645_AIFS]; 2176 int master[RT5645_AIFS]; 2177 2178 int pll_src; 2179 int pll_in; 2180 int pll_out; 2181}; 2182 2183int rt5645_set_jack_detect(struct snd_soc_codec *codec, 2184 struct snd_soc_jack *jack); 2185 2186#endif /* __RT5645_H__ */ | 2177 2178 int sysclk; 2179 int sysclk_src; 2180 int lrck[RT5645_AIFS]; 2181 int bclk[RT5645_AIFS]; 2182 int master[RT5645_AIFS]; 2183 2184 int pll_src; 2185 int pll_in; 2186 int pll_out; 2187}; 2188 2189int rt5645_set_jack_detect(struct snd_soc_codec *codec, 2190 struct snd_soc_jack *jack); 2191 2192#endif /* __RT5645_H__ */ |