cs42l42.h (585e7079de0eac555bcdfe6284e439ee05fb18cb) cs42l42.h (c5b8ee0879bcdc5082d42fe92d3c235b74feef37)
1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 * cs42l42.h -- CS42L42 ALSA SoC audio driver header
4 *
5 * Copyright 2016 Cirrus Logic, Inc.
6 *
7 * Author: James Schulman <james.schulman@cirrus.com>
8 * Author: Brian Austin <brian.austin@cirrus.com>
9 * Author: Michael White <michael.white@cirrus.com>
10 */
11
12#ifndef __CS42L42_H__
13#define __CS42L42_H__
14
1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 * cs42l42.h -- CS42L42 ALSA SoC audio driver header
4 *
5 * Copyright 2016 Cirrus Logic, Inc.
6 *
7 * Author: James Schulman <james.schulman@cirrus.com>
8 * Author: Brian Austin <brian.austin@cirrus.com>
9 * Author: Michael White <michael.white@cirrus.com>
10 */
11
12#ifndef __CS42L42_H__
13#define __CS42L42_H__
14
15#include <sound/jack.h>
16
15#define CS42L42_PAGE_REGISTER 0x00 /* Page Select Register */
16#define CS42L42_WIN_START 0x00
17#define CS42L42_WIN_LEN 0x100
18#define CS42L42_RANGE_MIN 0x00
19#define CS42L42_RANGE_MAX 0x7F
20
21#define CS42L42_PAGE_10 0x1000
22#define CS42L42_PAGE_11 0x1100

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763};
764
765struct cs42l42_private {
766 struct regmap *regmap;
767 struct snd_soc_component *component;
768 struct regulator_bulk_data supplies[CS42L42_NUM_SUPPLIES];
769 struct gpio_desc *reset_gpio;
770 struct completion pdn_done;
17#define CS42L42_PAGE_REGISTER 0x00 /* Page Select Register */
18#define CS42L42_WIN_START 0x00
19#define CS42L42_WIN_LEN 0x100
20#define CS42L42_RANGE_MIN 0x00
21#define CS42L42_RANGE_MAX 0x7F
22
23#define CS42L42_PAGE_10 0x1000
24#define CS42L42_PAGE_11 0x1100

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765};
766
767struct cs42l42_private {
768 struct regmap *regmap;
769 struct snd_soc_component *component;
770 struct regulator_bulk_data supplies[CS42L42_NUM_SUPPLIES];
771 struct gpio_desc *reset_gpio;
772 struct completion pdn_done;
773 struct snd_soc_jack jack;
771 u32 sclk;
772 u32 srate;
773 u8 plug_state;
774 u8 hs_type;
775 u8 ts_inv;
776 u8 ts_dbnc_rise;
777 u8 ts_dbnc_fall;
778 u8 btn_det_init_dbnce;
779 u8 btn_det_event_dbnce;
780 u8 bias_thresholds[CS42L42_NUM_BIASES];
781 u8 hs_bias_ramp_rate;
782 u8 hs_bias_ramp_time;
783 u8 stream_use;
784};
785
786#endif /* __CS42L42_H__ */
774 u32 sclk;
775 u32 srate;
776 u8 plug_state;
777 u8 hs_type;
778 u8 ts_inv;
779 u8 ts_dbnc_rise;
780 u8 ts_dbnc_fall;
781 u8 btn_det_init_dbnce;
782 u8 btn_det_event_dbnce;
783 u8 bias_thresholds[CS42L42_NUM_BIASES];
784 u8 hs_bias_ramp_rate;
785 u8 hs_bias_ramp_time;
786 u8 stream_use;
787};
788
789#endif /* __CS42L42_H__ */