cthw20k2.c (d905163c5b23f6d8511971e06081a1b525e8a0bd) cthw20k2.c (29959a09cc1aabd2d5f4f03afc0305de6bd29248)
1/**
2 * Copyright (C) 2008, Creative Technology Ltd. All Rights Reserved.
3 *
4 * This source file is released under GPL v2 license (no other versions).
5 * See the COPYING file included in the main directory of this source
6 * distribution for the license terms and conditions.
7 *
8 * @File cthw20k2.c

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1855 if (pci_set_dma_mask(pci, CT_XFI_DMA_MASK) < 0 ||
1856 pci_set_consistent_dma_mask(pci, CT_XFI_DMA_MASK) < 0) {
1857 printk(KERN_ERR "ctxfi: architecture does not support PCI "
1858 "busmaster DMA with mask 0x%llx\n", CT_XFI_DMA_MASK);
1859 err = -ENXIO;
1860 goto error1;
1861 }
1862
1/**
2 * Copyright (C) 2008, Creative Technology Ltd. All Rights Reserved.
3 *
4 * This source file is released under GPL v2 license (no other versions).
5 * See the COPYING file included in the main directory of this source
6 * distribution for the license terms and conditions.
7 *
8 * @File cthw20k2.c

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1855 if (pci_set_dma_mask(pci, CT_XFI_DMA_MASK) < 0 ||
1856 pci_set_consistent_dma_mask(pci, CT_XFI_DMA_MASK) < 0) {
1857 printk(KERN_ERR "ctxfi: architecture does not support PCI "
1858 "busmaster DMA with mask 0x%llx\n", CT_XFI_DMA_MASK);
1859 err = -ENXIO;
1860 goto error1;
1861 }
1862
1863 err = pci_request_regions(pci, "XFi");
1864 if (err < 0)
1865 goto error1;
1863 if (!hw->io_base) {
1864 err = pci_request_regions(pci, "XFi");
1865 if (err < 0)
1866 goto error1;
1866
1867
1867 hw->io_base = pci_resource_start(hw->pci, 2);
1868 hw->mem_base = (unsigned long)ioremap(hw->io_base,
1868 hw->io_base = pci_resource_start(hw->pci, 2);
1869 hw->mem_base = (unsigned long)ioremap(hw->io_base,
1869 pci_resource_len(hw->pci, 2));
1870 pci_resource_len(hw->pci, 2));
1870 if (NULL == (void *)hw->mem_base) {
1871 err = -ENOENT;
1872 goto error2;
1871 if (NULL == (void *)hw->mem_base) {
1872 err = -ENOENT;
1873 goto error2;
1874 }
1873 }
1874
1875 /* Switch to 20k2 mode from UAA mode. */
1876 gctl = hw_read_20kx(hw, GLOBAL_CNTL_GCTL);
1877 set_field(&gctl, GCTL_UAA, 0);
1878 hw_write_20kx(hw, GLOBAL_CNTL_GCTL, gctl);
1879
1880 /*if ((err = request_irq(pci->irq, ct_atc_interrupt, IRQF_SHARED,

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1896 hw->io_base = 0;
1897error1:
1898 pci_disable_device(pci);
1899 return err;
1900}
1901
1902static int hw_card_stop(struct hw *hw)
1903{
1875 }
1876
1877 /* Switch to 20k2 mode from UAA mode. */
1878 gctl = hw_read_20kx(hw, GLOBAL_CNTL_GCTL);
1879 set_field(&gctl, GCTL_UAA, 0);
1880 hw_write_20kx(hw, GLOBAL_CNTL_GCTL, gctl);
1881
1882 /*if ((err = request_irq(pci->irq, ct_atc_interrupt, IRQF_SHARED,

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1898 hw->io_base = 0;
1899error1:
1900 pci_disable_device(pci);
1901 return err;
1902}
1903
1904static int hw_card_stop(struct hw *hw)
1905{
1906 unsigned int data;
1907
1908 /* disable transport bus master and queueing of request */
1909 hw_write_20kx(hw, TRANSPORT_CTL, 0x00);
1910
1911 /* disable pll */
1912 data = hw_read_20kx(hw, PLL_ENB);
1913 hw_write_20kx(hw, PLL_ENB, (data & (~0x07)));
1914
1904 /* TODO: Disable interrupt and so on... */
1905 return 0;
1906}
1907
1908static int hw_card_shutdown(struct hw *hw)
1909{
1910 if (hw->irq >= 0)
1911 free_irq(hw->irq, hw);

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1934 u32 data = 0;
1935 struct dac_conf dac_info = {0};
1936 struct adc_conf adc_info = {0};
1937 struct daio_conf daio_info = {0};
1938 struct trn_conf trn_info = {0};
1939
1940 /* Get PCI io port/memory base address and
1941 * do 20kx core switch if needed. */
1915 /* TODO: Disable interrupt and so on... */
1916 return 0;
1917}
1918
1919static int hw_card_shutdown(struct hw *hw)
1920{
1921 if (hw->irq >= 0)
1922 free_irq(hw->irq, hw);

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1945 u32 data = 0;
1946 struct dac_conf dac_info = {0};
1947 struct adc_conf adc_info = {0};
1948 struct daio_conf daio_info = {0};
1949 struct trn_conf trn_info = {0};
1950
1951 /* Get PCI io port/memory base address and
1952 * do 20kx core switch if needed. */
1942 if (!hw->io_base) {
1943 err = hw_card_start(hw);
1944 if (err)
1945 return err;
1946 }
1953 err = hw_card_start(hw);
1954 if (err)
1955 return err;
1947
1948 /* PLL init */
1949 err = hw_pll_init(hw, info->rsr);
1950 if (err < 0)
1951 return err;
1952
1953 /* kick off auto-init */
1954 err = hw_auto_init(hw);

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2001
2002 data = hw_read_20kx(hw, SRC_MCTL);
2003 data |= 0x1; /* Enables input from the audio ring */
2004 hw_write_20kx(hw, SRC_MCTL, data);
2005
2006 return 0;
2007}
2008
1956
1957 /* PLL init */
1958 err = hw_pll_init(hw, info->rsr);
1959 if (err < 0)
1960 return err;
1961
1962 /* kick off auto-init */
1963 err = hw_auto_init(hw);

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2010
2011 data = hw_read_20kx(hw, SRC_MCTL);
2012 data |= 0x1; /* Enables input from the audio ring */
2013 hw_write_20kx(hw, SRC_MCTL, data);
2014
2015 return 0;
2016}
2017
2018#ifdef CONFIG_PM
2019static int hw_suspend(struct hw *hw, pm_message_t state)
2020{
2021 struct pci_dev *pci = hw->pci;
2022
2023 hw_card_stop(hw);
2024
2025 pci_disable_device(pci);
2026 pci_save_state(pci);
2027 pci_set_power_state(pci, pci_choose_state(pci, state));
2028
2029 return 0;
2030}
2031
2032static int hw_resume(struct hw *hw, struct card_conf *info)
2033{
2034 struct pci_dev *pci = hw->pci;
2035
2036 pci_set_power_state(pci, PCI_D0);
2037 pci_restore_state(pci);
2038
2039 /* Re-initialize card hardware. */
2040 return hw_card_init(hw, info);
2041}
2042#endif
2043
2009static u32 hw_read_20kx(struct hw *hw, u32 reg)
2010{
2011 return readl((void *)(hw->mem_base + reg));
2012}
2013
2014static void hw_write_20kx(struct hw *hw, u32 reg, u32 data)
2015{
2016 writel(data, (void *)(hw->mem_base + reg));
2017}
2018
2019static struct hw ct20k2_preset __devinitdata = {
2020 .irq = -1,
2021
2022 .card_init = hw_card_init,
2023 .card_stop = hw_card_stop,
2024 .pll_init = hw_pll_init,
2025 .is_adc_source_selected = hw_is_adc_input_selected,
2026 .select_adc_source = hw_adc_input_select,
2027 .have_digit_io_switch = hw_have_digit_io_switch,
2044static u32 hw_read_20kx(struct hw *hw, u32 reg)
2045{
2046 return readl((void *)(hw->mem_base + reg));
2047}
2048
2049static void hw_write_20kx(struct hw *hw, u32 reg, u32 data)
2050{
2051 writel(data, (void *)(hw->mem_base + reg));
2052}
2053
2054static struct hw ct20k2_preset __devinitdata = {
2055 .irq = -1,
2056
2057 .card_init = hw_card_init,
2058 .card_stop = hw_card_stop,
2059 .pll_init = hw_pll_init,
2060 .is_adc_source_selected = hw_is_adc_input_selected,
2061 .select_adc_source = hw_adc_input_select,
2062 .have_digit_io_switch = hw_have_digit_io_switch,
2063#ifdef CONFIG_PM
2064 .suspend = hw_suspend,
2065 .resume = hw_resume,
2066#endif
2028
2029 .src_rsc_get_ctrl_blk = src_get_rsc_ctrl_blk,
2030 .src_rsc_put_ctrl_blk = src_put_rsc_ctrl_blk,
2031 .src_mgr_get_ctrl_blk = src_mgr_get_ctrl_blk,
2032 .src_mgr_put_ctrl_blk = src_mgr_put_ctrl_blk,
2033 .src_set_state = src_set_state,
2034 .src_set_bm = src_set_bm,
2035 .src_set_rsr = src_set_rsr,

--- 102 unchanged lines hidden --- 		2067
2068 .src_rsc_get_ctrl_blk = src_get_rsc_ctrl_blk,
2069 .src_rsc_put_ctrl_blk = src_put_rsc_ctrl_blk,
2070 .src_mgr_get_ctrl_blk = src_mgr_get_ctrl_blk,
2071 .src_mgr_put_ctrl_blk = src_mgr_put_ctrl_blk,
2072 .src_set_state = src_set_state,
2073 .src_set_bm = src_set_bm,
2074 .src_set_rsr = src_set_rsr,

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