hdac_stream.c (03ab8e6297acd1bc0eedaa050e2a1635c576fd11) hdac_stream.c (d91857059defe6acb443d8a25691b43a0f9390e8)
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * HD-audio stream operations
4 */
5
6#include <linux/kernel.h>
7#include <linux/delay.h>
8#include <linux/export.h>

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160
161/**
162 * snd_hdac_stream_reset - reset a stream
163 * @azx_dev: HD-audio core stream to reset
164 */
165void snd_hdac_stream_reset(struct hdac_stream *azx_dev)
166{
167 unsigned char val;
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * HD-audio stream operations
4 */
5
6#include <linux/kernel.h>
7#include <linux/delay.h>
8#include <linux/export.h>

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160
161/**
162 * snd_hdac_stream_reset - reset a stream
163 * @azx_dev: HD-audio core stream to reset
164 */
165void snd_hdac_stream_reset(struct hdac_stream *azx_dev)
166{
167 unsigned char val;
168 int timeout;
169 int dma_run_state;
170
171 snd_hdac_stream_clear(azx_dev);
172
173 dma_run_state = snd_hdac_stream_readb(azx_dev, SD_CTL) & SD_CTL_DMA_START;
174
175 snd_hdac_stream_updateb(azx_dev, SD_CTL, 0, SD_CTL_STREAM_RESET);
168 int dma_run_state;
169
170 snd_hdac_stream_clear(azx_dev);
171
172 dma_run_state = snd_hdac_stream_readb(azx_dev, SD_CTL) & SD_CTL_DMA_START;
173
174 snd_hdac_stream_updateb(azx_dev, SD_CTL, 0, SD_CTL_STREAM_RESET);
176 udelay(3);
177 timeout = 300;
178 do {
179 val = snd_hdac_stream_readb(azx_dev, SD_CTL) &
180 SD_CTL_STREAM_RESET;
181 if (val)
182 break;
183 } while (--timeout);
184
175
176 /* wait for hardware to report that the stream entered reset */
177 snd_hdac_stream_readb_poll(azx_dev, SD_CTL, val, (val & SD_CTL_STREAM_RESET), 3, 300);
178
185 if (azx_dev->bus->dma_stop_delay && dma_run_state)
186 udelay(azx_dev->bus->dma_stop_delay);
187
179 if (azx_dev->bus->dma_stop_delay && dma_run_state)
180 udelay(azx_dev->bus->dma_stop_delay);
181
188 val &= ~SD_CTL_STREAM_RESET;
189 snd_hdac_stream_writeb(azx_dev, SD_CTL, val);
190 udelay(3);
182 snd_hdac_stream_updateb(azx_dev, SD_CTL, SD_CTL_STREAM_RESET, 0);
191
183
192 timeout = 300;
193 /* waiting for hardware to report that the stream is out of reset */
194 do {
195 val = snd_hdac_stream_readb(azx_dev, SD_CTL) &
196 SD_CTL_STREAM_RESET;
197 if (!val)
198 break;
199 } while (--timeout);
184 /* wait for hardware to report that the stream is out of reset */
185 snd_hdac_stream_readb_poll(azx_dev, SD_CTL, val, !(val & SD_CTL_STREAM_RESET), 3, 300);
200
201 /* reset first position - may not be synced with hw at this time */
202 if (azx_dev->posbuf)
203 *azx_dev->posbuf = 0;
204}
205EXPORT_SYMBOL_GPL(snd_hdac_stream_reset);
206
207/**

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187 /* reset first position - may not be synced with hw at this time */
188 if (azx_dev->posbuf)
189 *azx_dev->posbuf = 0;
190}
191EXPORT_SYMBOL_GPL(snd_hdac_stream_reset);
192
193/**

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